LTC4071EMS8E#TRPBF - Linear Technology Corporation

LTC4071

4071fc

Typical applicaTion

DescripTion

Li-Ion/Polymer Shunt

Battery Charger System with

Low Battery Disconnect

The LTC

4071 allows simple charging of Li-Ion/Polymer

batteries from very low current, intermittent or continuous

charging sources. A near-zero current low battery latch-

ing disconnect function protects even the lowest capacity

batteries from deep discharge and potentially irreparable

damage. The 550nA to 50mA operating current makes

charging possible from previously unusable sources. With

its low operating current the LTC4071 is well suited to

charge low capacity Li-Ion or thin film batteries in energy

harvesting applications. The unique architecture of the

LTC4071 allows for an extremely simple battery charger

solution, requiring just one external resistor.

The LTC4071 offers a pin selectable float voltage with ±1%

accuracy. The integrated thermal battery qualifier extends

battery lifetime and improves reliability by automatically

reducing the battery float voltage at NTC thermistor tem-

peratures above 40°C. The LTC4071 also provides two

pin selectable low battery disconnect levels and a high

battery status output.

The device is offered in two thermally enhanced packages,

a compact low profile (0.75mm) 8-lead (2mm × 3mm)

DFN and an 8-lead MSOP package.

L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks

and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

FeaTures

applicaTions

n Charger Plus Pack Protection in One IC

n Low Operating Current (550nA)

n Near Zero Current (<0.1nA) Low Battery Disconnect

Function to Protect Batteries from Over-Discharge

n Pin Selectable Low Battery Disconnect Level:

2.7V or 3.2V

n 1% Float Voltage Accuracy Over Temperature

n 50mA Maximum Internal Shunt Current

n Pin Selectable Float Voltage Options: 4.0V, 4.1V, 4.2V

n Ultralow Power Pulsed NTC Float Conditioning for

Li-Ion/Polymer Protection

n Suitable for Intermittent, Continuous and Very Low

Power Charging Sources

n High Battery Status Output

n Thermally Enhanced, Low Profile (0.75mm)

8-Lead (2mm × 3mm) DFN and MSOP Packages

n Low Capacity, Li-Ion/Polymer Battery Back-Up

n Thin Film Batteries

n Energy Scavenging/Harvesting

n Solar Power Systems with Back-Up

n Memory Back-Up

n Embedded Automotive

4071 TA01a

LTC4071

ADJ BAT

RIN

GND Li-Ion

NTC

VCC

VIN

LBSEL +

TO SYSTEM LOAD: VCC

1µF

TEMPERATURE (°C)

–25 0

ILEAK (A)

10p

125

4071 TA01b

0.1p 5025 75 100

100p

10n

100n VBAT = 2.65V

Battery Disconnect ILEAK vs Temperature

LTC4071

4071fc

absoluTe MaxiMuM raTings

ICC, IBAT .............................................±60mA Continuous

IBAT ............................... 400mA for Single Pulse < 10ms

ICC ...............................–400mA for Single Pulse < 10ms

ADJ, NTC, NTCBIAS, HBO Voltages .. –0.3V to VCC + 0.3V

(Notes 1, 2)

TOP VIEW

GND

DDB PACKAGE

8-LEAD (3mm × 2mm) PLASTIC DFN

1NTCBIAS

NTC

ADJ

HBO

VCC

BAT

GND

LBSEL

TJMAX = 125°C, θJA = 76°C/W

EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED,

MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA

NTCBIAS

NTC

ADJ

HBO

VCC

BAT

GND

LBSEL

TOP VIEW

GND

MS8E PACKAGE

8-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 40°C/W

EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED,

MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA

pin conFiguraTion

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4071EDDB#PBF LTC4071EDDB#TRPBF LFXF 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LTC4071IDDB#PBF LTC4071IDDB#TRPBF LFXF 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LTC4071EMS8E#PBF LTC4071EMS8E#TRPBF LTFXG 8-Lead Plastic MSOP –40°C to 125°C

LTC4071IMS8E#PBF LTC4071IMS8E#TRPBF LTFXG 8-Lead Plastic MSOP –40°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

LBSEL Voltage ............................................. –0.3V to 6V

Operating Junction Temperature Range .. –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

Peak Reflow Temperature ..................................... 260°C

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

junction temperature range. Conditions are VNTC = VADJ = VCC, VLBSEL = GND, TA = 25°C unless otherwise specified. Current into a pin

is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VFLOAT Programmable Float Voltage

10µA ≤ ICC ≤ 25mA

VADJ = 0V, 0°C < Temp < 125°C

VADJ = 0V

3.96

3.88

4.0

4.04

VADJ = Float, 0°C < Temp < 125°C

VADJ = Float

4.06

3.98

4.1

4.14

VADJ = VCC, 0°C < Temp < 125°C

VADJ = VCC

4.16

4.07

4.2

4.24

ICCMAX Maximum Shunt Current VCC > VFLOAT l50 mA

ICCQ VCC Operating Current VHBO Low, ADJ = VCC l550 1200 nA

LTC4071

4071fc

elecTrical characTerisTics

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC4071 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC4071E is guaranteed to meet performance specifications

for junction temperatures from 0°C to 85°C. Specifications over the

The l denotes the specifications which apply over the full operating

junction temperature range. Conditions are VNTC = VADJ = VCC, VLBSEL = GND, TJ = 25°C unless otherwise specified. Current into a pin

is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2)

–40°C to 125°C operating junction temperature range are assured by

design, characterization and correlation with statistical process controls.

The LTC4071I is guaranteed over the full –40°C to 125°C operating

junction temperature range. Note that the maximum ambient temperature

consistent with these specifications is determined by specific operation

conditions in conjunction with board layout, the rated package thermal

impedance and other environmental factors.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Low Battery Disconnect

ILEAK Battery Disconnect Leakage

Current

VCC < VBAT = 2.65V l0.01

0.01

25 nA

RDSON Resistance of VCC – BAT Switch IBAT = –1mA, VHBO High 4 6 Ω

VLBD Low Battery Disconnect VBAT Falling, IBAT = –1mA, LBSEL = VCC, 0°C < Temp < 125°C 2.60 2.70 2.79 V

VBAT Falling, IBAT = –1mA, LBSEL = VCC l2.52 2.70 2.79 V

VBAT Falling, IBAT = –1mA, LBSEL = GND, 0°C < Temp < 125°C 3.05 3.20 3.28 V

VBAT Falling, IBAT = –1mA, LBSEL = GND l2.95 3.20 3.28 V

VLBC_BAT Low Battery Connect VBAT Rising, IBAT = –1mA, LBSEL = VCC 2.97 V

VBAT Rising, IBAT = –1mA, LBSEL = GND 3.53 V

VLBC_VCC Low Battery Connect VCC Rising, LBSEL = VCC

VCC Rising, LBSEL = GND

3.6

4.19

High Battery Status

VHBTH HBO Threshold (VFLOAT – VCC) VCC Rising l15 40 75 mV

VHBHY Hysteresis 100 mV

Status Output: HBO

VOL CMOS Output Low ISINK = 1mA, VCC = 3.7V 0.5 V

VOH CMOS Output High ISOURCE = –0.5mA, ICC = 1.5mA VCC – 0.6 V

Selection Inputs: ADJ, LBSEL

VADJ_IL ADJ VIL Input Logic Low Level l0.3 V

VADJ_IH ADJ VIH Input Logic High Level lVCC – 0.3 V

IADJ(Z) Allowable ADJ Leakage Current

in Floating State

l±3 µA

VLBSEL_IL LBSEL VIL Input Logic Low Level l250 mV

VLBSEL_IH LBSEL VIH Input Logic High Level l1.4 V

ILBSEL LBSEL Leakage Current 0 ≤ LBSEL ≤ VCC l–5 0 5 nA

NTC

INTC NTC Leakage Current 0V ≤ NTC ≤ VCC l–5 0 5 nA

INTCBIAS Average NTCBIAS Sink Current Pulsed Duty Cycle < 0.002% 30 50 pA

NTCTH1 NTC Comparator Falling

Thresholds

VNTC as Percentage of VNTCBIAS Amplitude 35.5 36.5 38 %

NTCTH2 28.0 29.0 30.5 %

NTCTH3 21.8 22.8 23.8 %

NTCTH4 16.8 17.8 18.8 %

NTCHY Hysteresis 30 mV

∆VFLOAT(NTC) Delta Float Voltage per NTC

Comparator Step

NTC Falling Below One of the NTCTH Thresholds

ADJ = 0V

ADJ = Floating

ADJ = VCC

–57

–82

–107

–50

–75

–100

–43

–68

–93

LTC4071

4071fc

Typical perForMance characTerisTics

RDS(ON) vs Temperature ICC vs VCC

LBD/LBC vs Temperature

(LBSEL = VCC)

HBO Thresholds vs Temperature VF vs Temperature Load Regulation

LBC vs IBAT

LBD/LBC vs Temperature

(LBSEL = GND)

TA = 25°C, unless otherwise noted.

ICCQ vs Temperature

IBAT (mA)

0.01

LBC_VCC (V)

3.5

3.3

100

4071 G01

3.1

2.9 0.1 1 10

3.9

3.7

4.1

4.3

LBSEL = GND

LBSEL = VCC

TEMPERATURE (°C)

–50 –25

LBD/LBC (V)

3.4

3.2

125

4071 G02

3.0 0 25 50 75 100

3.8

3.6

4.0

4.2

LBC_VCC

LBC_BAT

LBD

ADJ = VCC

NTC = NTCBIAS

IBAT = –1mA

TEMPERATURE (°C)

–50 –25

LBD/LBC (V)

2.9

2.7

125

4071 G03

2.5 0 25 50 75 100

3.3

3.1

3.5

3.7

LBC_VCC

LBC_BAT

LBD

ADJ = VCC

NTC = NTCBIAS

IBAT = –1mA

TEMPERATURE (°C)

–50 –25

RDS(ON) (Ω)

4.0

3.5

125

4071 G04

3.0 0 25 50 75 100

5.0

4.5

5.5

VCC (V)

0 0.5

ICC (nA)

600

800

1000

400

200

4.0

4071 G05

01 1.5 2 2.5 3 3.5

1600

1800

1200

1400

2000

125°C RISING

125°C FALLING

25°C RISING

25°C FALLING

–45°C RISING

–45°C FALLING

ADJ = VCC

LBSEL = VCC

NTC = NTCBIAS

TEMPERATURE (°C)

–50 –25

ICCQ (nA)

500

400

125

4071 G06

300 0 25 50 75 100

900

700

600

800

1000

ADJ = VCC

LBSEL = VCC

NTC = NTCBIAS

HBO LOW

TEMPERATURE (°C)

–50 –25

HBOTH/HY (mV)

125

4071 G07

00 25 50 75 100

200

100

150

250

HBOHY

HBOTH

ADJ = VCC

LBSEL = VCC

NTC = NTCBIAS

TEMPERATURE (°C)

–50 –25

VF (V)

125

4071 G08

3.95 0 25 50 75 100

4.15

4.20

4.05

4.00

4.10

4.25

ADJ = GND

ADJ = FLOAT

ADJ = VCC

LBSEL = VCC

NTC = NTCBIAS

ICC (mA)

VCC (V)

4071 G09

4.095 10 20 30 40 50

4.115

4.120

4.105

4.100

4.110

4.125

ADJ = FLOAT

NTC = NTCBIAS

LBSEL = VCC

LTC4071

4071fc

Typical perForMance characTerisTics

VF vs NTC Temperature

MP1 Body Diode HBO VOH

LBSEL VIL /VIH vs Temperature

TA = 25°C, unless otherwise noted.

HBO VOL

NTCBIAS Period vs Temperature

NTCBIAS Pulse Width

vs Temperature

IBAT (mA)

0.01

VCC – VBAT (V)

100

4071 G10

00.1 1 10

0.7

0.8

0.9

0.5

0.4

0.3

0.2

0.1

0.6

1.0

VCC = 3.5V

LBSEL = GND

125°C

85°C

25°C

–45°C

ISOURCE (mA)

VCC – VHBO (mV)

2.5

4071 G11

00.5 1 1.5 2

800

1000

200

400

600

1600

1800

1200

1400

2000

ADJ = GND

ADJ = VCC

LBSEL = VCC

NTC = NTCBIAS

ISINK (mA)

VOL (mV)

4071 G12

02 4 5

1 3

300

600

900

1200

VCC = 4.0V

VCC = 3.6V

LBSEL = VCC

NTC = NTCBIAS

TEMPERATURE (°C)

–50 –25

VIL/VIH (mV)

125

4071 G13

00 25 50 75 100

800

1000

1200

400

200

600

1400

VIL

VIH

NTC TEMPERATURE (°C)

0 20

VF (V)

100

4071 G14

3.75

3.80

3.85

3.90

3.95

40 60 80

4.15

4.20

4.05

4.00

4.10

4.25

ADJ = VCC

ADJ = FLOAT

ADJ = GND

LBSEL = VCC

TEMPERATURE (°C)

–50 –25

PULSE WIDTH (µs)

125

4071 G15

00 25 50 75 100

200

100

150

250

HBO LOW

HBO HIGH

TEMPERATURE (°C)

–50 –25

PERIOD (SEC)

125

4071 G16

00 25 50 75 100

HBO LOW

HBO HIGH

LTC4071

4071fc

pin FuncTions

NTCBIAS (Pin 1): NTC Bias Pin. Connect a resistor from

NTCBIAS to NTC, and a thermistor from NTC to GND. Float

NTCBIAS when not in use. Minimize parasitic capacitance

on this pin.

NTC (Pin 2): Input to the Negative Temperature Coefficient

Thermistor Monitoring Circuit. The NTC pin connects to

a negative temperature coefficient thermistor which is

typically co-packaged with the battery to determine the

temperature of the battery. If the battery temperature is too

high, the float voltage is reduced. Connect a low drift bias

resistor from NTCBIAS to NTC and a thermistor from NTC

to GND. When not in use, connect NTC to VCC. Minimize

parasitic capacitance on this pin.

ADJ (Pin 3): Float Voltage Adjust Pin. Connect ADJ to GND

to program 4.0V float voltage. Disconnect ADJ to program

4.1V float voltage. Connect ADJ to VCC to program 4.2V

float voltage. The float voltage is also adjusted by the NTC

thermistor.

HBO (Pin 4): High Battery Monitor Output (Active High).

HBO is a CMOS output that indicates that the battery is

almost fully charged and current is being shunted away

from VCC. This pin is driven high when VCC rises to within

VHBTH of the effective float voltage, VFLOAT_EFF. The absolute

value of this threshold depends on ADJ and NTC both of

which affect the float voltage. HBO is driven low when VCC

falls by more than (VHBTH + VHBHY) below the effective

float voltage. Refer to Table 1 for the effective float voltage.

LBSEL (Pin 5): Low Battery Disconnect Select Pin. Con-

nect LBSEL to GND to select a low battery disconnect

level of 3.2V, connect LBSEL to VCC to select a low battery

disconnect level of 2.7V. Do not float.

GND (Pin 6, Exposed Pad Pin 9): Ground. The exposed

package pad has no internal electrical connection but must

be connected to PCB ground for maximum heat transfer.

BAT (Pin 7): Battery Pin. Battery charge current is sourced

from VCC through this pin when an external supply is

present. BAT supplies current to VCC from this pin when

no other source of power is available. If BAT falls below

VLBD this pin disconnects the battery from VCC protecting

the battery from discharge by the load when no external

power supply is present.

VCC (Pin 8): Input Supply Pin. Attach system load to this

pin. The input supply voltage is regulated to 4.0V, 4.1V,

or 4.2V depending on the ADJ pin state (see the ADJ pin

description for more detail). This pin can sink up to 50mA

in order to keep the voltage regulation within accuracy

limits. Decouple to GND with a capacitor, CIN, of at least

0.1µF, use a larger decoupling cap to handle high peak

load currents.

LTC4071

4071fc

operaTion

block DiagraM

The LTC4071 provides a simple, reliable, and high per-

formance battery protection and charging solution by

preventing the battery voltage from exceeding a pro-

grammed level. Its shunt architecture requires just one

resistor from the input supply to charge and protect the

battery in a wide range of battery applications. When the

input supply is removed and the battery voltage is below

the high battery output threshold, the LTC4071 consumes

just 550nA from the battery. If the battery voltage falls

below the programmable low battery disconnect level,

the battery disconnects from VCC, protecting the battery

from over-discharge either by the load connected to VCC

or from the LTC4071 quiescent current.

When an input supply is present the battery charges

through the body diode of the internal disconnect PFET,

MP1, until the battery voltage rises above the low-

battery connect threshold. Select an input voltage large

4071 BD

3-STATE

DETECT

OSC

CLK

ADJ

0.9sec – 7sec

PULSED

DUTY CYCLE = 0.003%

30µs – 200µs

NTCBIAS

NTC

RNOM

10k

–

HBO

LBSEL LBSEL MUST BE TIED TO VCC OR GND

VCC

BAT

GND

ADC

LTC4071

1.2V 1.2V

MP2

MP1

BODY

DIODE

Li-Ion

BATTERY

VIN

RIN

SYSTEM

LOAD

enough for VCC to reach VLBC_VCC to ensure that MP1 turns

on. The user may detect the connected state by observing

periodic pulses at the NTCBIAS pin that only occur once

VCC has risen above VLBC_VCC, and cease once VCC falls

below VLBD. Depending on the capacity of the battery and

the input decoupling capacitor, the VCC voltage generally

falls to VBAT when MP1 turns on; rather than VBAT rising

to VCC. The internal PFET then reconnects the battery to

VCC and the charge rate is determined by the input voltage,

the battery voltage, and the input resistor:

ICHG =V

IN −VBAT

( )

RIN

As the battery voltage approaches the float voltage, the

LTC4071 shunts current away from the battery thereby

reducing the charge current. The LTC4071 can shunt up to

50mA. The shunt current limits the maximum charge current.

LTC4071

4071fc

operaTion

In cases where the input supply may be shorted to GND

when not supplying power, for example with a solar cell, add

a diode in series with RIN to prevent the input from loading

the battery. For more information, refer to the photovoltaic

charger example in the Applications Information section.

Adjustable Float Voltage, VFLOAT

A built-in 3-state decoder connected to the ADJ pin pro-

vides three programmable float voltages: 4.0V, 4.1V, or

4.2V. The float voltage is programmed to 4.0V when ADJ

is tied to GND, 4.1V when ADJ is floating (disconnected),

and 4.2V when ADJ is tied to VCC. The state of the ADJ

pin (and NTC pins) is sampled for about 36µs about once

every 1.2 seconds when HBO is high, and when HBO is

low the sampling rate reduces to about once every 3.6

seconds with the same duty cycle. If VCC falls below

VLBD, the sampling stops. When it is being sampled, the

LTC4071 applies a relatively low impedance voltage at the

ADJ pin. This technique prevents low level board leakage

from corrupting the programmed float voltage.

NTC Qualified Float Voltage, ∆VFLOAT(NTC)

The NTC pin voltage is compared against an internal

resistor divider tied to the NTCBIAS pin. This divider has

tap points that are matched to the NTC thermistor resis-

tance/temperature conversion table for a Vishay curve 2

thermistor at temperatures of 40°C, 50°C, 60°C, and 70°C.

The curve 2 thermistor is also designated by a B25/85

value of 3490.

Battery temperature conditioning adjusts the float voltage

down to VFLOAT_EFF when the NTC thermistor indicates

that the battery temperature is too high. For a 10k curve 2

thermistor and a 10k NTCBIAS resistor, each 10°C increase

in temperature above 40°C causes the float voltage to drop

by a fixed amount, ∆VFLOAT(NTC), depending on ADJ. If ADJ

is at GND, the float voltage steps down by 50mV for each

10°C temperature increment. If ADJ is floating, the step

size is 75mV. And if ADJ is at VCC, the step size is 100mV.

Refer to Table 1 for the range of VFLOAT_EFF programming.

Table 1. NTC Qualified Float Voltage

ADJ ∆VFLOAT(NTC) TEMPERATURE

VNTC AS % OF

NTCBIAS VFLOAT_EFF

GND 50mV T < 40°C

40°C ≤ T < 50°C

50°C ≤ T < 60°C

60°C ≤ T < 70°C

70°C < T

VNTC > 36.5

29.0 < VNTC ≤ 36.5

22.8 < VNTC ≤ 29.0

17.8 < VNTC ≤ 22.8

VNTC ≤ 17.8

4.000

3.950

3.900

3.850

3.800

Floating 75mV T < 40°C

40°C ≤ T < 50°C

50°C ≤ T < 60°C

60°C ≤ T < 70°C

70°C < T

VNTC > 36.5

29.0 < VNTC ≤ 36.5

22.8 < VNTC ≤ 29.0

17.8 < VNTC ≤ 22.8

VNTC ≤ 17.8

4.100

4.025

3.950

3.875

3.800

VCC 100mV T < 40°C

40°C ≤ T < 50°C

50°C ≤ T < 60°C

60°C ≤ T < 70°C

70°C < T

VNTC > 36.5

29.0 < VNTC ≤ 36.5

22.8 < VNTC ≤ 29.0

17.8 < VNTC ≤ 22.8

VNTC ≤ 17.8

4.200

4.100

4.000

3.900

3.800

For all ADJ pin settings the lowest float voltage setting is:

3.8V = VFLOAT_MIN = VFLOAT – 4 • ∆VFLOAT(NTC).

This occurs at NTC thermistor temperatures above 70°C,

or if the NTC pin is grounded.

To conserve power in the NTCBIAS and NTC resistors, the

NTCBIAS pin is sampled at a low duty cycle at the same

time that the ADJ pin state is sampled.

High Battery Status Output: HBO

The HBO pin pulls high when VCC rises to within VHBTH

of the programmed float voltage, VFLOAT_EFF, including

NTC qualified float voltage adjustments assuming VCC

has risen above VLBC_VCC.

If VCC drops below the float voltage by more than VHBTH +

VHBHY the HBO pin pulls low to indicate that the battery is

not at full charge. The input supply current to the LTC4071

drops to less than 550nA (typ) as the LTC4071 no longer

shunts current to protect the battery. And the NTCBIAS

sample clock slows to conserve power.

For example, if the NTC thermistor requires the float voltage

to be dropped by 100mV (ADJ = VCC and 0.29•VNTCBIAS

< VNTC < 0.36•VNTCBIAS) then the HBO rising threshold

is detected when VCC rises past:

VFLOAT – ∆VFLOAT(NTC) – VHBTH

= 4.2V – 100mV – 40mV = 3.96V.

LTC4071

4071fc

operaTion

Low Battery Disconnect/Connect: LBD/LBC

The low battery disconnect (VLBD) and connect (VLBC) volt-

age levels are programmed by the LBSEL pin. As shown

in the Block Diagram the battery disconnects from VCC by

shutting off MP1 when the BAT voltage falls below VLBD.

This disconnect function protects Li-Ion batteries from

permanent damage due to deep discharge. If the voltage

of a Li-Ion cell drops below a certain level, the cell may be

permanently damaged. Disconnecting the battery from VCC

prevents the load at VCC as well as the LTC4071 quiescent

current from further discharging the battery.

Once disconnected the VCC voltage collapses towards

ground. When an input supply is reconnected the bat-

tery charges through the internal body diode of MP1.

The input supply voltage should be larger than VLBC_VCC

to ensure that MP1 is turned on. When the VCC voltage

reaches VLBC_VCC, MP1 turns on and connects VCC and

BAT. While disconnected, the BAT pin voltage is indirectly

sensed through MP1’s body diode. Therefore VLBC varies

with charge current and junction temperature. Please see

the Typical Performance Characteristics section for more

information.

Low Battery Select: LBSEL

The low battery discharge cutoff voltage level is pro-

grammed by the LBSEL pin.

The LBSEL pin allows the user to trade-off battery run-

time and maximum shelf life. A lower battery disconnect

threshold maximizes run time by allowing the battery to

fully discharge before the disconnect event. Conversely,

by increasing the low battery disconnect threshold more

capacity remains following the disconnect event which

extends the shelf life of the battery. For maximum run

time, tie LBSEL to VCC so that the battery disconnects at

VCC = 2.7V. For extended shelf life, tie LBSEL to GND so

that the battery disconnects at VCC = 3.2V. If a high peak

current event is expected, users may temporarily select

the lower disconnect threshold. This avoids disconnect-

ing the battery too early when the load works against the

battery series resistance and temporarily reduces VCC.

LTC4071

4071fc

applicaTions inForMaTion

adapter voltage (VWALL) is 12V and the maximum charge

current is calculated as:

IMAX _ CHARGE =VWALL −VBAT _ MIN

(

)

RIN

=12V −3.2V

(

)

162

Ω

=54mA

Figure 3. 2-Cell Battery Charger

Care must be taken in selecting the input resistor. Power

dissipated in RIN under full charge current is given by the

following equation:

DISS =VWALL −VBAT _ MIN

(

)

RIN

=12V −3.2V

(

)

162Ω=0.48W

The charge current decreases as the battery voltage

increases. If the battery voltage is 40mV less than the

programmed float voltage the LTC4071 consumes only

550nA of current, and all of the excess input current flows

into the battery. As the battery voltage reaches the float

voltage, the LTC4071 shunts current from the wall adapter

and regulates the battery voltage to VFLOAT = VCC. The

more shunt current the LTC4071 sinks, the less charge

current the battery gets. Eventually, the LTC4071 shunts

all the current flowing through RIN; up to the maximum

shunt current. The maximum shunt current in this case,

with no NTC adjustment is determined by the input resistor

and is calculated as:

ISHUNT _ MAX =VWALL −VFLOAT

(

)

=12V −4.1V

(

)

162Ω=49mA

At this point the power dissipated in the input resistor is

388mW.

The LTC4071 can also be used to regulate series-connected

battery stacks as illustrated in Figure 3. Here two LTC4071

devices are used to charge two batteries in series. A

single resistor sets the maximum charge/shunt current.

LTC4071

BAT

RIN

GND

Li-Ion

BATTERY

VCC

1µF

4071 F03

LTC4071

BAT

GND

Li-Ion

BATTERY

VCC

1µF

WALL

ADAPTER

General Charging Considerations

The LTC4071 uses a different charging methodology from

previous chargers. Most Li-Ion chargers terminate the

charging after a period of time. The LTC4071 does not have

a discrete charge termination. Extensive measurements

on Li-Ion cells show that the cell charge current drops

to very low levels with the shunt charge control circuit

effectively terminating the charge. For improved battery

lifetime choose 4.0V or 4.1V float voltage.

The battery disconnect function requires some care in se-

lecting the input supply compliance for charging a battery

while powering a load at VCC. The internal battery discon-

nect switch remains off while charging the battery through

the body diode of the internal switch until VCC exceeds

VLBC_VCC. If the source voltage compliance is not greater

than VLBC_VCC, then the battery will never re-connect to

VCC and the system load will not be able to run on battery

power. Users may detect that the battery is connected by

monitoring the NTCBIAS pin as it will periodically pulse

high once VCC has risen above VLBC_VCC, and stops pulsing

once VCC falls below VLBD.

The simplest application of the LTC4071 is shown in Fig-

ure 2. This application requires only an external resistor

to program the charge/shunt current. Assume the wall

Figure 2. Single-Cell Battery Charger

4071 F02

LTC4071

BAT

RIN = 162Ω, 0.5W

GND

Li-Ion

BATTERY

VCC

1µF

WALL

ADAPTER

LTC4071

4071fc

applicaTions inForMaTion

The GND pin of the top device is simply connected to

the VCC pin of the bottom device. Care must be taken in

observing the HBO status output pin of the top device as

this signal is no longer ground referenced. Likewise for

the control inputs of the top device; tie ADJ and LBSEL

of the top device to the local GND or VCC pins. Also, the

wall adapter must have a high enough voltage rating to

charge both cells.

NTC Protection

The LTC4071 measures battery temperature with a negative

temperature coefficient thermistor thermally coupled to the

battery. NTC thermistors have temperature characteristics

which are specified in resistance-temperature conversion

tables. Internal NTC circuitry protects the battery from

excessive heat by reducing the float voltage for each

10°C rise in temperature above 40°C (assuming a Vishay

thermistor with a B25/85 value of 3490).

The LTC4071 uses a ratio of resistor values to measure

battery temperature. The LTC4071 contains an internal

fixed resistor voltage divider from NTCBIAS to GND with

four tap points; NTCTH1–NTCTH4. The voltages at these

tap points are periodically compared against the voltage at

the NTC pin to measure battery temperature. To conserve

power, the battery temperature is measured periodically

by biasing the NTCBIAS pin to VCC about once every 1.5

seconds.

The voltage at the NTC pin depends on the ratio of NTC

thermistor value, RNTC, and a bias resistor, RNOM. Choose

RNOM equal to the value of the thermistor at 25°C. RNOM

is 10k for a Vishay NTHS0402N02N1002F thermistor with

a B25/85 value of 3490. RNOM must be connected from

NTCBIAS to NTC. The ratio of the NTC pin voltage to the

NTCBIAS voltage when it is pulsed to VCC is:

RNTC

RNTC +RNOM

( )

When the thermistor temperature rises, the resistance

drops; and the resistor divider between RNOM and the

thermistor lowers the voltage at the NTC pin.

An NTC thermistor with a different B25/85 value may also

be used with the LTC4071. However the temperature trip

points are shifted due to the higher negative temperature

coefficient of the thermistor. To correct for this difference

add a resistor, RFIX, in series with the thermistor to shift

the ratio:

FIX

NTC

RFIX +RNTC +RNOM

( )

Up to the internal resistive divider tap points: NTCTH1

through NTCTH4. For a 100k thermistor with a B25/85

value of 3950, e.g. NTHS0402N01N1003F, at 70°C (with

RNOM = 100k) choose RFIX = 3.92k. The temperature trip

points are found by looking up the curve 1 thermistor R/T

values plus RFIX that correspond to the ratios for NTCTH1

= 36.5%, NTCTH2 = 29%, NTCTH3 = 22.8%, and NTCTH4

= 17.8%. Selecting RFIX = 3.92k results in trip points of

39.9°C, 49.4°C, 59.2°C and 69.6°C.

Another technique may be used without adding an ad-

ditional component. Instead decrease RNOM to adjust the

NTCTH thresholds for a given R/T thermistor profile. For

example, if RNOM = 88.7k (with the same 100k thermis-

tor) then the temperature trip points are 41.0°C, 49.8°C,

58.5°C and 67.3°C.

When using the NTC features of the LTC4071 it is important

to keep in mind that the maximum shunt current increases

as the float voltage, VFLOAT_EFF drops with NTC conditioning.

Reviewing the single-cell battery charger application with

a 12V wall adapter in Figure 2; the input resistor should be

increased to 165Ω such that the maximum shunt current

does not exceed 50mA at the lowest possible float voltage

due to NTC conditioning, VFLOAT_MIN = 3.8V.

Thermal Considerations

At maximum shunt current, the LTC4071 may dissipate up

to 205mW. The thermal dissipation of the package should

be taken into account when operating at maximum shunt

current so as not to exceed the absolute maximum junc-

tion temperature of the device. With θJA of 40°C/W, in the

MSOP package, at maximum shunt current of 50mA the

junction temperature rise is about 8°C above ambient.

With θJA of 76°C/W in the DFN package, at maximum

shunt current of 50mA the junction temperature rise is

about 16°C above ambient. The junction temperature, TJ,

is calculated depending on ambient temperature, TA, power

LTC4071

4071fc

applicaTions inForMaTion

dissipation, PD (in W), and θJA is the thermal impedance

of the package (in °C/W):

TJ = TA + (PD × θJA).

The application shown in Figure 4 illustrates how to prevent

triggering the low-battery disconnect function under large

pulsed loads due to the high ESR of thin-film batteries.

Figure 5. 4.2V AC Line Charging, UL Leakage Okay

4071 F05

LTC4071

AC 110V

ADJNTC

BAT

GND Li-Ion

BATTERY

NTCBIASFLOAT

VCC

R1 = 249k R2 = 249k

LBSEL +

SYSTEM

LOAD

MB4S

– +

DANGER! HIGH VOLTAGE

R3 = 249k R4 = 249k

DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN AC

LINE-CONNECTED CIRCUITS! BEFORE PROCEEDING ANY

FURTHER, THE READER IS WARNED THAT CAUTION MUST BE

USED IN THE CONSTRUCTION, TESTING AND USE OF AC

LINE-CONNECTED CIRCUITS. EXTREME CAUTION MUST BE

USED IN WORKING WITH AND MAKING CONNECTIONS TO

THESE CIRCUITS. ALL TESTING PERFORMED ON AC

LINE-CONNECTED CIRCUITS MUST BE DONE WITH AN

ISOLATION TRANSFORMER CONNECTED BETWEEN THE AC LINE

AND THE CIRCUIT. USERS AND CONSTRUCTORS OF AC

LINE-CONNECTED CIRCUITS MUST OBSERVE THIS PRECAUTION

WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO

AVOID ELECTRIC SHOCK.

age recovers, as the capacity of the battery should provide

roughly 50 hours of use for an equivalent 0.1%•20mA =

20µA load. To prevent load pulses from tripping the low

battery disconnect, add a decoupling capacitor from VCC to

GND. The size of this capacitor can be calculated based on

how much margin is required from the LBD threshold as

well as the amplitude and pulse width of the load transient.

For a 1.0mAh battery with a state-of-charge of 3.8V, the

margin from LBD is 600mV with LBSEL tied to GND. For

a square-wave load pulse of 20mA with a pulse width of

5ms, the minimum size of the decoupling cap required to

hold VCC above LBD is calculated as follows:

CBYPASS =20mA • 5ms

600mV =166.6µF

Take care to select a bypass capacitor with low leakage.

The LTC4071 can be used to charge a battery to a 4.2V

float voltage from an AC line with a bridge rectifier as

shown in the simple schematic in Figure 5. In this example,

Figure 4. Adding a Decoupling Capacitor

for Large Load Transients

Table 2 lists some thin-film batteries, their capacities

and their equivalent series resistance. The ESR causes

VBAT and VCC to droop as a product of the load current

amplitude multiplied by the ESR. This droop may trigger

the low-battery disconnect while the battery itself may

still have ample capacity. Adding a bypass capacitor to

VCC prevents large low duty cycle load transients from

pulling down on VCC.

Table 2. Low Capacity Li-Ion and Thin-Film Batteries

VENDOR P/N CAPACITY RESISTANCE VMIN

CYMBET CBC012 12µAh 5k to 10k 3.0V

CYMBET CBC050 50µAh 1500Ω to 3k 3.0V

GS NanoTech N/A 500µAh 40Ω 3.0V

APS-Autec LIR2025 20mAh 0.75Ω 3.0V

APS-Autec LIR1025 6mAh 30Ω 2.75V

IPS MEC225-1P 0.13mAh 210Ω to 260Ω 2.1V

IPS MEC220-4P 0.4mAh 100Ω to 120Ω 2.1V

IPS MEC201-10P 1.0mAh 34Ω to 45Ω 2.1V

IPS MEC202-25P 2.5mAh 15Ω to 20Ω 2.1V

GM Battery GMB031009 8mAh 10Ω to 20Ω 2.75V

For example, given a 0.1% duty cycle 5ms load pulse of

20mA and a 1.0mAh IPS MEC201-10P solid-state thin-film

battery with an equivalent series resistance of 35Ω, the

voltage drop at VCC can be as high as 0.7V while the load

is on. However once the load pulse ends, the battery volt-

LTC4071

BAT

NTCBIAS

NTC

LBSEL

ADJ

RIN

VIN

GND Li-Ion

VCC

CBYPASS

4071 F04

FLOAT

10k

NTHS0402N02N1002F

PULSED

ILOAD

SYSTEM LOAD

LTC4071

4071fc

Figure 6. Simple Photovoltaic Charger

Figure 7. Piezoelectric Energy Harvester with Battery Backup

LTC4071

BAT

GND

Li-Ion

BATTERY

VCC

4071 F07

LTC4071

LTC3588-1

BAT

LBSEL

GND GND

PFCB-W14

Li-Ion

BATTERY

VCC

1µF

PZ1

PZ2

VOUT

VIN2

4.7µF

3.3V

SYSTEM

LOAD

100µF

10µH

CAPVIN

VIN2

22µF

1µF

MMSD4148T1

15k

applicaTions inForMaTion

the four input 249k resistors are sized for acceptable UL

leakage in the event that one of the resistors short. Here,

the LTC4071 will fully charge the battery from the AC line

while meeting the UL specification with 104µA of available

charge current.

A simple photovoltaic (PV) application for the LTC4071

is illustrated in Figure 6. At low VCC voltage, PV current

flows to both the system at VCC as well as the battery.

When VCC reaches the programmed float voltage (4.1V

with ADJ floating) then the LTC4071 shunts excess current

not used by the load, limiting VCC to 4.1V and effectively

reducing the battery charge current to zero. If the PV cells

stop supplying current, the battery supports the load at

VCC through the LTC4071. Add a diode in series with the

PV cells to prevent reverse leakage of the PV cells from

draining the battery. If the battery discharges to the point

where VCC falls below VLBD (3.2V with LBSEL tied to

GND) the LTC4071 disconnects the load from the battery

to protect the battery from over discharge.

Typically, solar cells are inherently limited in current, but

this circuit may require a resistor, RIN, in series with the

LTC4071 for high current solar cells. Select RIN such that

the LTC4071 never needs to shunt more than 50mA.

The simple schematic in Figure 7 illustrates a complete

piezoelectric energy harvesting application using the

LTC4071 to charge and protect Li-Ion cells along with the

LTC3588-1 to rectify and regulate energy generated from

a piezoelectric generator to a fixed 3.3V load.

LTC4071

BAT

NTCBIAS

NTC

LBSEL

ADJ

1µF

GND

DS16003

Li-Ion

VCC

4071 F06

FLOAT

* NTHS0402N02N1002F

** JAMECO 171061

10k

SYSTEM LOAD

–

LTC4071

4071fc

This system has two modes of operation, charging where

the batteries are being charged from energy harvested from

the piezoelectric generator while the load is negligible.

And discharging, where the load is pulling current from

the batteries, but insufficient energy is being harvested

to power the load.

This application allows the load to periodically draw more

current than would otherwise be available from the piezo-

electric generator by storing excess charge in a stack of

two Li-Ion cells. Each Li-Ion cell is protected from over-

charge and over discharge by a LTC4071 shunt regulator.

The two LTC4071s regulate VIN of the LTC3588-1 to 8.2V

(with both ADJ pins floating) shunting any excess current

that is not used by the load once the batteries achieve

their float voltages. When the load requires more current

than is available from the piezoelectric generator, the

voltage at VIN droops and current is supplied from the two

Li-Ion cells to power the step-down switching regulator.

If the load pulls enough current to discharge the batteries

below VLBD, the LTC4071s disconnect the batteries, and

VIN collapses until the piezoelectric generator resumes

supplying current.

The application in Figure 8 illustrates how to implement

“ship-mode,” where a battery is co-packaged with the

LTC4071 and then the entire device is latched-off, leaving

the battery fully charged but with the LTC4071 switched off.

The co-packaged battery and LTC4071 can then be stored

with a long shelf-life before being activated for normal use.

Ship-mode is triggered by pulling enough current through

the LTC4071 so as to drop VCC below the LBD threshold.

The current pulse amplitude should be less than 400mA

with a duration of less than 10ms. The peak current neces-

sary, IPK, depends on the equivalent series resistance of

the battery, BESR, summed with the RDSON of the BAT-VCC

FET, the battery voltage, VBAT and the selected disconnect

voltage, VLBD:

IPK =VBAT

−

VLBD

RDSON +BESR

Users may test that ship mode has been triggered by

simply checking if VCC is at GND and that there are no

longer any NTCBIAS pulses.

Re-activation of the LTC4071 and the battery requires

either applying power normally, or briefly shorting VCC

to BAT to turn it on.

applicaTions inForMaTion

Figure 8. LTC4071 Ship-Mode Application for Extended Shelf Life

LTC4071

BAT

NTCBIAS

NTC

ADJ

LBSEL

1µF

CURRENT PULSE

TO TRIGGER

SHIP-MODE

GND Li-Ion

VCC

IPK

4071 F08

*NTHS0402N02N1002F

10k

LTC4071

4071fc

package DescripTion

DDB Package

8-Lead Plastic DFN (3mm × 2mm)

(Reference LTC DWG # 05-08-1702 Rev B)

2.00 ±0.10

(2 SIDES)

NOTE:

1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

0.40 ± 0.10

BOTTOM VIEW—EXPOSED PAD

0.56 ± 0.05

(2 SIDES)

0.75 ±0.05

R = 0.115

TYP

R = 0.05

TYP

2.15 ±0.05

(2 SIDES)

3.00 ±0.10

(2 SIDES)

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

0.200 REF

0 – 0.05

(DDB8) DFN 0905 REV B

0.25 ± 0.05

2.20 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

0.61

0.05

(2 SIDES)

1.15 ±0.05

0.70 ±0.05

2.55 ±0.05

PACKAGE

OUTLINE

0.25 ± 0.05

0.50 BSC

PIN 1

R = 0.20 OR

0.25 × 45°

CHAMFER

0.50 BSC

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC4071

4071fc

package DescripTion

MSOP (MS8E) 0910 REV I

0.53 ± 0.152

(.021 ± .006)

SEATING

PLANE

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD

SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

0.18

(.007)

0.254

(.010)

1.10

(.043)

MAX

0.22 – 0.38

(.009 – .015)

TYP

0.86

(.034)

REF

0.65

(.0256)

BSC

0° – 6° TYP

DETAIL “A”

GAUGE PLANE

1 2 34

4.90 ± 0.152

(.193 ± .006)

BOTTOM VIEW OF

EXPOSED PAD OPTION

765

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

0.52

(.0205)

REF

1.68

(.066)

1.88

(.074)

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

1.68 ± 0.102

(.066 ± .004)

1.88 ± 0.102

(.074 ± .004) 0.889 ± 0.127

(.035 ± .005)

RECOMMENDED SOLDER PAD LAYOUT

0.65

(.0256)

BSC

0.42 ± 0.038

(.0165 ± .0015)

TYP

0.1016 ± 0.0508

(.004 ± .002)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.05 REF

0.29

REF

MS8E Package

8-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1662 Rev I)

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC4071

4071fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

A 10/10 VLBD specification replaced in Electrical Characteristics section. 3

B 4/11 Updated Vishay thermistor part number. 11, 12, 13,

14, 18

C 10/11 Under Note 2, replaced “=” with “≈”.

Updated IPS MFR’s part numbers.

Updated the application example.

Updated MFR part number on the Typical Application circuit MEC201-10P.

LTC4071

4071fc

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2010

LT 1011 REV C • PRINTED IN USA

relaTeD parTs

Typical applicaTion

Typical Application with 100µF Bypass Capacitor to Support Large Load Pulse

PART NUMBER DESCRIPTION COMMENTS

LTC3105 400mA Step-Up Converter with 250mV

Start-Up and Maximum Power Point Control

A High Efficiency Step-Up DC/DC Converter That Can Operate from Input Voltage As

Low As 200mV. A 250mV Start-Up Capability and Integrated Maximum Power Point

Controller (MPPT) Enables Operation Directly from Low Voltage, High Impedance

Alternative Power Sources Such As Photovoltaic Cells, Thermoelectric Generators

(TEGs) and Fuel Cells. A User Programmable MPPC Set Point Maximizes the Energy

That Can Be Extracted from Any Power Source. Burst Mode

Operation, with a

Proprietary Self Adjusting Peak Current, Optimizes Converter Efficiency and Output

Voltage Ripple Over All Operating Conditions.

LTC3108/

LTC3108-1

Ultralow Power Step-Up Converter and Power

Manager

A Highly Integrated DC/DC Converter Ideal for Harvesting and Managing Surplus

Energy from Extremely Low Input Voltage Sources Such As TEGs (Thermoelectric

Generators), Thermopiles and Small Solar Cells. The Step-Up Topology Operates

from Input Sources As Low As 20mV. The LTC3108 is Functionally Equivalent to the

LTC3108-1 Except for its Unique Fixed VOUT Options.

LTC3388 20V High Efficiency Nanopower Step-Down

Regulator

High Efficiency Step-Down DC/DC Converter with Internal High Side and

Synchronous Power Switches, Draws Only 720nA Typical DC Supply Current at No

Load. 50mA of Load Current, Accurate UVLO Disables Converter and Maintains Low

Quiescent Current State When the Input Voltage Falls Below 2.3V. 10-Lead MSE and

3mm × 3mm DFN Packages.

LTC3588-1 Piezoelectric Energy Harvesting Power Supply

in 3mm × 3mm DFN and MSOP Packages

High Efficiency Hysteretic Integrated Buck DC/DC; 950nA Input Quiescent Current

(Output in Regulation – No Load), 520nA Input Quiescent Current in UVLO, 2.6V to

19.2V Input Operating Range; Integrated Low-Loss Full-Wave Bridge Rectifier, Up to

100mA of Output Current, Selectable Output Voltages of 1.8V, 2.5V, 3.3V or 3.6V.

LTC4054L Standalone Linear Li-Ion Battery Charger in

ThinSOT™

Low Current Version of LTC4054, 10mA ≤ ICHG ≤ 150mA, Thermal Regulation

Prevents Overheating, C/10 Termination, with Integrated Pass Transistor.

LTC4065L Standalone 250mA Li-Ion Battery Charger in

2mm × 2mm DFN

Low Current Version of LTC4065, 15mA ≤ ICHG ≤ 250mA, 4.2V, ±0.6% Float Voltage,

High Charge Current Accuracy: 5%.

LTC4070 Li-Ion/Polymer Shunt Battery Charger System Low 450nA Operating Current, 50mA Maximum Internal Shunt Current, Boostable to

500mA with External PFET

LTC4071

BAT

NTCBIAS

NTC

LBSEL

ADJFLOAT

5V TO 12V

100µF

PULSED

200mA

LOAD

GND

165Ω, 0.5W

GMB031009

OR GS NANO

OR MEC201-10P

VCC

tON = 1ms

4071 TA02

*NTHS0402N02N1002F

10k

LOW DUTY CYCLE

SYSTEM LOAD