intel 1702A 2K (256 x 8) UV ERASABLE PROM 1702A-2 | 0.65 us Max. 1702A 1.0 us Max. 1702A-6 1.5 us Max. = Fast Access Time: Max. 650 ns " Static MOS: No Clocks Required (1702A-2) = Inputs and Outputs DTL and =" Fast Programming: 2 Minutes TTL Compatible for all 2048 Bits = Three-State Output: OR-tie = All 2048 Bits Guaranteed* Capability Programmable: 100% Factory Tested The 1702A is a 256 word by 8-bit electrically programmable ROM ideally suited for uses where fast turn- around and pattern experimentation are important. The 1702A undergoes complete programming and function- al testing prior to shipment, thus insuring 100% programmability. Initially all 2048 bits of the 1702A are in the 0 state (output low). Information is introduced by selectively programming 1's (output high) in the proper bit location. The 1702A is packaged in a 24 pin dual in-line package with a transparent lid. The transparent {id allows the user to expose the 1702A to ultraviolet light to erase the bit pattern. A new pattern can then be written into the device. The circuitry of the 1702A is completely static. No clocks are required. Access times from 650ns to 1.5ys are available. A 1702AL family is available (see 1702AL data sheets for specifications) for those systems requiring lower power dissipation than the 1702A. The 1702A is fabricated with silicon gate technology. This low threshold technology allows the design and pro- duction of higher performance MOS circuits and provides a higher functional density on a monolithic chip than conventional MOS technologies. *Intels liability shall be limited to replacing any unit which fails to program as desired. PIN CONFIGURATION PIN NAMES BLOCK DIAGRAM aati 24 Vpo DATA OUT 1 DATA OUT 8 arte ah Vee Ag-Az _ | AddressInputs | {..------ iz cs Chip Select Input _ ourput Ao 3 2b Vee }- ep nn eS BUFFERS Dout1~Pouts Data Outputs DATA OUT 1-4 4 (LSB) 21h a3 DATA OUT 245 20- Ay [ 2048 BIT OATA OUT 34 6 9h As PROGRAM m4 ROM MATRIX (256 x 8) DATA OUT 4-4 7 18 Ag "DATA OUT -4 8 Wh A, DATA OUT 6] 9 1K Veg DECODER *OATA OUT 74 10 15 F Mew "DATA OUT B-4 11 (MSB) whe CS Vee] 12 13+ PRocRam DRIVERS "THIS PIN IS THE DATA INPUT LEAD DURING PROGRAMMING aA! A Oo 1 7 NOTE: In the read mode a logic 1 at the address inputs and data outputs is a high and lagic 0 is a low. U.S. Patent No. 3660819 4-5 P= ro} x = S foal OoPROM/ROM PIN CONNECTIONS The external lead connections to the 1702A differ, depending on whether the device is being programmed or used in read mode (see following table). In the programming mode, the data inputs 1-8 are pins 4-11 respectively. The programming voltages and tim- ing are shown in the Data Catalog ROM and PROM Programming Instructions section. 1702A PIN 12 13 14 15 16 22 23 24 MODE {Vec) | (Program) (CS) (Vee) | (Vac) (Vec) | (Vec) | (Vpp) Read Vec Vec GND Vec Vac Vec Vec Vpp Programming GND | Program Pulse | GND | Veg Pulsed Vag GND | GND | Pulsed Vpp Absolute Maximum Ratings Ambient Temperature Under Bias -10C to +80C COMMENT Storage Temperature Soldering Temperature of Leads (10 sec) Power Dissipation +300C Le eee 2 Watts Read Operation: Input Voltages and Supply Voltages with respect to Voc Le eee +0.5V to 20V Program Operation: Input Voltages and Supply Voltages with respect to Voc Stresses above those listed under Absalute Maximum Rat- ings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or at any other condition above those indicated in the operational sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for ex- tended periods may affect device reliability. D.C. and Operating Characteristics 1, - 0c to 70, vec = (BY 25%, Vpp = Lav25%, Veg = -9V 5%, READ OPERATION unless otherwise noted. 1702A, 1702A-6 Limits 1702A-2 Limits Symbol Test Min. Typ. [1 Max. Min. Typ.( Max. Unit Conditions hho Address and Chip Select 1 1 BA | Vin = 0.0V Input Load Current lLo Output Leakage Current 1 1 HA | Vout = 0.0V, CS = Vino Ipp1l1) | Power Supply Current 35 50 40 60 mA | CS=Vin2. lo. = 0.0mA, Ta = 25C, Continuous Ipp2 Power Supply Current 32 46 37 55 mA | CS=0.0V,lo_=0.0mA, Ta = 25C, Continuous lop Power Supply Current 38 60 43 65 mA | CS=Vin2, lo. = 0.0mA, Ta = 0C, Continuous ler1 Output Clamp Current 8 14 7 13 mA | Vout= -1.0V, Ta= 0C, Continuous lcr2 Output Ciamp Current 7 13 6 12 mA | Vout =-1.0V, Ta = 25C, Continuous leg Gate Supply Current 1 1 BA Vins Input Low Voltage -1 0.65 -1 0.65 Vv for TTL Interface Vito Input Low Voltage Voo Vec-6 Vpp Vec-6 Vv for MOS Interface Vind Addr. Input High Voltage | Vec-2 Vect0.3 Vec-2 Vect0.3 Vv Viu2 Chip Sel. Input High Volt. | Vc-2 Vect0.3 | Vee-1.5 Vect0.3) V lot Output Sink Current 1.6 4 1.6 4 mA | Vout = 0.45V loo Output Source Current 2.0 -2.0 mA | Vout = 0.0V Voi Output Low Voltage -3 0.45 -3 0.45 lo, = 1.6mA Vou Output High Voltage 3.5 4.5 3.5 4.5 Vv low = -200pA Note 1: Typical values are at nominal voltages and Ta = 25C. 461702A A.C. Characteristics T, =OC to+70C, Vi, =+5V 45%, Voy = ~9V 45%, Vag = 9V +5% unless otherwise noted 1702A 1702A-2 1702A-6 Limits Limits Limits Symbol Test Min. Max. Min. Max. Min. Max. Unit Freq. Repetition Rate 1 1.6 0.66 MHz tou Previous Read Data Valid 0.1 0.1 0.1 ks tacc Address to Output Delay 1 0.65 1.5 Us tes Chip Select Delay 0.1 0.3 0.6 ks = =] tco Output Delay From CS 0.9 0.35 0.9 us = top Output Deselect 0.3 0.3 0.3 us ma . + Capacitance T, = 25C SYMBOL TEST TYPICAL MAXIMUM UNIT CONDITIONS Vin = Vee | All Cin input Capacitance 8 15 pF _IN ce CS = Voc unused pins V, =V are at A.C. Cour Output Capacitance 10 15 pF OUT ce Veg = Vec ground *This parameter is periodically sampled and is not 100% tested. Switching Characteristics Conditions of Test: Input pulse amplitudes: 0 to 4V; t,, te <S0 ns Output load is 1 TTL gate; measurements made at output of TTL gate (tpp<15 ns), C_= 1SpF A) READ OPERATION ~ CYCLE TIME 146 REC) y : i" 10% aporess | ! 90% Vian | elites pe Mu * we ty a! i cs i ' I Mie Vou i DATA i DATA OUT | out 4 INVALID Vor 7 he--~ face ot 47 B) DESELECTION OF DATA OUTPUT IN OR-TIE OPERATION tH ADORESS Xx 3 Mi tc \ Min z ' 10% I s | ' i 90% Mie hea] t | ca I | too fs Vou z I | ) pata DATA OUT | : 1 OUT INVALID \ Vow oe + TPROM/ROM Typical Characteristics ACCESS TIME (ns) to, OUTPUT SINK CURRENT (mA) lay OUTPUT SOURCE CURRENT imA) 4 I o OUTPUT CURRENT VS. Vpp SUPPLY VOLTAGE 5 T T T T = ! I Voc = t5Y ak Yeg > -9Y VoL = +45 gh Ta = 28C : | Specified Operating Range | the > { ~>- i | 1 | 4 | A oss . T t -5 -6 -? -8 |] -9 | -10 _ SUPPLY VOLTAGE (VI I Yoo = *5 |. Veg, = -9V ' Vou = 0.0v Ta > 25C OUTPUT SINK CURRENT VS. OUTPUT VOLTAGE -d 14.0 T t I | i i Ig, OUTPUT SINK CURRENT {mA} 2 4 n p oo 4 i i N OUTPUT VOLTAGE (VOLTS) ACCESS TIME VS. LOAD CAPACITANCE 1TTL'LOAD Veg = +5 Vpp = -9V D0 10 20 30 40 50 60 70 80 90 100 LOAD CAPACITANCE (pF} 1702A 4-8 Ipp CURRENT (mA) ACCESS TIME (ns} lo, QUTPUT SINK CURRENT (mA) Joy OUTPUT SOURCE CURRENT ima) -3 OUTPUT CURRENT VS. TEMPERATURE N\ | L N = Veo = 454 Yop t Veg? -9V Von = .0V 10 20 30 40 50 60 70 80 | AMBIENT TEMPERATURE (C) i ' =-9v | | | dae | p | CS = 0.0V | Ipp CURRENT VS. TEMPERATURE 39 38 37 Voc = +84 _ pp = -9 Veq= - INPUTS = Vog OUTPUTS ARE OPEN = Vee 20 40 60 80 100 AMBIENT TEMPERATURE (C) ACCESS TIME VS. TEMPERATURE $20 1 TTL LOAD = 20 pF Veo = +5V Vpn = -9V Vgg = -9 AMBIENT TEMPERATURE { C} 10 20 30 40 50 6060 70 80 30