Data Sheet No. PD-9.486C INTERNATIONAL RECTIFIER |T@2R REPETITIVE AVALANCHE RATED AND dv/dt RATED HEXFET TRANSISTOR IREM140 o 2N7218 N-CHANNEL JANTX2N7218 JANTXV2E2N7218 s (REF: MIL-S-19500/586) 100 Voit, 0.077 Ohm HEXFET Product Summary The HEXFET technology is the key to International Part Number | BVpss Rps(on) Ip Rectifiers advanced line of power MOSFET transistors. The efficient geometry design achieves very low on-state IRFM140 100V 0.0770 28A resistance combined with high transconductance. FEATURES: The HEXFET transistors also feature all of the well @ Repetitive Avalanche Rating established advantages of MOSFETs such as voitage . control, very fast switching, ease of paralleling and Mf Isolated and Hermetically Sealed temperature stability of the electrical parameters. @ Alternative to TO-3 Package They are well suited for applications such as switching Simple Drive Requirements power supplies and virtually any application where military Il Ease of Paralleling and/or high reliability is required. @ Ceramic Eyelets ma CASE STYLE AND DIMENSIONS wou, tag BOOS ea pee 5-3 0.248) [7 1.27 {0.050) i 13.84 (0.545) i 73.59 (0,535) 12.06 (0.949 Seat (0.260) 4 K 4 (0.249) SSeQ +a fmm (ota aOR) [o 0.250.010) OL] 20.32 (0.800) eee 20.07 (0.790) 2 SOUROE 3 GATE NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M - 1962. 2 ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). Conforms to JEDEC Outline TO-254AA* Dimensions In Millimeters and (Inches) BERYLLIA WARNING PER MiL-S-19500 SEE PAGE 1-300 For leadform configurations see page I-300, fig. 15 1-293IRFM140, JANTXV, JANTX-, 2N7218 Devices Absolute Maximum Ratings Parameter IRFM140, JANTXV, JANTX,, 2N7218 Units Ip @ Vag = 10V, Te = 25C Continuous Drain Current 28 Ip @ Vag = 10V, To = 100C Continuous Drain Current 20 A lpm Pulsed Drain Current 112 Pp @ Te = 25C Max. Power Dissipation 125 w Linear Derating Factor 10 wk Ves Gate-to-Source Voltage 420 v E, Singie Pulse Avalanche Energy @ 250 mJ AS 3 hd (See Fig. 12) 1aR Avalanche Current 28 A (See Ear) E, Repetitive Avalanche Energy 125 mJ AA (See Fig. 13) dvidt Peak Diode Recovery dvidt @ 55 Vins (See Fig. 13) Ty Operating Junction ~55 to 150 Tsta Storage Temperature Range C Lead Temperature 300 (0.063 in. (1.6 mm) from case for 10s) Weight 9.3 (typical) 9 Electrical Characteristics @ Ty = 25c (Unless Otherwise Specified) , Parameter Min. Typ. Max. Units Test Conditions BVpss Drain-to-Source Breakdown Voltage | 100 - - v Vas = OV, Ip = 1.0 mA ABVpgs/ATy Temperature Coefficient of _ 0.13 - viet Reference to 25C, Ip = 1.0 mA Breakdown Voltage Ry Static Drain-to-Source ~ - 0077 Veg = 10V, Ip = 20A DS(on) On-State Resistance a &s D - - 0.125 Vas = 10V, Ip = 284 Vesith) Gate Threshold Voltage 20 - 40 v Vos = Vas, Ip = 250 pA Sts Forward Transconductance 91 - _ S(0) | Vog = 18V, lpg = 20A toss Zero Gate Voltage Drain Current - - 25 Vps = 08 x Max. Rating, Vgg = OV - _ 250 HA Vos = 08 x Max. Rating Veg = OV, Ty = 125C lass Gate-to-Source Leakage Forward - _ 100 nA Vag = 20V less Gate-to-Source Leakage Reverse - - ~100 Vas = -20V Qy Total Gate Charge 30 _ 59 Vag = 10V, Ip = 28A Qgs Gate-to-Source Charge 24 -_ 12 nc Vps = 05 x Max. Rating Qga Gate-to-Drain (Miller) Charge 12 ~ 30.7 See Fig. 6 and 14 tavon) Jurn-On Delay Time - - 2 Vpp = SOV, Ip = 20A, Rg = 9.19 ty Rise Time - - 145 ne ta(oth) Turn-Off Delay Time - - 64 See Fig. 11 i Fall Time - - 105 lp Internal Drain Inductance - a7 _ Measured from the drain Modified MOSFET symbol lead, 6 mm (0.25 in) from | showing the internal nH package to center of die. inductances, lg (nternal Source Inductance - a7 - Measured from the source lead, 6 mm (0.25 in.) from package to source bonding pad. Cigs Input Capacitance - 1660 - Ves = OV. Vpg = 25V Coss Output Capacitance - 550 - pF f = 1.0 MHz Crss Reverse Transfer Capacitance _ 120 - See Fig. 5 Coc Drain-to-Case Capacitance - 12 - |-294IRFM140, JANTXV, JANTX-, 2N7218 Devices Source-Drain Diode Ratings and Characteristics Parameter Min. Typ. Max. Units Test Conditions Ig Continuous Source Current -_ - 28 Modified MOSFET symbol showing the integrat 0 (Body Diode) A Reverse p-n junction rectifier. 8 I Pulsed Source Current ~ _ 12 SM (Body Diode) : Vsp Diode Forward Voltage - - 15 v Ty = 25C, ig = 28A, Vgg = OV @ tre Reverse Recovery Time - _ 400 ns Ty = 25C, if = 284, di/dt = 100 Alps QrR Reverse Recovery Charge - - 29 uC Vpp = 50V ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlied by Lg + Lp. Thermal Resistance Parameter Min. Typ. Max. Units Test Conditions Rinuc Junetion-to-Casa - _ 1.0 Fthus Case-to-Sink _ 0.21 |KAW ] Mounting surface flat, smooth, and greased RinuA dunction-to-Ambient = - 48 Typical socket mount Repetitive Rating: Pulse vigth limited by Isp s 28A, di/dt < 170 Alps, KW = CIW maximum junction temperature (see figure Yop < BVpgs; Ty = 180C WIK = WIC Refer to currant HEXFET reliability report Suggested Rg = 9.1 2 @Vpp = 28, Starting Ty = 25C, i : L > 470 aH, Rg = 250, @ Pulse width s 300 us; Duty Cycle < 2% Peak |, = 284 1-295 :IRFM140, JANTXV, JANTX-, 2N7218 Devices 3. to Ip, DRAIN CURRENT (AMPERES) Ip, ORAIN CURRENT (AMPERES) o 20us PULSE WIDTH 20us PULSE WIDTH Te = 25C Te = 150C 10 10! 10! Vpg. DRAIN-TO-SQURCE VOLTAGE (VOLTS) Vpg ORAIN~TO-SOURCE VOLTAGE (VOLTS) Fig. 1 Typical Output Characteristics, Tc = 25C Fig. 2 Typical Output Characteristics, Tc = 150C 3.0 uw o z a Fas i a a # 2 Zz 2.0 wo 5 2 i N a 8 i.5 a wad o Z o & Zz zz q 3 = 1.0 5 a a 05 Vos = 50V 2 20us PULSE WIDTH = 0.0 Ves = 10V 4 i) ~40 -20 0 20 40 60 80 100 120 140 160 Veg, GATE-TO-SOURCE VOLTAGE (VOLTS) Ty, JUNCTION TEMPERATURE ( C } Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance Vs. Temperature 1-296.IRFM140, JANTXV, JANTX., 2N7218 Devices 3000 2400 1800 1200 C, CAPACITANCE (pf) 600 Veg GATE-TO-SOURCE VOLTAGE (VOLTS) 104 Vpg, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Fig. 5 Typical Capacitance Vs. Drain-to-Source Voltage Igp, REVERSE DRAIN CURRENT (AMPERES) Ip. DRAIN CURRENT (AMPERES) Ves = OV 0.4 . : 4.0 1 1.4 1.6 Von, SOURCE-TO-DRAIN VOLTAGE {VOLTS) Fig. 7 Typical Source-Drain Diode Forward Voltage 1-297 tw ao nn an fo n a Fig. 6 Typical Gate Charge Vs. Gate-to-Source Voitage 103 102 1 QO. Ip = 1 SEE FIGURE 14 Qg, TOTAL GATE CHARGE (nC) OPERATION IN THIS AREA LIMITED Fos (ON t Ty=150C SINGLE 2 5 4 2 5 40 2 5 492 2 Vps. ORAIN-TO-SOURCE VOLTAGE (VOLTS) Fig. 8 Maximum Safe Operating Area 103IRFM140, JANTXV, JANTX-, 2N7218 Devices DRAIN CURRENT (AMPERES) Ip 10 54 N Ww Oo za ao a. wo us Cc a 0.4 = Cc lu x= rE SINGLE PULSE (THERMAL RESPONSE) 40 405 10-4 103 Pon lot pf [ee ea NOTES: 1. DUTY FACTOR, D=t1/t2 2. PEAK Tj=Pom X Zthjc + Te 40-2 0.1 4 10 t4, RECTANGULAR PULSE DURATION (SECONDS) Fig. 9 Maximum Effective Transient Thermal !mpedance, Junctlon-to-Case Vs. Pulse Duration 25 50 75 100 425 Tc. CASE TEMPERATURE { C) Fig. 10 Maximum Drain Current Vs. Case Temperature 150 R 0 Vos WV Vas D.U.T. L . 7. Vpp Pulse Width S$ tps Duty Factor <0.1% zr Fig. 11a Switching Time Test Circuit Vos 90% 10% Ves taion) tr tam tt Fig. 11b Switching Time Waveforms 1-298IRFM140, JANTXV, JANTX-, 2N7218 Devices . Vp: 0 Vary tp to obtain required peak I. 5 0.200 > oO ao ld z Wo. Lu a = a & Fig. 12a Unclamped Inductive Test Circuit Wo, @ Zz wal a go. << lui Vos 0. STARTING Ty, JUNCTION TEMPERATURE (c) |-- Fig. 12 Maximum Avalanche Energy Vs. Starting Fig. 12b Unclamped Inductive Waveforms Junction Temperature @ Driver Gate Drive Pw + AL. . A Period D= (i D.U.T, Circuit Layout Considerations PW Period k- + Low Stray Inductance &) @ + Ground Plane + Low Leakage Inductance Current Transformer SS +< - @ D.U.T. Igp Waveform >] Reverse . Recovery. Body Diode Forward Current Current viet Jf @ D.U.T. Vpg Waveform i Oiode Recovery \ _. | + dvdt controlled by Re -Apoli L , Pees + Driver same type as D.U.T. Re apple Body Diode a, Voltage Forward Dro| * Isp controlled by Duty Factor "D" Vo Inductor Current P * D.U.T. - Device Under Test Ripple < 5% Vas = 5V tor Logic Level Devices Fig. 13 Peak Diode Recovery dv/dt Test Circuit |-299IRFM140, JANTXV, JANTX-, 2N7218 Devices Current Regulator "SameType | | as DUT. 0 ) | | ul KQ 4) Hove 2 oe S NEY | l | MW + 0.3)F | Yee to | D.U.T. 10V ae, A Ves 4 Vo 3mAE [1 Charge Ig Ip Vos Current Sampling Resistors Fig. 14a Basic Gate Charge Waveform Fig. 146 Gate Charge Test Circuit 43.84 (0.545) 3.78 (0.149) 6.60 (0.260) * SO 73.59 (0-535) reel aN ye rN = 17.40 (0.885) 20.32 (0.800) 5.8 0. TOR 20.07 (0.790) 43.84 (0.545) 21.98 (0.865) ~ 13,59 (0.505) 35.98 (0.825) 12 3 1 1214 (0.045) 4.01 (0.158) ba ax 9 COTE | et 988 O08) 56 0.142) 2x Lote bese Corer tetas) 0. 25 (0. 10 M) LEGEND f gol] 1 ORAIN 2 SOURCE 3 GATE NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M - 1982. 2 ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 3. LEADFORM IS AVAILABLE IN EITHER ORIENTATION: EXAMPLE: IRFM140D [3.2] EXAMPLE: iRFMt40U v UR 710.42 (0.005) 27 (0.050) 02 (0.040) 1.52 A 60) R gt 4.83 (0.190) 3.81 (0. 150) Fig. 15 Optional Leadforms for Outline TO-254 BERYLLIA WARNING PER MIL-S-19500 Packages containing beryilla shall not be ground, sandbtasted, machined, or have ather operations performed on tham which will produce beryllia or beryllium dust. Furthermore, beryllium oxide packages shall not be placed in acids that wilt produce. fumes containing beryltium. 1-300