NL3HS3124A 3.3 V, 2 Channel, 2:1 Differential Mux/Demux The NL3HS3124A is a 2 channel, 2-to-1 differential multiplexer / demultiplexer for USB 3.0, PCI Express Generation 3, or other high-speed serial interface applications. The NL3HS3124A can switch two differential signals to one of two locations. The device has minimal channel-to-channel skew as well as minimal channel-to- channel crosstalk, making the device ideal for high-speed serial interface applications. www.onsemi.com Features * * * * * * * * * * * * * * * 2 Bidirectional Channel, 2 : 1 Differential Multiplexer/Demultiplexer High-speed Signal Switching for 8 Gbps Applications High Bandwidth: > 6.3 GHz at -3 dB Low Insertion Loss: -0.5 dB at 100 MHz -2.8 dB at 4.0 GHz Low Return Loss: -9.27 dB at 4 GHz Low Crosstalk: -35 dB at 4 GHz Low Off-state Isolation: -19 dB at 4 GHz Low Intra-pair Skew: 5 ps Typical Low Inter-pair Skew: 35 ps Maximum VDD Operating Range: 3.0 V to 3.6 V Shutdown Pin (SD) for Power-saving Mode Standby Current less than 1 mA ESD Tolerance: 4000 V HBM 300 V MM 2000 V CDM 2.5 mm x 4.5 mm QFN20 Package This Device is Pb-Free, Halogen-Free/BFR-Free and is RoHS-Compliant Applications * Routing of High-speed Differential Signals December, 2016 - Rev. 1 MARKING DIAGRAM 1 3HS3 124A ALYWG G 3HS3124A = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping NL3HS3124AMNTWG QFN20 (Pb-Free) 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. USB 3.0 PCIe Gen3 DisplayPort 1.2 SATA 6 Gbps (c) Semiconductor Components Industries, LLC, 2016 QFN20 MN SUFFIX CASE 485AA 1 Publication Order Number: NL3HS3124A/D NL3HS3124A Figure 1. Typical Application Figure 2. Block Diagram Table 1. FUNCTION TABLE SD SEL Function L L An connected to Bn L H An connected to Cn H X An, Bn and Cn in Hi-Z, Device in Shutdown www.onsemi.com 2 VDD GND NL3HS3124A 1 20 SD 2 19 B0P A0P 3 18 B0N A0N 4 17 B1P GND 5 16 B1N VDD 6 15 C0P A1P 7 14 C0N A1N 8 13 C1P SEL 9 12 C1N 11 GND VDD 10 Figure 3. Pinout (Top Through View) Table 2. PIN ASSIGNMENT Pin Name Pin Type A0P 3 I/O A0N 4 I/O A1P 7 I/O A1N 8 I/O B0P 19 I/O B0N 18 I/O B1P 17 I/O B1N 16 I/O C0P 15 I/O C0N 14 I/O Description Channel 0, Port A Differential Signal I/O Channel 1, Port A Differential Signal I/O Channel 0, Port B Differential Signal I/O Channel 1, Port B Differential Signal I/O Channel 0, Port C Differential Signal I/O Channel 1, Port C Differential Signal I/O C1P 13 I/O C1N 12 I/O SEL 9 Input (CMOS) Mux/Demux Select Pin SD 2 Input (CMOS) Shutdown Pin VDD 1, 6, 10 Power Power GND 5, 11, 20, Center Pad Power Ground www.onsemi.com 3 NL3HS3124A Table 3. MAXIMUM RATINGS Symbol Rating VDD Positive DC Supply Voltage VIN Digital Control Input Voltage (SEL, SD) Ts Storage Temperature ESD Value Unit -0.5 to +4.6 V -0.5 to VDD+0.5 V -65 to +150 C V ESD Performance HBM (JESD22-A114) All Pins 4000 MM (JESD22-A115-A) All Pins 300 CDM (JESD22-C101) All Pins 2000 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 4. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ 3.0 3.3 Max Unit VDD Positive DC Supply Voltage 3.6 V VIN Digital Control Input Voltage (SEL, SD) (Note 1) 0 VDD V VIS Differential Pin Input Voltage (An, Bn, Cn) 0 2.4 V VIC Common-Mode Input Voltage (An, Bn, Cn) 0 2 V VID Differential Input Voltage (An, Bn, Cn), peak-to-peak 0 1.6 V TA Operating Temperature -40 85 C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 1. Control input must be held High or Low. It must not float. Table 5. DC ELECTRICAL CHARACTERISTICS Voltages referenced to GND. All typical values are at TA = 25C unless otherwise specified. TA = -40C to +85C Symbol Parameter Conditions VCC (V) Min 2.0 Typ Max Unit VIH Input Voltage High SEL, SD 3.0 - 3.6 VIL Input Voltage Low SEL, SD 3.0 - 3.6 0.5 V IIN Input Leakage Current SEL, SD: VIN = 0 V or VDD 3.6 5 mA IIS Switch Input Leakage Current An, Bn, Cn: VIS = 0 V or 2.4 V 3.6 IDD Supply Current Operating mode: SD = L 3.6 Shutdown mode: SD = H 3.6 www.onsemi.com 4 V 0.2 10 mA 1 mA 1 mA NL3HS3124A Table 6. DYNAMIC CHARACTERISTICS Voltages referenced to GND. All typical values are at TA = 25C unless otherwise specified. TA = -40C to +85C Symbol DDIL Parameter Condition Differential Insertion Loss VCC (V) Min Typ Max 3.0 - 3.6 Channel OFF Unit dB f = 4 GHz -19 f = 100 MHz -47 f = 4 GHz -2.8 f = 100 MHz -0.5 Channel ON DDNEXT BW DDRL Differential Near-End Crosstalk Adjacent Channels ON 3.0 - 3.6 dB f = 4 GHz -26 f = 100 MHz -62 -3 dB Bandwidth Differential Return Loss f = 4 GHz 3.0 - 3.6 6.3 GHz 3.0 - 3.6 -9.27 dB f = 100 MHz RON CIO(ON) Switch ON Resistance (Note 2) VIS = 2 V, IIS = 19 mA ON-State Input/Output Capacitance f = 2.5 GHz -23.2 3.3 6 W 3.0 - 3.6 2.03 pF 2. Measured by the voltage drop between A and B pins at the indicated current through the switch. ON resistance is determined by the lower of the voltage on the two (A or B ports). Table 7. SWITCHING CHARACTERISTICS All typical values are for VCC = 3.3 V at TA = 25C unless otherwise specified. TA = -405C to +855C Symbol tSTARTUP Parameter Condition VCC (V) Startup Time Supply Voltage Valid, or SD going Low to channel specified operating conditions 3.0 - 3.6 Port A to Port B or C, or vice-versa 3.0 - 3.6 Min Typ Max Unit 10 ms tPD Propagation Delay tPZH OFF-State to High Propagation Delay 3.0 - 3.6 300 ns tPZL OFF-State to Low Propagation Delay 3.0 - 3.6 70 ns tPHZ High to OFF-State Propagation Delay 3.0 - 3.6 50 ns tPLZ Low to OFF-State Propagation Delay 3.0 - 3.6 50 ns tsk(dif) tsk Differential Skew Intra-pair 3.0 - 3.6 Skew Inter-pair 3.0 - 3.6 www.onsemi.com 5 60 ps 5 ps 35 ps NL3HS3124A Output 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control. Output 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control. The outputs are measured one at a time with one transition per measurement. Figure 4. Voltage Waveforms, Enable and Disable Times CL = load capacitance; includes jig and probe capacitance. RT = termination resistance; should be equal to Zo of the pulse generator. All input pulses are supplied by generators having the following characteristics: PRR 5 MHz; Zo = 50 W; tr 2.5 ns; tf 2.5 ns. Figure 5. Test Circuit for Switching Times Figure 6. Test Circuit Table 8. LOADING CONDITIONS FOR SWITCHING/TIMING TESTS Load Test CL RL Switch tPLZ, tPZL (Output on B Side) 50 pF 200 W 2 x VIC tPHZ, tPZH (Output on B Side) 50 pF 200 W GND 200 W Open tPD www.onsemi.com 6 NL3HS3124A PACKAGE DIMENSIONS QFN20, 2.5x4.5 MM CASE 485AA ISSUE B D A EEE EEE EEE EEE EEE PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. B DIM A A1 A3 b D D2 E E2 e K L E 2X 0.15 C 2X 0.15 C TOP VIEW MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.50 BSC 0.85 1.15 4.50 BSC 2.85 3.15 0.50 BSC 0.20 --0.35 0.45 0.10 C A 20X 0.08 C (A3) A1 SIDE VIEW C SEATING PLANE D2 e 11 20X L 9 12 e E2 20X b 0.10 C A B 0.05 C NOTE 3 19 2 1 20 20X K BOTTOM VIEW ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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