.. ,. ANALOG W DEVICES IntegratedCircuit PrecisionInstrumentation Amplifier AD521 [ FEATURES Programmable Gains from 0.1 to 1000 Differential Inputs High CMRR: 11OdBmin Low Drift: 2p.Vfc max (L) Complete Input Protection, Power ON and Power OFF Functionally Complete with the Addition of Two Resistors Internally Compensated Gain Bandwidth Product: 4OMHz Output Current Limited: 25mA Very LowNoise: 05p.V p-p, 0.1Hzto 10Hz, RTI (I G -1000 Chips are Available Not Reco mme PRODUCT DESCRIPTION The AD521 is a second generation, low cost, monolithic IC instrUmentation amplifier developed by Analog Devices.As a trUe instrUmentation amplifier, the AD521 is a gain block with differential inputs and an accurately programmable input/ output gain relationship. The AD521 IC instrUmentation amplifier should not be confused with an operational amplifier, although several manufactUrers(including Analog Devices)offer op amps which can be used as building blocks in variable gain instrumentation amplifier circuits. Op amps are general-purpose components which, when used with precision-matched external resistors, can perform the instrUmentation amplifier function. nded An instrumentation amplifier is a precision differential voltage gain device optimized for operation in a real world environment, and is intended to be used wherever acquisition of a useful signal is difficult. It is characterized by high input impedance, balanced differential inputs, low bias currents and high CMR. As a complete instrUmentation amplifier, the AD521 requires only two resistors to set its gain to any value between 0.1 and 1000. The ratio matching of these resistors does not affect the high CMRR (up to 120dB) or the high input impedance (3 X 109il) of the AD521. Furthermore, unlike most operational amplifier-based instrUmentation amplifiers, the inputs are protected against overvoltagesup to :1:15volts beyond the supplies. The AD521 IC instrumentation amplifier is available in four different versions of accuracy and operating temperatUre range. The economical "J" grade, the low drift "K" grade, and the lower drift, higher linearity "L" grade are specified from 0 to 01::\/ 1\ I PIN CONFIGURATION + INPUT I 1 141 ~AIN GAI~ 12 131 ~ALE OFFSET TRIMI 4 OFFSET TRIMI 8 9 OUTPUT 81 v+ I 7 a I COMPo +70C.The "S" grade guarantees performance to specification over the eXtended temperatUre range: -SSoC to +125C. PRODUCT HIGHLIGHTS 1. The ADS21 is a trUe instrumentation amplifier in integrated circuit form, offering the user performance comparable to many modular instrumentation amplifiers at a fraction of the cost. for n ew D esig 2. The AD521 has low guaranteed input offset voltage drift (21lVf C for L grade) and low noise for precision, high gain applications. ns 3. The AD521 is functionally complete with the addition of two resistors. Gain can be preset from 0.1 to more than 1000. 4. The AD521 is fully protected for input levelsup to 15V beyond the supply voltages and JOV differential at the inputs. 5. Internally compensated for all gains, the AD521 also offers the user the provision for limiting bandwidth. 6. Offset nulling can be achieved with an optional trim pot. 7. The AD521 offers superior dynamic performance with a gain-bandwidth product of 40MHz, full peak response of 100kHz (independent of gain) and a settling time of 5p.s to 0.1% of a 10V step. -~ ~-- ~_. ~ AD521-SPECIFICATIONS (typical @ Vs = :t15V, RL= ~ AD521JD GAIN Ra..e (For Spocified Operation, Note I) Equation Error from Equation Nonlin..rity (NatO 2) I..G<IOOO G. Rs/RC V/V (to.25~.004G)% Gain Temporaturo C""fficient OUTPUT CHARACTERISTICS t(3 to.05G)fmtC RatOd Output Output at Maximum Oporati.. Temporaturo Impodance DYNAMIC RESPONSE Small Signal Bandwidth (13dB) G=I G= 10 G= 100 G = 1000 Small Signal, t1.0% Flatn..s G=I G= 10 G= 100 G = 1000 Full Peak Response (NatO 3) Skw RatO, I..G ..1000 Settling Time (any 10V stOp to within 10mV of Final Value) G-I G= 10 UOV, tlOmA min tlOV @ SmA min 0.10 Not Reco AD521KD +25Cunlessotherwisespecified) AD521SD AD5HW (AD5HSDI883B) . t(l5 to.4G)fmtc I to 1000 0.2% max 0.1% max >2MHz 300kHz 200kHz 40kHz 75kHz 26kHz 24kHz 6kHz 100kHz 10V/lis 711' 511S lOlls 35l1s G. 100 G.lOOO DifforcntiaJ Overload Recovery (130V Input to within 10mV of Final Value) (NatO 4) G - 1000 2kO and TA = mme SOliS Common Mode StOp Recovery (30V Input to within 10mV of Final Value) (NatO 5) G =1000 VOLTAGE OFFSET (may be nulled) Input Offset Voltage (Vas,) vs. Temporature vs. Supply Output Offset Voltage (Vaso) vs. Temporature vs. Supply (Narc 6) nded lOllS 3mV max (2mV typ) 1511VtC max (7I1VtC typ) 311V/% 4OOmV max (200mV typ) 4OOIIVtCmax (l50IlV!':C typ) 0.005VOSO/% l.5mV max (0.5mV ryp) 511VtC max (l.5I1Vfc typ) l.Omv max (0.5mV typ) 2IIV/.C max 200mV max (30mV typ) 150llVfc max (50IlV!':C typ) lOOmV max 7511VtCmax 80nA max InAtC max 2 %IV 20nA max 4OnA max 250pAtC 125pAtC INPUT CURRENTS Input vs. vs. Input vs. INPUT Bias Current (either input) Temporature Supply Offser Current Temporature Differential Input Impodance (NatO 7) Common Mode Input Impedance (NatO 8) Input Voltage Range for Specified Poriorrnance (with rospect to ground) Maximum Voltage without Damage to Unit, Power ON or OFF Differential Mode (Note 9) Voltage at either input (Narc 9) Common Mode Rejection Ratio, DC to 60Hz with IH1 source unbalance Gol GolO GolOO G . 1000 max Oporati!ll Voltage Ra..e Quincent Supply Current TEMPERATURE RANGE Spooned Performance Oporating Storage . 500pAfC max . ew . D esig 10nA max max ns 3 x 1O911111.8pF 6 x lO'O11113.0pF tlOV 30V Vs tl5V 70dB min (74dB typ) 90dB min (94dB typ) lOOdB min (l04dB typ) lOOdB min (lIOdB typ) NOISE Voltage RTO (p-p)@O.IHz to 10Hz (Narc 10) RMS RTO, 10Hz to 10kHz Input Current, rms, 10Hz to 10kHz REFERENCE TERMINAL Bias Current Input Resistance Voltage Range Gain to Output POWER SUPPLY fo. r n 74dB min (80dB typ) 94dB min (lOOdB typ) 1O4dB min (l14dB typ) - llOdB min (l20dB trP,) - - 311A IOM11 tlOV I - t5V to U8V SmA max 0 to +70.C -25.C to +85.C -65.C to +150.C -55.Cto+125.C -55.C to +125.C -- Specificatiom AD521JD. ooSpec:if'ocatioaa AD5Z1KD. Specificatioaaoubjoct10 <!wit< without DOO. --- -- - -------- REV.A ~ Applying the AD521 [ NOTES: 1. Gains below 1 and above 1000 are obtained by simply adjusting the gain setting resistors. (Input voltage should be restricted to :t10V for gains equal to or less than 1.) 2. Nonlinearity is defined as the ratio of the deviation from the "best straight line" through a full scale output range of 1:9volts. With a combination of high gain and :tlO volt output swing, distortion may increase to as much as 0.3%. 3. Full Peak Response is the frequency below which a typical amplifier will produce full output swing. 4. Differential Overload Recovery is the time it takes the amplifier to recover from a pulsed 30V differential input with 15V of common mode voltage, to within 10mV of final value. The test input is a 30V, 10,us pulse at a 1kHz rate. (When a differential signal of greater than 11V is applied between the inputs, transistor clamps are activated which drop the exces!' input voltage across internal input resistors. If a continuous overload is maintained, power dissipated in these resistors causes temperatUre gradients and a corresponding change in offset voltage, as well as added thermal time constant, but will not damage the device.) Not Reco mme 5. Common Mode Step Recovery is the time it takes the amplifier to recover from a 30V common mode input with zero volts of differential signal to within 10mV of final value. The test input is 30V, 10,us pulse at a 1kHz rate. (When a com- nded ORDERING GUIDE Model Temperature Range AD52lJD AD52IKD AD521LD AD521SD AD521SD/883B2 AD52lJ Chips AD521K Chips AD521S Chips 14-Pin Ceramic 14-Pin Ceramic 14-Pin Ceramic - 55C to + 125C 14-Pin Ceramic - 55C to + 125C 14-Pin Ceramic DoC to + 7DoC Die Die DoC to + 7DoC - 55C to + 125C Die 6. Output Offset Voltage versus Power Supply includes a constant 0.005 times the unnulled output offset per percent change in either power supply. If the output offset is nulled, the output offset change versus supply change is substantially reduced. 7. Differential Input Impedance is the impedance between the two inputs. 8. Common Mode Input Impedance is the impedance from either input to the power supplies. 9. Maximum Input Voltage (differential or at either input) is 30V when using :t15V supplies. A more general specification is that neither input may exceed either supply (even when Vs = 0) by more than 15V and that the difference between the two inputs must not exceed 30V. (See also Notes 4 and 5.) 10. O.lHz to 10Hz Peak-to-Peak Voltage Noise is defined as the maximum peak-to-peak voltage noise ovserved during 2 of 3 separate 10 second periods with the test circuit of Figure 8. for n ew D METALIZATION Description DoC to + 7DoC DoC to + 7DoC DoC to + 7DoC mon mode signal greater than Vs -o.5V is applied to the inputs, transistor clamps are activated which drop the excessive input voltage across internal input resistors. Power dissipated in these resistors causes temperatUre gradients and a corresponding change in offset voltage, as well as an added thermal time constant, but will not damage the device.) DIP DIP DIP DIP DIP esig PHOTOGRAPH Dimensions shown in inches and (mm). Contact factory for latest dimensions. Package Option! D-14 D-14 D-14 D-14 D-14 ns NOTES IFor outline information see Package Information 2Standard military drawing available. section. 14 RGAIN 1 +INPUT ~ 2 R GAIN 8BLA 3 -INPUT 4 OFFSET TRIM 5 -Vs 6 OFFSET TRIM 0.110 {2.8001 fN~TRf !MFNTA TfnN AMP! !FfFR.C; 4-,ffl; a AD521 DESIGN PRINCIPLE Figure 1 is a simplified schematic of the AD521. A differential input voltage, VIN,appears across RG causing an imbalance in the currents through Ql and <l2,~I=VIN/RG' That imbalance is forced to flow in Rs because the collector currents of Q3 and <4 are constrained to be equal by their biasing (current mirror). These conditions can only be satisfied if the differential voltage across Rs (and hence the output voltage of the AD521) is equal to ~I X Rs. The feedback amplifier, ApB performs that function. Therefore, VOUT= V~ X Rs or - Rs VIN ~ VOUT - +V VON I-IrQ VOUT Not V,N "'RI. 1IQ OR-VOUT.,," v-. Reco mme t'x 'i CURRENT IX Ira 5. Use the compensation pin (pin 9) and the applicable compensation circuit when the amplifier is required to drive a capacitive load. It is worth mentioning that coaxial cables can '~invisibly" provide such capacitance since many popular coaxial cables display capacitance in the vicinity of 3OpF per foot. This compensation (bandwidth control) feature permits the user to fit the response of the AD521 to the particular application as illustrated by Figure S. In cases of extremely high load capacitance the compensation circuit may be changed as follows: 1. 2. 3. 4. SENSE nded t 4. Do not exceed the allowable input signal range. The linearity of the ADS21 decreases if the inputs are drivenwithin 5 volts of the supply rails, particularly when the deviceis used at a gain less than 1. To avoidthis possibility,attenuate the input signal through a resistive divider networkand use the ADS21 as a buffer, as shown in Figure 4. The resistor R/2 matches the impedance seen by both AD521 inputs so that the voltage offset caused by bias currents will be minimized. .' ~~, MIRROR V- Figure 7. Simplified AD527 Schematic Reduce 680n to 24n Reduce BOn to 7.5n Increase 1000pF to O.IJ,LF Set Cx to 1000pF if no compensation was originally used. Otherwise, do not alter the original value. for n This allows stable operation for load capacitances up to 3000pF, but limits the slew rate to approximately 0.16VIJ,Ls; ew D will be transmitted These notes ensure the AD521 will achieve the high level of performance necessary for many diversified IA applications. 3. The resistors betWeen pins 10 and 13, (RSCALE) must equal l00kn :t15% (Figure 2). If RSCALE is too low (below 85kn) the output swing of the AD521 is reduced. At values below 80kU and above 120kU the stability of the AD521 may be impaired. - --- with little or no OUTPUT -IN . - ns the output +IN OUTPUT SIGNAL COMMON 2. Provide a return path to ground for input bias currents. The AD521 is an instrumentation amplifier, not an isolation amplifier. When using a thermocouple or other "floating" source, this return path may be provided directly to ground or indirectly through a resistor to ground from pins 1 and/ or 3, as shown in Figure 3. If the return path is not provided, bias currents will cause the output to saturate. The value of the resistor may be determined by dividing the maximum allowable common mode voltage for the application by the bias current of the instrumentation amplifier. - - V- to V+ 1. Gains below 1 are realized by adjusting the gain setting resistors as shown in Figure 2 (the resistor, as betWeen pins 10 and 13 should remain 100kn :1:15%,see application note 3). For best results, the input voltage should be restricted to :tl0V even though the gain may be less than 1. See Figure 6 for gains above 1000. - from attenuation. Therefore, it is advisable to decouple the Vsupply line to the output common or to pin 11.1 APPLICATION NOTES FOR THE AD521 -- esig 6. Signals having frequency components above the Instrumentation Amplifier's output amplifier closed-loop bandwidth -- GAIN VALUE OF RO 0.1 1 10 100 1000 1I0Il1 1(JOkS1 101<!J 1k!1 100!J Figure 2. Operating Connections for AD527 I For further details, refer to "An I.C. User's Guide to Decoupling, Grounding, and Making Things Go Right for a Change," by A. 'ceS Paul Brokaw. This application note is available from Analog Devi without charge upon request. REV. A - -- - -- - j - ~ [ AD521 R. INPUT OFFSET AND OUTPUT OFFSET When specifying offsets and other errors in an operational amplifier, it is often convenient to refer these errors to the inputs. This enables the user to calculate the maximum error he would see at the output with any gain or circuit configuration. An op amp with 1mV of input offset voltage, for example, would produce 1V of offset at the output in a gain of 1000 configuration. ~ ":' In the case of an instrumcntation amplifier, where the gain is controlled in the amplifier, it is more convenient to separate errors into two categories. Those errors which simply add to the output signal and are unaffected by the gain can be classified as output errors. Those which act as if they are associated with the input signal, such that their effect at the output is proportional to the gain, can be classified as input errors. a). Transformer Coupled, Direct Return R. ~ Not As an illustration, a typical ADS21 might have a +30mV output offset and a -o.7mV input offset. In a unity gain configuration, the total output offset would be +29.3mV or the sum of the tWo. At a gain of 100, the output offset would be -40mV or: 30mV + 100(-o.7mV) =-40mV. b). Thermocouple, Direct Return Reco R. mme nded c). AC Coupled, Indirect Return Figure3. Ground Rerums for "Floating" Transducers VOUT 1. ~~~~~:~~:~CK UPGAINLOSTBYR INPUT SIGNAL MUST BE REDUCED IN PROPORTION TO POWER SUPPLY VOLTAGE for n =input error + (output Total Error R.T.O. =(Gain x input error) ew D Total Error R.T.I. + output error esig The offset trim adjustment (pins 4 and 6, Figure 2) is associated primarily with the output offset. At any gain it can be used to introduce an output offset equal and opposite to the input offset voltage multiplied by the gain. As a result, the total output offset can be reduced to zero. ns RI LEVEL Figure 4. Operating Conditions for V/~VS= error/gain) As shown in Figure 6, the gain range on the ADS 21 can be extended considerably by adding an attenuator in the sense terminal feedback path (as well as adjusting the ratio, Rs/~). Since the sense terminal is the inverting input to the output amplifier, the additional gain to the output is controlled by Rl and Rz. This gain factor is 1 + Rz/Rl' 7 2. By separating these errors, one can evaluate the total error independent of the gain settings used, similar to the situation with the input offset specifications on an op amp. In a given gain configuration, both errors can be combined to give a total error referred to the input (R.T.I.) or output (R.T.O.) by the following formula: 10V V, V+ VOUT + Villi GAIN. ~ R2 V2 RO R, OUTPUT COMMON VOUT V- 1 Cx = 10fJ1rftwhen ft is the desired bandwidth. (ft in kHz, Cx in J.l.F) . [VREF +(~)(VI - V2)][R' ;,R2] Figure6. Circuit for utilizing some of the unique features of the AD521. Note that gain changesintroduced by changing R1 and R2 will have a minimum effect on output offsst if the offsst is carefully nulled at the highest gain setting. Figure 5. Optional Compensation Circuit R~lL--l1 INSTRUMENTA nON AMPLIFIERS 4-21 a ~ AD521 RS Where offset errors are critical, a resistor equal to the parallel combination of Rl and Rz should be placed between pin 11 and VREF. This minimizes the offset errors resulting from the input current flowing in Rl and Rz at the sense tenninal. Note that gain changes introduced by changing the Rl/Rz attenuator will have a minimum effect on output offset if the offset is carefully nulled at the highest gain setting. When a predetennined output offset is desired, VREF can be placed in series with pin 11. This offset is then multiplied by the gain factor 1 + R2/Rl as shown in the equation of Figure 6. +15V I I L VOUT= VIN~ RG VCM - -.4'}--------'- Figure 7. Ground loop elimination. The reference input, Pin 11, allows remote referencing of ground potential. Differences in ground potentials are attenuated by the high CMRR of the AD521. lOOk I 3Oon 1 Not RG VIN HFlOOk Reco IOk 8 1 14 O.,&,.FT I mme CHART RECORDER lOOk ---tt- nded F 3Oon O.I&,.F I I -15V - =1 2.5j.F for n I 10Mn ew D Figure 8. Test circuit for measuring peak to peak noise in the bandwidth 0.1Hz to 10Hz. Typical measurements are found by reading the maximum peak to peak voltage noise of the device under test fD.U. T.) for 3 observation periods of 10 seconds each. - - --- - - - esig --- COMMON ns --- REV.A - ~