56E D MM 31429557? O00e00 653 MELA oHIGH PTS, ANALOG: lecharat CIRCUITS a | ELANTEC INC T-78-06-(O Features 400 MHz gain-bandwidth product Gain-of-2 stable * Ultra low video distortion = 0.01% /0.015 @ NTSC/PAL * Conventional voltage-feedback topology Low offset voltage = 200 nV Low bias current = 2 pA * Low offset current = 0.1 uA * Output current = 50 mA over temperature * Fast settling = 13 ns to 0.1% Low distortion = ~55 dB HD2, 70 dB HD3 @ 20 MHz, 2 Vpp, Ay = +2 Applications * High resolution video Active filters/integrators High-speed signal processing * ADC/DAC buffers Pulse/RF amplifiers * Pin diode receivers Log amplifiers * Photo multiplier amplifiers * High speed sample-and-holds Ordering Information PartNo. Temp.Range Package Outline # EL2074CN _0C to +: 75C 8-Pin P-DIP_MDP0031 EL2074CS OC to + 75C 8-Lead SO MDP0027 EL2074J /883B 55C to + 125C8-Pin CerDIP MDP0010 General Description The EL2074 is a precision voltage-feedback amplifier featuring a 400 MHz gain-bandwidth product, fast settling time, excellent differential gain and differential phase performance, and a mini- mum of 50 mA output current drive over temperature. The EL2074 is gain-of-2 stable with a 3 dB bandwidth of 400 MHz at Ay = +2. It has a very low 200 pV of input offset voltage, only 2 uA of input bias current, and a fully symmetri- cal differential input. Like all voltage-feedback operational am- plifiers, the EL2074 allows the use of reactive or non-linear components in the feedback loop. This combination of speed and versatility makes the EL2074 the ideal choice for all op- amp applications at a noise gain of 2 or greater requiring high speed and precision, including active filters, integrators, sam- ple-and-holds, and log amps. The low distortion, high output current, and fast settling makes the EL2074 an ideal amplifier for signal-processing and digitizing systems. Elantec products and facilities comply with MIL-STD-883 Re- vision C, MIL-I-45208A, and other applicable quality specifica- tions. For information on Elantecs military processing, see Elantec document, QRA-2: Elantecs Military Processing, Monolithic Integrated Circuits. Connection Diagram DIP and SO Package xe [7] - Pa ]Nc in- [2] 7] v+ n+ [3] [6] OUT v- [5] NC 2074-1 OFLOG IA /FL00 TH 1-213 A497 2661 JsnsnyEL2074/ EL207 56E D) 3he45s? O00ee01 ant. meELAT | EL2074/EL2074C ol ANTEC 1 INC 400 MHz GBWP Gain-of-2 Stable Uperational Amplifi [ee Absolute Maximum Ratings (71, = 23c) Supply Voltage (Vs) +7V Lead Temperature Output Current Output is short-circuit protect- DIP Package 300C ed to ground, however, maxi- (Soldering: <5 seconds CN mum reliability is obtained if <10 seconds J) lour does not exceed 70 mA. SO Package Common-Mode Input +Vs Vapor Phase (60 seconds) 215C Differential Input Voltage 5V Infrared (15 seconds) 220C Thermal Resistance Oy, = 95C/W P-DIP Junction Temperature 175C Oya = 125C/W CerDIP Storage Temperature 60C to + 150C Oya = 175C/W S08 Note: See EL2071/EL2171 for Thermal Impedance curves. Operating Temperature EL2074 55C to + 125C EL2074C OC to + 75C Important Note: - epee All parameters. having Min/Max specifications a are guaranteed. The Test Level 1 human invilcates specific device rformed during production and Quality inspection. Elantec performs most ectrical jodern high-speed ee the LIXI7 Series system. Unless otherwise noted, all tests are pi re ae Test Procedure _ a : 100% production: tested and QA sample tested p per: OA 100% production tested at Ty = oC and OA serine tested a a8 Tax: and Ty per OA test plan QCxo0a2.- | QA sample tested per QA test plan QCK0002. oe : Parameter is @iiaranteed (but not tested). by: Design. and t : Parameter i is typical valtie: at Ta = FC for informati Purposes: font Open Loop DC Electrical Characteristics Vs = +5V, Ry = 1000, unless otherwise specified Test Conditions Parameter Description Temp Min | Typ | Max Units Vos Input Offset Voltage Vem = 0V 25C 0.2 1.5 mV Twin, TMaAx 3 Average Offset Voltage Drift TCVos (Note 1) All pV? All pA Ig Input Bias Current Vom = Tos Input Offset Current Vom = 25C Twin TMAX Power Supply (Note 2) All dB Rejection Ratio Common Mode (Note 3) Rejection Ratio All dB 25C Is Supply CurrentQuiescent | No Load Tain TMAX 25C Open-Loop kn Rin (diff) Cry (diff) Ryn (cm) Ryy (Differential) 25C pF MQ Cry (Differential) Open-Loop Ry (Common-Mode) 25C 25C Cin (cm) Cyy (Common-Mode) 1-214 ELANTEC INC 00 MH: (SGE D MM 3129557 G00e202 beb MELA Open Loop DC Electrical Characteristics Vs = +5V,Rz, = 100M, unless otherwise specified Contd. Test Conditions Parameter Description Temp 25C 25C Rout CMIR Output Resistance Common-Moede Input Range Tin; Tmax All Tout Output Current Vout Output Voltage Swing All Vour 100 Output Voltage Swing All Vour 50 Output Voltage Swing All Avo_ 100 Open-Loop Gain 25C Tiny TMax 25C Avo 50 Open-Loop Gain Tuo Tmax 25C 25C eN@ > 1 MHz Noise Voltage 1-100 MHz iN@ > 100 kHz | Noise Current 100k-100 MHz Closed Loop AC Electrical Characteristics Vg = 5V, Ay = +2, Rf = Rg = 2500, Cf = 3pF, Ry = 1002 unless otherwise specified Test Conditions Parameter Description Temp SSBW 3 dB Bandwidth (Vout = 0.4Vpp) 1 28C 25C Ay = Ay = +2 Twin, Tmax 25C Ay = +5 25C 25C Ay = +10 GBWP Gain-Bandwidth Product Ay = +10 LSBWa 3 dB Bandwidth Vout = 2 Vpp (Note 4) All LSBWb 3 dB Bandwidth Vout = 5 Vpp (Note 4) All GFPL Peaking (<50 MHz) 28C Vout = 0.4 Vpp Twins TMax GFPH Peaking (> 50 MHz) Vout = 0.4 Vpp 25C TmIn- TMAx GFR Rolloff (<100 MHz) 23C Vout = 0.4 Vpp Tin, Tmax OFVLOG TH /FL00 Ta pA/\Hz Min | Typ Units MHz MHz 1-215EL2074/EL2074C S58E D MM 3129557 g00ec03 Ske MELA Closed Loop AC Electrical Characteristics Vs = +5V, Ay = +2, Rf = Rg = 2500, Cf = 3pF, Ry = 1000 unless otherwise specified - Contd. Parameter Description Test Temp Min | Typ | Max F : tn Units Conditions 074: LPD Linear Phase Deviation Vout = 0.4 Vpp All 1 18 z : ae (<100 MHz) , es PM Phase Margin Ay = +2 25C 50 i ae trl, tf1 Rise Time, Fall Time 0.4V Step, Ay = +2 25C 1.8 ow [ons tr2, tf2 Rise Time, Fall Time 5V Step, Ay = +2 25C 8 : ; eh : ns tsl Settling to 0.1% 2V Step 25C 13 gy S ns (Ay = -) ts2 Settling to 0.01% 2V Step 25C 25 ns (Ay = 1) os Overshoot 2V Step 25C 5 % SR Slew Rate 2V Step All 275 | 400 Vi/ps DISTORTION (Note 5) HD2a 2nd Harmonic Distortion @ 10 MHz, Ay = +2 25C 65 | -55 HD2c 2nd Harmonic Distortion @ 20 MHz, Ay = +2 259C 55 | ~45 5 Tmin> TMAX 45 OT HD3a 3rd Harmonic Distortion @ 10 MHz, Ay = +2 25C 72 | 60 HD3c 3rd Harmonic Distortion @ 20 MHz, Ay = +2 25C 70 | 60 dBc Tmwin> TMAX 60 oe Mee ; dBc VIDEO PERFORMANCE (Note 6) dG Differential Gain NTSC 25C 0.01 | 0.05 |. opp dP Differential Phase NTSC 25C 0.015 | 0.05 pp dG Differential Gain 30 MHz 25C 0.1 opp dP Differential Phase 30 MHz 25C 0.1 : pp VBW +0.1 dB Bandwidth Flatness 25C 25 50 | MHz Note 1: Measured from TyyIn, Tmax: Note 2: +Vec = 4.5V to 5.5V. Note 3: +Vpyq = 2.5V, Vour = 0V . . . Slew Rate Note 4: Large-signal bandwidth calculated using LSBW = __.. 2a Vppak Note 5: All distortion measurements are made with Vour = 2 Vpp, Ry = 1002. Note 6: Video performance measured at Ay = +2 with 2 times normal video level across Ry = 1002. This corresponds to standard video levels across a back-terminated 502 load, ie., 0-100 IRE, 40IREpp giving a 1 Vpp video signal across the 502 load. For other values of Ry, see curves. 1-216ELANTEC INC 400 MHz | 2 0 SSE D MM 3329557 0002204 YT MBELA Typical Performance Curves (1, = 25 Non-Inverting Frequency Response oe 2 a a N a z x o < -90 a a 2 180 =z =45 - 2 Yo = 0-4pp | Ni" = R= 1000 | ane -360 1 10 100 500 FREQUENCY (MHz) Open Loop Gain and Phase 70 GAIN eg 50 2 Z 30 -90 a a go a -180 Zz a a S ~-10 -270 -30 ~360 10k 100k 1M 10M 100M 500M FREQUENCY (Hz) PSRR, CMRR, and Closed-Loop Ro vs Frequency 100 5 CMR 100 80 a 10 2 = 60 5 1 oO a 40 & ge 0.1 20 (ay =+2 0.01 0 10k 100k 1M 10M FREQUENCY (Hz) 190M 500M PHASE () PHASE () CLOSED LOOP Ry (2) (Ay = +2) OUTPUT VOLTAGE SWING (Vpp) MAGNITUDE (NORMALIZED) (dB) DISTORTION (dBc) Inverting Frequency Response 1 10 100 500 FREQUENCY (MHz) Output Voltage Swing vs Frequency 1 10 100 500 FREQUENCY (MHz) 2nd and 3rd Harmonic Distortion vs Frequency Ay = +2 R, = 1002 Yo = 2pp 10 100 FREQUENCY (MHz) PHASE () MAGNITUDE (NORMALIZED) (dB) NOISE VOLTAGE (nV//Hz') INTERCEPT POINT (dBm) Frequency Response for Various Rys 4 2 o a & -~2 y -90 = = ~a| Ay = 42 Ry = 2500 _ Vo = 0.4pp 180 1 10 100 500.279 FREQUENCY (MHz) Equivalent Input Noise 10 10 8 a HN Ny 6 6 xe ~ < 4 Current Noise 4 Ao e z 3 a a | 2 Voltage Noise 2.3 2 3 a a 3 Zz 1 1 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 2-Tone, 3rd Order Intermodulation Intercept 50 Four 40 30 20 fo Qo 0 20 40 60 80 100 FREQUENCY (MHz) 2074-2 1-217 OFLOG'TH/F200' THSSE D MM 332955? 0002205 335 mmELA = | j er So | a = > q Typical Performance Curves (1, = 25C unless otherwise specified) Contd. Series Resistor and Resulting Settling Time vs Settling Time vs Bandwidth vs Capacitive Load Output Voltage Change Closed-Loop Gain 100 100 100 = R = 1000 3 ~ R = 1008 Votep = 2 ~ 80 2 im 80/[R = Re = 2400 ~ 80 e 2 g E gy 60 Ez y 60 y 60 z = Ee 2 a Z Z Z na 40 z= = 40 Z 40 a & 2 E 5 a R m a g 20 's x 20 20 a 0 0 0 10 100 1000 1 3 5 7 CAPACITIVE LOAD (C,) (pF) OUTPUT VOLTAGE CHANGE () CLOSED-LOOP GAIN (V/V) Common-Mode Rejection Ratio Bias and Offset Current vs Supply Current vs Input Common-Mode Voltage Input Common-Mode Voltage . vs Temperature 3 So 0.040 = = = @ 2 aC z 3 OFFSET CURRENT 0.020 ~ =< 8 5 e # w wm a < & = > 2 w 3 hen - > 3 2 arse ~0.20 i z 1 a $s 2 =z 3 -0.40 -4 -2 0 2 4 4 +2 0 2 4 75-25 25 75 125 INPUT COMMON-MODE VOLTAGE INPUT COMMON-MODE VOLTAGE () AMBIENT TEMPERATURE (C) Bias and Offset Current Offset Voltage Avo~ PSRR, and CMRR vs Temperature va Temperature vs Temperature 1 +07 OFFSET CURRENT CMRR +05 = GF ws 3 3 BIAS CURRENT Lo en & e =z Qo - = a g x 3 oe ww 70. - fe 7 oe 7 oa > a 3 - 703 2 g a a , a & = 0.5 3 -0.7 -0.9 75-25 25 75 125 750-25 25 75 125 -75 0-25 25 75 125 AMBIENT TEMPERATURE (C) AMBIENT TEMPERATURE (C) AMBIENT TEMPERATURE (C) 2074-3 1-218ELANTEC INC S6E D MM 3329557 0002206 271 MELA Typical Performance Curves (1, = 25c) Contd. DIFFERENTIAL GAIN (%) DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE () DIFFERENTIAL PHASE () Smail-Signal Transie OUTPUT VOLTAGE (108 mV /div) 1.0 S os 0.001 0.714 0 1.0 oA 0.01 0.001 Ay > TIME (1 ns/div) Differential Gain and Phase vs DC Input Offset at 3.58 MHz = R= 1800 Vey = 40 IREpp NTSC Sinewave Swept 100 IRE of Vorreey 0.714 OC INPUT VOLTAGE () Differential Gain and Phase vs Number of 1509 Loads at 3.38 MHz ne 40 IRfpp Input ORE to TODIRE Input Stop OIRE = Ov 1 2 3 4 NUMBER OF 150.0 LOADS DIFFERENTIAL GAIN (5) DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE () nt Response ea DIFFERENTIAL PHASE () OUTPUT VOLTAGE (1V/div} 2074-4 Differential Gain and Phase vs DC Input Offset at 4.43 MHz R= 1500 Vx = 40 IREpp PAL Sinewave Swept 100 IRE of Voerser 1.0 2 2 o a 5 0.001 0.714 0 DC INPUT VOLTAGE (V) 0.714 Differential Gain and Phase vs Number of 1502 Loads at 4.43 MHz Ay = 42 40 IREpp PAL Input DIRE te 1ODIRE input Stop ORE = ov 2 2 o 0.001 1 2 3 4 NUMBER OF 1509 LOADS DIFFERENTIAL GAIN (%} DIFFERENTIAL GAIN (%) TIME (20 ns/div) 2074-5 Differential Gain and Phase vs DC Input Offset at 30 MHz 1.0 Ay #42 R = 1500 > Yigg * 40 Mp 30 MHz Sinewove ~~ Swapt 100 IRE of 4 | @ 04 od oa a = = z 2 0.01 & we & a 0.001 0.714 0 0.714 DC INPUT VOLTAGE (Vv) Differential Gain and Phase vs Number of 150 Loads at 30 MHz 1.0 e a 2 o1 =x oa wd = - a 8 0.01 iw in a 9.001 Qa 1 2 3 4 NUMBER OF 1500 LOADS 2074-6 1-219 OFL0C TH /FL00 THEL2074/EL2074C S8E D MM 31329557 000e207 108 MBELA ELANTEC INC Equivalent Circuit VS+ s < VBIAS $ > ee er KR IN+ iN- our , VBIAS Ss > L Burn-In Circuit 1 sca 2074-8 All Packages Use The Same Schematic 1-220S&E D = abc455? oo0ee08 O4N MBELA "ELANTEC INC Applications Information Product Description The EL2074 is a wideband monolithic operation- al amplifier built on a high-speed complementary bipolar process. The EL2074 uses a classical volt- age-feedback topology which allows it to be used in a variety of applications requiring a noise gain 2 2 where current-feedback amplifiers are not ap- propriate because of restrictions placed upon the feedback element used with the amplifier. The conventional topology of the EL2074 allows, for example, a capacitor to be placed in the feedback path, making it an excellent choice for applica- tions such as active filters, sample-and-holds, or integrators. Similarly, because of the ability to use diodes in the feedback network, the EL2074 is an excellent choice for applications such as log amplifiers. The EL2074 also has excellent DC specifications: 200 LV, Vos, 2 pA Ip, 0.1 pA Ipg, and 90 dB of CMRR. These specifications allow the EL2074 to be used in DC-sensitive applications such as dif- ference amplifiers. Furthermore, the current noise of the EL2074 is only 3.2 pA/\Hz, making it an excellent choice for high-sensitivity trans- impedance amplifier configurations. Gain-Bandwidth Product The EL2074 has a gain-bandwidth product of 400 MHz. For gains greater than 8, its closed- loop 3 dB bandwidth is approximately equal to the gain-bandwidth product divided by the noise gain of the circuit. For gains less than 8, higher- order poles in the amplifiers transfer function contribute to even higher closed loop band- widths. For example, the EL2074 has a 3 dB bandwidth of 400 MHz at a gain of + 2, dropping to 200 MHz at a gain of +4. It is important to note that the EL2074 has been designed so that this extra bandwidth in low-gain applications does not come at the expense of stability. As seen in the typical performance curves, the EL2074 in a gain of + 2 only exhibits 1 dB of peaking with a 1002. load. Parasitic Capacitances and Stability When used in positive-gain configurations, the EL2074 can be quite sensitive to parasitic capaci- tances at the inverting input, especially with val- ues 22509 for the gain resistor. The problem stems from the feedback and gain resistance in conjunction with the approximately 3pF of board-related parasitic capacitance from the in- verting input to ground. Assuming a gain-of-2 configuration with Rf=Rg=2500, a feedback pole occurs at 424 MHz, which is equivalent to a zero in the forward path at the same frequency. This zero reduces stability by reducing the effec- tive phase-margin from about 50 to about 30. A common solution to this problem is to add an additional capacitor from the inverting input to the output. This capacitor, in conjunction with the parasitic capacitance, maintains a constant voltage-divider between the output and the in- verting input. This technique is used for AC test- ing of the EL2074. A 3pF capacitor is placed in parallel with the feedback resistor for all AC tests. When this capacitor is used, it is also possi- ble to increase the resistance values of the feed- back and gain resistors without loss of stability, resulting in less loading of the EL2074 from the feedback network. Video Performance An industry-standard method of measuring the video distortion of a component such as the EL2074 is to measure the amount of differential gain (dG) and differential phase (dP) that it in- troduces. To make these measurements, a 0.286 Vpp (40 IRE) signal is applied to the device with OV DC offset (0 IRE) at either 3.58 MHz for NTSC, 4.43 MHz for PAL, or 30 MHz for HDTV. A second measurement is then made at 0.714V DC offset (100 IRE). Differential gain is a measure of the change in amplitude of the sine wave, and is measured in percent. Differential phase is a measure of the change in phase, and is measured in degrees. OFLO@ TH/FL00 TH 1-22158E ) bess? O00e209 T&0 MELA EL2074/EL2074C Applications Information Contd. For signal transmission and distribution, a back- terminated cable (750 in series at the drive end, and 75Q to ground at the receiving end) is pre- ferred since the impedance match at both ends will absorb any reflections. However, when dou- ble termination is used, the received signal is halved; therefore a gain of 2 configuration is typi- cally used to compensate for the attenuation. The EL2074 has been designed to be among the best video amplifiers in the marketplace today. It has been thoroughly characterized for video per- formance in the topology described above, and the results have been included as minimum dG and dP specifications and as typical performance curves. In a gain of + 2, driving 1500, with stan- dard video test levels at the input, the EL2074 exhibits dG and dP of only 0.01% and 0.015 at NTSC and PAL. Because dG and dP vary with different DC offsets, the superior video perform- ance of the EL2074 has been characterized over the entire DC offset range from ~0.714V to +0.714V. For more information, refer to the curves of dG and dP vs DC Input Offset. The excellent output drive capability of the EL2074 allows it to drive up to 4 back-terminated loads with excellent video performance. With 4 1502 loads, dG and dP are only 0.15% and 0.08 at NTSC and PAL. For more information, refer to the curves for Video Performance vs Number of 1502. Loads. Output Drive Capability The EL2074 has been optimized to drive 500 and 75Q loads. It can easily drive 6 Vpp into a 509 load. This high output drive capability makes the EL2074 an ideal choice for RF, IF and video ap- plications. Furthermore, the current drive of the EL2074 remains a minimum of 50 mA at low temperatures. The EL2074 is current-limited at the output, allowing it to withstand momentary shorts to ground. However, power dissipation with the output shorted can be in excess of the power-dissipation capabilities of the package. Capacitive Loads Although the EL2074 has been optimized to drive resistive loads as low as 500, capacitive loads will decrease the amplifiers phase margin which may result in peaking, overshoot, and pos- sible oscillation. For optimum AC performance, capacitive loads should be reduced as much as possible or isolated via a series output resistor. Coax lines can be driven, as long as they are ter- minated with their characteristic impedance. When properly terminated, the capacitance of co- axial cable will not add to the capacitive load seen by the amplifier. Capacitive loads greater than 10 pF should be buffered with a series resis- tor (Rs) to isolate the load capacitance from the amplifier output. A curve of recommended Rs vs Cload has been included for reference. Values of Rs were chosen to maximize resulting bandwidth without peaking. Printed-Circuit Layout As with any high-frequency device, good PCB layout is necessary for optimum performance. Ground-plane construction is highly recommend- ed, as is good power supply bypassing. A 1 wF- 10 uF tantalum capacitor is recommended in par- allel with a 0.01 wF ceramic capacitor. All lead lengths should be as short as possible, and all by- pass capacitors should be as close to the device pins as possible. Parasitic capacitances should be kept to an absolute minimum at both inputs and at the output. Resistor values should be kept un- der 10002 to 20002 because of the RC time con- stants associated with the parasitic capacitance. Metal-film and carbon resistors are both accept- able, use of wire-wound resistors is not recom- mended because of parasitic inductance. Similar- ly, capacitors should be low-inductance for best performance. If possible, solder the EL2074 di- rectly to the PC board without a socket. Even high quality sockets add parasitic capacitance and inductance which can potentially degrade performance. Because of the degradation of AC performance due to parasitics, the use of surface- mount components (resistors, capacitors, etc.) is also recommended. 1-222SshE D) abenss? _So0eelo ?T2 MELA wy | evantec nc = ss IL 2074/EL2074 E ain-of-2 Stable Operational Amplifie iz EE 5 f EL2074 Macromodel S x ~ * Connections: +input Q * | -input * +Vsupply * Vsupply ; patent -Subckt M2074 $2746 * *Input Stage * ie 37 41 mA r 36 37 125 r7 38 37 125 rel 7 30 200 re2 7 39 200 ql 30 3 36 qn q2 59 2 38 qna ediff 33 0 39 301 radiff 33 0 1 Meg * * Compensation Section * ga 0 34 33 0 2m rh 34 0 500K ch 34 0 0.8 pF Te 34 40 50 ec 40 0 0.05 pF * * Poles * ep 4104001 rpa 41 42 150 epa 42 0 0.5 pF rpb 42 43 50 epb 43 0 0.5 pF * * Output Stage * iosl 7 50 3.0 mA ios2 51 4 3.0 mA q5 4 43 50 gp q4 7 43 651 qn q5 7 50 52 qn a6 4 51 53 qp rosl 52 6 2 ros2 6 53 2 * Power Supply Current * ips 7 4 11.4 mA x Models * -model qna npn(is=800e18 bf=170 tf=0.2 ns) emodel qn npn(is=8l0e18 bf=200 tf=0.2 ns) -model gp pnp(is=800e18 bf=200 tf=0.2 ns) ends 1-2235S8E D MM 3229557 O00ee11 634 MBELA EL2074/EL2074C ~ ELANTEC INC 400 MHz GBWP Gain-of-2 Stable Operational Amplifier SSS EL2074 Macromodel Contd. 7 2 V+ re ; $ 34 AAA > _ $ret Src2 ga WV > : Scaitt = 8 e $ ot s th sch cc . | EL2074/ EL2074 4C 1-224