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Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
FEATURES SYMBOL QUICK REFERENCE DATA
• Very low threshold voltage VDS = 20 V
• Fast switching
• Logic level compatible ID = 1.05 A
• Subminiature surface mount
package RDS(ON) ≤ 250 mΩ (VGS = 2.5 V)
VGS(TO) ≥ 0.4 V
GENERAL DESCRIPTION PINNING SOT23
N-channel, enhancement mode, PIN DESCRIPTION
logic level, field-effect power
transistor. This device has very low 1 gate
threshold voltage and extremely
fast switching making it ideal for 2 source
battery powered applications and
high speed digital interfacing. 3 drain
The BSH105 is supplied in the
SOT23 subminiature surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Drain-source voltage - 20 V
VDGR Drain-gate voltage RGS = 20 kΩ-20V
VGS Gate-source voltage - ± 8V
IDDrain current (DC) Ta = 25 ˚C - 1.05 A
Ta = 100 ˚C - 0.67 A
IDM Drain current (pulse peak value) Ta = 25 ˚C - 4.2 A
Ptot Total power dissipation Ta = 25 ˚C - 0.417 W
Ta = 100 ˚C - 0.17 W
Tstg, TjStorage & operating temperature - 55 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
Rth j-a Thermal resistance junction to FR4 board, minimum 300 - K/W
ambient footprint
d
g
s
12
3
Top view
August 1998 1 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS Drain-source breakdown VGS = 0 V; ID = 10 µA20--V
voltage
VGS(TO) Gate threshold voltage VDS = VGS; ID = 1 mA 0.4 0.57 - V
Tj = 150˚C 0.1 - - V
RDS(ON) Drain-source on-state VGS = 4.5 V; ID = 0.6 A - 140 200 mΩ
resistance VGS = 2.5 V; ID = 0.6 A - 180 250 mΩ
VGS = 1.8 V; ID = 0.3 A - 240 300 mΩ
VGS = 2.5 V; ID = 0.6 A; Tj = 150˚C - 270 375 mΩ
gfs Forward transconductance VDS = 16 V; ID = 0.6 A 0.5 1.6 - S
IGSS Gate source leakage current VGS = ±8 V; VDS = 0 V - 10 100 nA
IDSS Zero gate voltage drain VDS = 16 V; VGS = 0 V; - 50 100 nA
current Tj = 150˚C - 1.3 10 µA
Qg(tot) Total gate charge ID = 1 A; VDD = 20 V; VGS = 4.5 V - 3.9 - nC
Qgs Gate-source charge - 0.4 - nC
Qgd Gate-drain (Miller) charge - 1.4 - nC
td on Turn-on delay time VDD = 20 V; ID = 1 A; - 2 - ns
trTurn-on rise time VGS = 8 V; RG = 6 Ω- 4.5 - ns
td off Turn-off delay time Resistive load - 45 - ns
tfTurn-off fall time - 20 - ns
Ciss Input capacitance VGS = 0 V; VDS = 16 V; f = 1 MHz - 152 - pF
Coss Output capacitance - 71 - pF
Crss Feedback capacitance - 33 - pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IDR Continuous reverse drain Ta = 25 ˚C - - 1.05 A
current
IDRM Pulsed reverse drain current - - 4.2 A
VSD Diode forward voltage IF = 0.5 A; VGS = 0 V - 0.74 1 V
trr Reverse recovery time IF = 0.5 A; -dIF/dt = 100 A/µs; - 27 - ns
Qrr Reverse recovery charge VGS = 0 V; VR = 16 V - 19 - nC
August 1998 2 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
a
)
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
a
); conditions: V
GS
≥
4.5 V
Fig.3. Safe operating area. T
a
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-a
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics, T
j
= 25 ˚C
.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 ˚C
.
R
DS(ON)
= f(I
D
); parameter V
GS
Normalised Power Dissipation, PD (%)
0
20
40
60
80
100
120
0 25 50 75 100 125 150
Ambient Temperature, Ta (C)
BSH105
0.1
1
10
100
1000
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
Peak Pulsed Drain Current, IDM (A)
single pulse
D = 0.5
0.2
0.1 0.05
0.02 tp D = tp/T
D
P
T
Normalised Drain Current, ID (%)
0
20
40
60
80
100
120
0 25 50 75 100 125 150
Ambient Temperature, Ta (C)
BSH105
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0 0.5 1 1.5 2
Drain-Source Voltage, VDS (V)
Drain Current, ID (A)
1.1 V
1.5 V
1.3 V
1.7 V
4.5V
Tj = 25 C
2.5V
VGS = 1.9 V
2.1 V
BSH105
0.01
0.1
1
10
100
0.1 1 10 100
Drain-Source Voltage, VDS (V)
Peak Pulsed Drain Current, IDM (A)
d.c. 100 ms
10 ms
RDS(on) = VDS/ ID
tp = 100 us
1 ms
BSH105
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Drain Current, ID (A)
Drain-Source On Resistance, RDS(on) (Ohms)
VGS = 4.5 V
2.5 V
2.1 V
1.9 V
1.7 V
Tj = 25 C
1.5 V
August 1998 3 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
)
Fig.8. Typical transconductance, T
j
= 25 ˚C
.
g
fs
= f(I
D
)
Fig.9. Normalised drain-source on-state resistance.
R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
)
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
BSH105
0
0.5
1
1.5
2
2.5
3
0 0.5 1 1.5 2 2.5 3
Gate-Source Voltage, VGS (V)
VDS > ID X RDS(on)
Tj = 25 C
150 C
Drain Current, ID (A) Threshold Voltage, VGS(to), (V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 25 50 75 100 125 150
Junction Temperature, Tj (C)
minimum
typical
BSH105
0
0.5
1
1.5
2
2.5
3
3.5
4
0 0.5 1 1.5 2 2.5 3
Drain Current, ID (A)
Transconductance, gfs (S) BSH105
1E-07
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00
0 0.2 0.4 0.6 0.8 1
Gate-Source Voltage, VGS (V)
Drain Current, ID (A)
VDS = 5 V
Tj = 25 C
Normalised Drain-Source On Resistance
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
0 25 50 75 100 125 150
Junction Temperature, Tj (C)
VGS = 4.5 V 2.5 V
1.8 V
RDS(ON) @ Tj
RDS(ON) @ 25C
BSH105
10
100
1000
0.1 1 10 100
Drain-Source Voltage, VDS (V)
Capacitances, Ciss, Coss, Crss (pF)
Ciss
Coss
Crss
August 1998 4 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
)Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
BSH105
0
1
2
3
4
5
6
7
8
9
10
02468
Gate charge, QG (nC)
VDD = 20 V
RD = 20 Ohms
Tj = 25 C
Gate-source voltage, VGS (V) BSH105
-5
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0-1.2-1-0.8-0.6-0.4-0.20
Drain-Source Voltage, VSDS (V)
Source-Drain Diode Current, IF (A)
Tj = 25 C
150 C
August 1998 5 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
MECHANICAL DATA
Fig.15. SOT23 surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
UNIT A
1
max. b
p
cDE e
1
H
E
L
p
Qwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
97-02-28
IEC JEDEC EIAJ
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
w
M
v
M
A
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface mounted package; 3 leads SOT23
August 1998 6 Rev 1.000
Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
August 1998 7 Rev 1.000
