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CC3100MOD
SWRS161 DECEMBER 2014
CC3100MOD SimpleLink™ Certified Wi-Fi
®
Network Processor Internet-of-Things Module
Solution for MCU Applications
1 Module Overview
1.1 Features
1 RX Sensitivity
The CC3100MOD is a Wi-Fi Module that Consists
of the CC3100R11MRGC Wi-Fi Network Processor –94.7 dBm at 1 DSSS
and Power-Management Subsystems. This Fully –87 dBm at 11 CCK
Integrated Module Includes all Required Clocks, –73 dBm at 54 OFDM
SPI Flash, and Passives. Application Throughput
Modular FCC, IC, and CE Certifications Save UDP: 16 Mbps
Customer Effort, Time, and Money TCP: 13 Mbps
Wi-Fi CERTIFIED™ Modules, With Ability to Host Interface
Request Certificate Transfer for Wi-Fi Alliance Wide Range of Power Supply (2.3 to 3.6 V)
Members Interfaces With 8-, 16-, and 32-Bit MCU or
Wi-Fi Network Processor Subsystem ASICs Over a Serial Peripheral Interface (SPI)
Featuring Wi-Fi Internet-On-a-Chip™ With up to 20-MHz Clock
Dedicated ARM®MCU Low Footprint Host Driver: Less than 6KB
Completely Offloads Wi-Fi and Internet Supports RTOS and No-OS Applications
Protocols from the External Microcontroller Power-Management Subsystem
Wi-Fi Driver and Multiple Internet Protocols in Integrated DC-DC Converter With a Wide-
ROM Supply Voltage:
802.11 b/g/n Radio, Baseband, and Medium Direct Battery Mode: 2.3 to 3.6 V
Access Control (MAC), Wi-Fi Driver, and Low-Power Consumption at 3.6 V
Supplicant Hibernate With Real-Time Clock (RTC):
TCP/IP Stack 7μA
Industry-Standard BSD Socket Application Standby: 140 μA
Programming Interfaces (APIs) RX Traffic: 54 mA at 54 OFDM
8 Simultaneous TCP or UDP Sockets TX Traffic: 223 mA at 54 OFDM
2 Simultaneous TLS and SSL Sockets Integrated Components on Module
Powerful Crypto Engine for Fast, Secure Wi-Fi
and Internet Connections With 256-Bit AES 40.0-MHz Crystal With Internal Oscillator
Encryption for TLS and SSL Connections 32.768-kHz Crystal (RTC)
Station, AP, and Wi-Fi Direct™ Modes 8-Mbit SPI Serial Flash RF Filter and
WPA2 Personal and Enterprise Security Passive Components
SimpleLink Connection Manager for Package and Operating Conditions
Autonomous and Fast Wi-Fi Connections 1.27-mm Pitch, 63-Pin, 20.5-mm ×
SmartConfig™ Technology, AP Mode, and 17.5-mm LGA Package for Easy Assembly
WPS2 for Easy and Flexible Wi-Fi Provisioning and Low-Cost PCB Design
TX Power Operating Temperature Range: –20°C to
17 dBm at 1 DSSS 70°C
17.25 dBm at 11 CCK
13.5 dBm at 54 OFDM
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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SWRS161 DECEMBER 2014
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1.2 Applications
Internet of Things (IoT) Internet Gateway
Cloud Connectivity Industrial Control
Home Automation Smart Plug and Metering
Home Appliances Wireless Audio
Access Control IP Network Sensor Nodes
Security Systems Wearables
Smart Energy
1.3 Description
Add Wi-Fi to low-cost, low-power microcontroller (MCU) for Internet of Things (IoT) applications. The
CC3100MOD is FCC, IC, CE, and Wi-Fi CERTIFIED module is part of the new SimpleLink Wi-Fi family
that dramatically simplifies the implementation of Internet connectivity. The CC3100MOD integrates all
protocols for Wi-Fi and Internet, which greatly minimizes host MCU software requirements. With built-in
security protocols, the CC3100MOD solution provides a robust and simple security experience.
Additionally, the CC3100MOD is a complete platform solution including various tools and software, sample
applications, user and programming guides, reference designs and the TI E2E™ support community. The
CC3100MOD is available an LGA package that is easy to lay out with all required components including
serial flash, RF filter, crystal, passive components fully integrated.
The Wi-Fi network processor subsystem features a Wi-Fi Internet-on-a-Chip and contains an additional
dedicated ARM MCU that completely off-loads the host MCU. This subsystem includes an 802.11 b/g/n
radio, baseband, and MAC with a powerful crypto engine for fast, secure Internet connections with 256-bit
encryption. The CC3100MOD module supports Station, Access Point, and Wi-Fi Direct modes. The
module also supports WPA2 personal and enterprise security and WPS 2.0. This subsystem includes
embedded TCP/IP and TLS/SSL stacks, HTTP server, and multiple Internet protocols. The power-
management subsystem includes an integrated DC-DC converter with support for a wide range of supply
voltages. This subsystem enables low-power consumption modes such as hibernate with RTC mode,
which requires approximately 7 μA of current. The CC3100MOD module can connect to any 8-, 16-, or 32-
bit MCU over the SPI or UART Interface. The device driver minimizes the host memory footprint
requirements of less than 7KB of code memory and 700B of RAM memory for a TCP client application.
Table 1-1. Module Information(1)
PART NUMBER PACKAGE BODY SIZE
CC3100MODR11MAMOB MOB (63) 20.5 mm × 17.5 mm
(1) For more information, see Section 9,Mechanical Packaging and Orderable Information.
2Module Overview Copyright © 2014, Texas Instruments Incorporated
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CC3100MOD
VCC
HOST I/F RF Filter
Serial
Flash
8Mbit
Pull-up
resistors
CC3100R11MRGC
Power
Inductors
Caps
32-KHz
Crystal 40-MHz
Crystal
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1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the CC3100MOD module.
Figure 1-1. CC3100MOD Functional Block Diagram
Copyright © 2014, Texas Instruments Incorporated Module Overview 3
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External Microcontroller
ARM Processor (Wi-Fi Network Processor)
Wi-Fi Baseband
Wi-Fi MAC
Wi-Fi Radio
Wi-Fi Driver
Supplicant
TCP/IP
TLS/SSL
Internet Protocols
User Application
Embedded Wi-Fi
Embedded Internet
SimpleLink Driver
SPI or UART Driver
SWAS031-B
RAM
ROM
HOST I/F
SPI
UART
SYSTEM
Oscillators
DC2DC
BAT Monitor
Baseband
Radio
WiFi Driver
TCP/IP & TLS/SSL
Stacks
ARM Processor
MAC Processor
Crypto Engine
Synthesizer
PA
LNA
SWAS031-A
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Figure 1-2. CC3100 Hardware Overview
Figure 1-3. CC3100 Software Overview
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Table of Contents
1 Module Overview ........................................ 15.4 Power-Management Subsystem .................... 24
1.1 Features .............................................. 15.5 Low-Power Operating Modes ....................... 24
1.2 Applications........................................... 26 Applications, Implementation, and Layout ....... 26
1.3 Description............................................ 26.1 Reference Schematics.............................. 26
1.4 Functional Block Diagram ............................ 36.2 Bill of Materials...................................... 27
2 Revision History ......................................... 66.3 Layout Recommendations .......................... 27
3 Terminal Configuration and Functions.............. 77 Environmental Requirements and
Specifications........................................... 31
3.1 CC3100MOD Pin Diagram ........................... 77.1 Temperature......................................... 31
3.2 Pin Attributes ......................................... 87.2 Handling Environment .............................. 31
4 Specifications........................................... 10 7.3 Storage Condition ................................... 31
4.1 Absolute Maximum Ratings......................... 10 7.4 Baking Conditions................................... 31
4.2 Handling Ratings.................................... 10 7.5 Soldering and Reflow Condition .................... 31
4.3 Power-On Hours .................................... 10 8 Product and Documentation Support.............. 33
4.4 Recommended Operating Conditions............... 10 8.1 Development Support ............................... 33
4.5 Brown-Out and Black-Out........................... 11 8.2 Device Nomenclature ............................... 33
4.6 Electrical Characteristics (3.3 V, 25°C) ............. 12 8.3 Community Resources.............................. 34
4.7 Thermal Resistance Characteristics for MOB
Package ............................................. 12 8.4 Trademarks.......................................... 34
4.8 Reset Requirement ................................. 12 8.5 Electrostatic Discharge Caution..................... 34
4.9 Current Consumption ............................... 13 8.6 Export Control Notice ............................... 34
4.10 WLAN RF Characteristics........................... 15 8.7 Glossary............................................. 34
4.11 Timing Characteristics............................... 16 9 Mechanical Packaging and Orderable
Information .............................................. 35
5 Detailed Description ................................... 22 9.1 Mechanical Drawing................................. 35
5.1 Overview ............................................ 22 9.2 Package Option ..................................... 36
5.2 Functional Block Diagram........................... 23
5.3 Wi-Fi Network Processor Subsystem ............... 23
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2 Revision History
DATE REVISION NOTES
November 2014 * Initial release.
6Revision History Copyright © 2014, Texas Instruments Incorporated
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44
45
46
47
48
49
50
51
52
53
54
27
26
25
24
23
22
21
20
19
18
17
28 29 30 31 3332 34 35 36 37 38 39 40 41 42 43
16 15 14 13 1112 10 9 8 7 6 5 4 3 2 1
63
59
55
62 61
60
57 56
58
GND
NC
NC
SOP1
SOP2
NC
RESERVED
NC
RESERVED
NC
NC
GND
NC
NC
NC
NC
HOSTINTR
FORCE_AP
NC
HOST_SPI_nCS
HOST_SPI_DOUT
HOST_SPI_DIN
HOST_SPI_CLK
nHIB
NC
GND
GND
UART1_nRTS
NC
UART1_TX
UART1_RX
TEST_58
TEST_59
TEST_60
UART1_nCTS
TEST_62
NC
NC
GND
NC
GND
RF_BG
GND
NC
SOP0
nRESET
VBAT_DCDC_ANA
VBAT_DCDC_PA
GND
NC
VBAT_DCDC_DIG_IO
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
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3 Terminal Configuration and Functions
3.1 CC3100MOD Pin Diagram
Figure 3-1 shows the pin diagram for the CC3100MOD.
Figure 3-1. CC3100MOD Pin Diagram (Bottom View)
NOTE
Figure 3-1 shows the approximate location of pins on the module. For the actual mechanical
diagram refer to Section 9.
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3.2 Pin Attributes
Table 3-1 lists the pin descriptions of the CC3100MOD module.
NOTE
If an external device drives a positive voltage to signal pads when the CC3100MOD is not
powered, DC current is drawn from the other device. If the drive strength of the external
device is adequate, an unintentional wakeup and boot of the CC3100MOD can occur. To
prevent current draw, TI recommends one of the following:
All devices interfaced to the CC3100MOD must be powered from the same power rail as
the CC3100MOD.
Use level-shifters between the CC3100MOD and any external devices fed from other
independent rails.
The nRESET pin of the CC3100MOD must be held low until the VBAT supply to the
device is driven and stable.
Table 3-1. Pin Attributes
MODULE PIN MODULE PIN NAME TYPE MODULE PIN DESCRIPTION
NO.
1 GND - Ground
2 GND - Ground
3 NC -Reserved. Do not connect
4 nHIB I Hibernate signal, active low. Refer to Figure 4-8.
5 HOST_SPI_CLK I Host interface SPI clock
6 HOST_SPI_DIN I Host interface SPI data input
7 HOST_SPI_DOUT O Host interface SPI data output
8 HOST_SPI_nCS I Host interface SPI chip select (active low)
9 NC - Reserved. Do not connect
10 FORCE_AP - For forced AP mode, pull to high on the board using a 100-kΩresistor. Otherwise,
pull down to ground using a 100-kΩresistor.(1)
11 HOSTINTR O Interrupt output
12 NC - Reserved. Do not connect
13 NC - Reserved. Do not connect
14 NC - Reserved. Do not connect
15 NC - Reserved. Do not connect
16 GND - Ground
17 NC - Reserved. Do not connect
18 NC - Reserved. Do not connect
19 RESERVED - Reserved. Do not connect
20 NC - Unused. Do not connect.
21 RESERVED - Add 100-kΩexternal pulldown resistor
22 NC - Reserved. Do not connect
23 SOP2 - Add 10k pulldown to ground
24 SOP1 - Reserved. Do not connect.
25 NC - Reserved. Do not connect
26 NC - Reserved. Do not connect
27 GND - Ground
28 GND - Ground
29 NC - Reserved. Do not connect
30 GND - Ground. Reference for RF signal
(1) Using a configuration file stored on flash, the vendor can optionally block any possibility of bringing up AP using the FORCE_AP pin.
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Table 3-1. Pin Attributes (continued)
MODULE PIN MODULE PIN NAME TYPE MODULE PIN DESCRIPTION
NO.
31 RF_BG I/O 2.4-GHz RF input/output
32 GND - Ground. Reference for RF signal
33 NC - Reserved. Do not connect
34 SOP0 - Reserved. Do not connect.
35 nRESET I Power on reset. Does not require external RC circuit
36 VBAT_DCDC_ANA - Power supply for the module, can be connected to battery (2.3 V to 3.6 V)
37 VBAT_DCDC_PA - Power supply for the module, can be connected to battery (2.3 V to 3.6 V)
38 GND - Ground
39 VDD_ANA2 - To be left unconnected. Used for prototype samples only.
40 VBAT_DCDC_DIG_IO - Power supply for the module, can be connected to battery (2.3 V to 3.6 V)
41 NC - Reserved. Do not connect
42 NC - Reserved. Do not connect
43 GND - Ground
44 UART1_nRTS O UART request to send, connect to external test point. Used for on-module flash
reprogramming
45 NC - Reserved. Do not connect
46 UART1_TX O UART transmit, connect to external test point. Used for on-module flash
reprogramming
47 UART1_RX I UART receive, connect to external test point. Used for on-module flash
reprogramming
48 TEST_58 O Connect to external test point
49 TEST_59 I Connect to external test point
50 TEST_60 O Connect to external test point
51 UART1_nCTS I UART clear to send, connect to external test point. Used for on-module flash
reprogramming
52 TEST_62 O Connect to external test point
53 NC - Reserved. Do not connect
54 NC - Reserved. Do not connect
55 GND - Thermal Ground
56 GND - Thermal Ground
57 GND - Thermal Ground
58 GND - Thermal Ground
59 GND - Thermal Ground
60 GND - Thermal Ground
61 GND - Thermal Ground
62 GND - Thermal Ground
63 GND - Thermal Ground
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4 Specifications
4.1 Absolute Maximum Ratings
These specifications indicate levels where permanent damage to the module can occur. Functional operation is not ensured
under these conditions. Operation at absolute maximum conditions for extended periods can adversely affect long-term
reliability of the module.
SYMBOL CONDITION MIN TYP MAX UNIT
VBAT and VIO Respect to GND –0.5 3.3 3.8 V
Digital I/O Respect to GND –0.5 VBAT + 0.5 V
RF pins –0.5 2.1 V
Analog pins –0.5 2.1 V
Temperature –40 +85 °C
4.2 Handling Ratings
MIN MAX UNIT
Tstg Storage temperature range –40 85 °C
Human body model (HBM), per ANSI/ESDA/JEDEC –1.0 1.0 kV
JS001(1)
Electrostatic discharge (ESD)
VESD performance: Charged device model (CDM), All pins –250 250 V
per JESD22-C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4.3 Power-On Hours CONDITIONS POH
TAmbient up to 85°C, assuming 20% active mode and 80% sleep mode 17,500
4.4 Recommended Operating Conditions
Function operation is not ensured outside this limit, and operation outside this limit for extended periods can adversely affect
long-term reliability of the module.(1)
SYMBOL CONDITION(2) MIN TYP MAX UNIT
VBAT and VIO Battery mode 2.3 3.3 3.6 V
Operating temperature –20 25 70 °C
Ambient thermal slew –20 20 °C/minute
(1) Operating temperature is limited by crystal frequency variation.
(2) To ensure WLAN performance, the ripple on the power supply must be less than ±300 mV.
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4.5 Brown-Out and Black-Out
The module enters a brown-out condition whenever the input voltage dips below VBROWN (see Figure 4-1 and
Figure 4-2). This condition must be considered during design of the power supply routing, especially if operating
from a battery. High-current operations (such as a TX packet) cause a dip in the supply voltage, potentially
triggering a brown-out. The resistance includes the internal resistance of the battery, contact resistance of the
battery holder (4 contacts for a 2 x AA battery) and the wiring and PCB routing resistance.
Figure 4-1. Brown-Out and Black-Out Levels (1 of 2)
Figure 4-2. Brown-Out and Black-Out Levels (2 of 2)
In the brown-out condition, all sections of the CC3100MOD shut down within the module except for the Hibernate
block (including the 32-kHz RTC clock), which remains on. The current in this state can reach approximately 400
µA.
The black-out condition is equivalent to a hardware reset event in which all states within the module are lost.
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4.6 Electrical Characteristics (3.3 V, 25°C)
PARAMETER TEST MIN NOM MAX UNIT
CONDITIONS
CIN Pin capacitance 4 pF
VIH High-level input voltage 0.65 × VDD VDD + 0.5 V V
VIL Low-level input voltage –0.5 0.35 × VDD V
IIH High-level input current 5 nA
IIL Low-level input current 5 nA
VOH High-level output voltage 2.4 V
(VDD = 3.0 V)
VOL Low-level output voltage 0.4 V
(VDD = 3.0 V)
IOH High-level source current, VOH = 2.4 6 mA
IOL Low-level sink current, VOH = 0.4 6 mA
Pin Internal Pullup and Pulldown (25°C)
TEST MIN NOM MAX UNIT
PARAMETER CONDITIONS
IOH Pullup current, VOH = 2.4 5 10 µA
(VDD = 3.0 V)
IOL Pulldown current, VOL = 0.4 5 µA
(VDD = 3.0 V)
VIL nRESET(1) 0.6 V
(1) The nRESET pin must be held below 0.6 V for the module to register a reset.
4.7 Thermal Resistance Characteristics for MOB Package
NAME DESCRIPTION °C/W(1) (2) AIR FLOW (m/s)(3)
RΘJC Junction-to-case 9.08 0.00
RΘJB Junction-to-board 10.34 0.00
RΘJA Junction-to-free air 11.60 0.00
RΘJMA Junction-to-moving air 5.05 < 1.00
PsiJT Junction-to-package top 9.08 0.00
PsiJB Junction-to-board 10.19 0.00
(1) °C/W = degrees Celsius per watt.
(2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a
JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these
EIA/JEDEC standards:
JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
Power dissipation of 2 W and an ambient temperature of 70ºC is assumed.
(3) m/s = meters per second.
4.8 Reset Requirement
PARAMETER SYMBOL MIN TYP MAX UNIT
Operation mode level ViH 0.65 × VBAT V
Shutdown mode level(1) ViL 0 0.6 V V
Minimum time for nReset low for resetting the 5 ms
module
Rise/fall times Tr/Tf 20 µs
(1) The nRESET pin must be held below 0.6 V for the module to register a reset.
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4.9 Current Consumption
TA= +25°C, VBAT = 3.6 V
PARAMETER TEST CONDITIONS(1) (2) MIN TYP MAX UNIT
TX power level = 0 272
1 DSSS TX power level = 4 188
TX power level = 0 248
TX 6 OFDM TX power level = 4 179
TX power level = 0 223
54 OFDM mA
TX power level = 4 160
1 DSSS 53
RX(3) 54 OFDM 53
Idle connected(4) 0.715
LPDS 0.140
Hibernate 7 µA
VBAT = 3.3 V 450
Peak calibration current(3)(5) mA
VBAT = 2.3 V 620
(1) TX power level = 0 implies maximum power. TX power level = 4 implies output power backed off approximately 4 dB.
(2) The CC3100 system is a constant power-source system. The active current numbers scale inversely on the VBAT voltage supplied.
(3) The RX current is measured with a 1-Mbps throughput rate.
(4) DTIM = 1
(5) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. Calibration is performed sparingly,
typically when coming out of Hibernate and only if temperature has changed by more than 20°C or the time elapsed from prior
calibration is greater than 24 hours.
Note: The area enclosed in the circle represents a significant reduction in current when transitioning from TX power
level 3 to 4. In the case of lower range requirements (13-dbm output power), TI recommends using TX power level 4
to reduce the current.
Figure 4-3. TX Power and IBAT vs TX Power Level Settings (1 DSSS)
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Figure 4-4. TX Power and IBAT vs TX Power Level Settings (6 OFDM)
Figure 4-5. TX Power and IBAT vs TX Power Level Settings (54 OFDM)
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4.10 WLAN RF Characteristics
WLAN Receiver Characteristics
TA= +25°C, VBAT = 2.3 to 3.6 V. Parameters measured at module pin on channel 7 (2442 MHz)
PARAMETER CONDITION (Mbps) MIN TYP MAX UNITS
1 DSSS –94.7
2 DSSS –92.6
11 CCK –87.0
6 OFDM –89.0
Sensitivity
(8% PER for 11b rates, 10% PER for 9 OFDM –88.0
11g/11n rates)(10% PER)(1) 18 OFDM –85.0 dBm
36 OFDM –79.5
54 OFDM –73.0
MCS7 (Mixed Mode) –69.0
802.11b –3.0
Maximum input level
(10% PER) 802.11g –9.0
(1) Sensitivity is 1-dB worse on channel 13 (2472 MHz).
4.10.1 WLAN Transmitter Characteristics(1)
TA= +25°C, VBAT = 2.3 to 3.6 V. Parameters measured at module pin on channel 7 (2442 MHz)
PARAMETERS CONDITIONS MIN TYP MAX UNIT
1DSSS 17
2DSSS 17
11CCK 17.25
6OFDM 16.25
Max RMS Output Power measured at 1 dB 9OFDM 16.25 dBm
from IEEE spectral mask or EVM 18OFDM 16
36OFDM 15
54OFDM 13.5
MCS7 (Mixed Mode) 12
Transmit center frequency accuracy –20 20 ppm
(1) Channel-to-channel variation is up to 2 dB. The edge channels (2412 and 2472 MHz) have reduced TX power to meet FCC emission
limits.
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4.11 Timing Characteristics
4.11.1 SPI Host Interface Timings
Figure 4-6. SPI Host Interface Timing(1)
SYMBOL PARAMETER MIN MAX UNIT
F Clock frequency 20 MHz
TCLK Clock period 41.6 0.35 × VBAT ns
Duty cycle 45% 55%
Tis RX setup time: minimum time in which data is stable before 4 ns
capture edge
Tih RX hold time: minimum time in which data is stable after 4 ns
capture edge
Tod TX setup propagation time: maximum time from launch edge 16 ns
until data is stable
Toh TX hold propagation time: minimum time of data stable after 24 ns
launch edge
CLCapacitive load on interface 20 pF
(1) Ensure that nCS (active-low signal) is asserted 10 ns before the clock is toggled. nCS can be deasserted 10 ns after the clock edge
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VBAT and VIO
nRESET
nHIB
STATE
tT1t
RESET HW INIT FW INIT Device ready to
serve API calls
tT2t tT3t
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4.11.2 Wake-Up Sequence
Figure 4-7. Wake-Up Sequence
Table 4-1. First-Time Power-Up and Reset Removal Timing Requirements (32K XTAL)
ITEM NAME DESCRIPTION MIN TYP MAX
Depends on application board power supply, decap, and
T1 Supply settling time 3 ms
so on
Hardware wakeup
T2 25 ms
time 32-kHz XTAL settling + firmware initialization time +
T3 Initialization time 1.35 s
radio calibration
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VBAT and VIO
nRESET
nHIB
STATE
tTHIB_MINt
ACTIVE HIBERNATE HW + FW INIT HIBERNATE
tTWAKEUP_FROM_HIBt
ACTIVE
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4.11.3 Wakeup from Hibernate
Figure 4-8 shows the timing diagram for wakeup from the hibernate state.
Figure 4-8. nHIB Timing Diagram
NOTE
The internal 32.768-kHz crystal oscillator is kept enabled by default when the chip goes to
hibernate in response to nHIB being pulled low.
Table 4-2. nHIB Timing Requirements(1)
ITEM NAME DESCRIPTION MIN TYP MAX
Thib_min Minimum hibernate time Minimum LOW pulse width of nHIB 10 ms
Twake_from_hib Hardware wakeup time plus See (2). 50 ms
firmware initialization time
(1) Ensure that the nHIB low duration is not less than the specified width under all conditions, including power-ON, MCU hibernation, and so
forth.
(2) If temperature changes by more than 20°C, initialization time from HIB can increase by 200 ms due to radio calibration.
4.11.4 Interfaces
This section describes the interfaces that are supported by the CC3100 module:
Host SPI
Host UART
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CC3100 (slave) MCU
HOST_SPI_CLK
HOST_SPI_nCS
HOST_SPI_MISO
HOST_SPI_MOSI
HOST_INTR
SPI_CLK
SPI_nCS
SPI_MISO
SPI_MOSI
INTR
SWAS031-027
GPIO
nHIB
I3 I2 I4
I6 I7
I9
SWAS032-017
CLK
MISO
MOSI
I8
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4.11.4.1 Host SPI Interface Timing
Figure 4-9. Host SPI Interface Timing
Table 4-3. Host SPI Interface Timing Parameters
PARAMETER PARAMETER(1) PARAMETER NAME MIN MAX UNIT
NUMBER
I1 F Clock frequency @ VBAT = 3.3 V 20 MHz
Clock frequency @ VBAT 2.1 V 12
I2 tclk(2) Clock period 50 ns
I3 tLP Clock low period 25 ns
I4 tHT Clock high period 25 ns
I5 D Duty cycle 45% 55%
I6 tIS RX data setup time 4 ns
I7 tIH RX data hold time 4 ns
I8 tOD TX data output delay 20
I9 tOH TX data hold time 24 ns
(1) The timing parameter has a maximum load of 20 pf at 3.3 V.
(2) Ensure that nCS (active-low signa)l is asserted 10 ns before the clock is toggled. nCS can be deasserted 10 ns after the clock edge.
4.11.4.2 SPI Host Interface
The device interfaces to an external host using the SPI interface. The CC3100 device can interrupt the
host using the HOST_INTR line to initiate the data transfer over the interface. The SPI host interface can
work up to a speed of 20 MHz.
Figure 4-10 shows the SPI host interface.
Figure 4-10. SPI Host Interface
Table 4-4 lists the SPI host interface pins.
Copyright © 2014, Texas Instruments Incorporated Specifications 19
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HOST MCU
UART
RTS
CTS
TX
RX
HOST_INTR(IRQ)
CC3100 SL
UART
RTS
CTS
TX
RX
HOST_INTR(IRQ)
SWAS031-088
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Table 4-4. SPI Host Interface
Pin Name Description
HOST_SPI_CLK Clock (up to 20 MHz) from MCU host to CC3100 device
HOST_SPI_nCS CS (active low) signal from MCU host to CC3100 device
HOST_SPI_MOSI Data from MCU host to CC3100 device
HOST_INTR Interrupt from CC3100 device to MCU host
HOST_SPI_MISO Data from CC3100 device to MCU host
nHIB Active-low signal that commands the CC3100 device to enter hibernate mode (lowest power
state)
4.11.4.3 Host UART
The SimpleLink device requires the UART configuration described in Table 4-5.
Table 4-5. SimpleLink UART Configuration
Property Supported CC3100 Configuration
Baud rate 115200 bps, no auto-baud rate detection, can be changed by the host up to 3 Mbps using a special command
Data bits 8 bits
Flow control CTS/RTS
Parity None
Stop bits 1
Bit order LSBit first
Host interrupt polarity Active high
Host interrupt mode Rising edge or level 1
Endianness Little-endian only(1)
(1) The SimpleLink device does not support automatic detection of the host length while using the UART interface.
4.11.4.3.1 5-Wire UART Topology
Figure 4-11 shows the typical 5-wire UART topology comprised of 4 standard UART lines plus one IRQ
line from the device to the host controller to allow efficient low power mode.
Figure 4-11. Typical 5-Wire UART Topology
This is the typical and recommended UART topology because it offers the maximum communication
reliability and flexibility between the host and the SimpleLink device.
4.11.4.3.2 4-Wire UART Topology
The 4-wire UART topology eliminates the host IRQ line (see Figure 4-12). Using this topology requires
one of the following conditions to be met:
Host is always awake or active.
Host goes to sleep but the UART module has receiver start-edge detection for auto wakeup and does
not lose data.
20 Specifications Copyright © 2014, Texas Instruments Incorporated
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HOST MCU
UART
RTS
CTS
TX
RX
H_IRQ
CC3100 SL
UART
RTS
CTS
TX
RX
H_IRQ
SWAS031-090
X
X
HOST MCU
UART
RTS
CTS
TX
RX
H_IRQ
CC3100 SL
UART
RTS
CTS
TX
RX
H_IRQ
SWAS031-089
X
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Figure 4-12. 4-Wire UART Configuration
4.11.4.3.3 3-Wire UART Topology
The 3-wire UART topology requires only the following lines (see Figure 4-13):
RX
TX
CTS
Figure 4-13. 3-Wire UART Topology
Using this topology requires one of the following conditions to be met:
Host always stays awake or active.
Host goes to sleep but the UART module has receiver start-edge detection for auto wakeup and does
not lose data.
Host can always receive any amount of data transmitted by the SimpleLink device because there is no
flow control in this direction.
Because there is no full flow control, the host cannot stop the SimpleLink device to send its data; thus, the
following parameters must be carefully considered:
Max baud rate
RX character interrupt latency and low-level driver jitter buffer
Time consumed by the user's application
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5 Detailed Description
5.1 Overview
5.1.1 Module Features
5.1.1.1 WLAN
802.11b/g/n integrated radio, modem, and MAC supporting WLAN communication as a BSS station
with CCK and OFDM rates in the 2.4-GHz ISM band
Auto-calibrated radio with a single-ended 50-Ωinterface enables easy connection to the antenna
without requiring expertise in radio circuit design.
Advanced connection manager with multiple user-configurable profiles stored in an NVMEM allows
automatic fast connection to an access point without user or host intervention.
Supports all common Wi-Fi security modes for personal and enterprise networks with on-chip security
accelerators
SmartConfig technology: A 1-step, 1-time process to connect a CC3100MOD-enabled device to the
home wireless network, removing dependency on the I/O capabilities of the host MCU; thus, it is
usable by deeply embedded applications.
802.11 transceiver mode: Allows transmitting and receiving of proprietary data through a socket
without adding MAC or PHY headers. This mode provides the option to select the working channel,
rate, and transmitted power. The receiver mode works together with the filtering options.
5.1.1.2 Network Stack
Integrated IPv4 TCP/IP stack with BSD socket APIs for simple Internet connectivity with any MCU,
microprocessor, or ASIC
Support of eight simultaneous TCP, UDP, or RAW sockets
Built-in network protocols: ARP, ICMP, DHCP client, and DNS client for easy connection to the local
network and the Internet
Service discovery: Multicast DNS service discovery lets a client advertise its service without a
centralized server. After connecting to the access point, the CC3100MOD provides critical information,
such as device name, IP, vendor, and port number.
5.1.1.3 Host Interface and Driver
Interfaces over a 4-wire serial peripheral interface (SPI) with any MCU or a processor at a clock speed
of 20 MHz.
Interfaces over UART with any MCU with a baud rate up to 3 Mbps. A low footprint driver is provided
for TI MCUs and is easily ported to any processor or ASIC.
Simple APIs enable easy integration with any single-threaded or multithreaded application.
5.1.1.4 System
Works from a single preregulated power supply or connects directly to a battery
Ultra-low leakage when disabled (hibernate mode) with a current of less than 7 µA with the RTC
running
Integrated clock sources
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5.2 Functional Block Diagram
Figure 5-1 shows the functional block diagram of the CC3100MOD SimpleLink Wi-Fi solution.
Figure 5-1. Functional Block Diagram
5.3 Wi-Fi Network Processor Subsystem
The Wi-Fi network processor subsystem includes a dedicated ARM MCU to completely offload the host
MCU along with an 802.11 b/g/n radio, baseband, and MAC with a powerful crypto engine for a fast,
secure WLAN and Internet connections with 256-bit encryption. The CC3100MOD supports station, AP,
and Wi-Fi Direct modes. The module also supports WPA2 personal and enterprise security and WPS 2.0.
The Wi-Fi network processor includes an embedded IPv4 TCP/IP stack.
Table 5-1 summarizes the NWP features.
Table 5-1. Summary of Features Supported by the NWP Subsystem
ITEM DOMAIN CATEGORY FEATURE DETAILS
1 TCP/IP Network Stack IPv4 Baseline IPv4 stack
2 TCP/IP Network Stack TCP/UDP Base protocols
3 TCP/IP Protocols DHCP Client and server mode
4 TCP/IP Protocols ARP Support ARP protocol
5 TCP/IP Protocols DNS/mDNS DNS Address resolution and local server
6 TCP/IP Protocols IGMP Up to IGMPv3 for multicast management
7 TCP/IP Applications mDNS Support multicast DNS for service publishing over IP
8 TCP/IP Applications mDNS-SD Service discovery protocol over IP in local network
9 TCP/IP Applications Web Sever/HTTP Server URL static and dynamic response with template.
10 TCP/IP Security TLS/SSL TLS v1.2 (client/server)/SSL v3.0
11 TCP/IP Security TLS/SSL For the supported Cipher Suite, go to SimpleLink Wi-Fi
CC3100 SDK.
12 TCP/IP Sockets RAW Sockets User-defined encapsulation at WLAN MAC/PHY or IP
layers
13 WLAN Connection Policies Allows management of connection and reconnection
policy
14 WLAN MAC Promiscuous mode Filter-based Promiscuous mode frame receiver
15 WLAN Performance Initialization time From enable to first connection to open AP less than
50 ms
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Table 5-1. Summary of Features Supported by the NWP Subsystem (continued)
ITEM DOMAIN CATEGORY FEATURE DETAILS
16 WLAN Performance Throughput UDP = 16 Mbps
17 WLAN Performance Throughput TCP = 13 Mbps
18 WLAN Provisioning WPS2 Enrollee using push button or PIN method.
19 WLAN Provisioning AP Config AP mode for initial product configuration (with
configurable Web page and beacon Info element)
20 WLAN Provisioning SmartConfig Alternate method for initial product configuration
21 WLAN Role Station 802.11bgn Station with legacy 802.11 power save
22 WLAN Role Soft AP 802.11 bg single station with legacy 802.11 power
save
23 WLAN Role P2P P2P operation as GO
24 WLAN Role P2P P2P operation as CLIENT
25 WLAN Security STA-Personal WPA2 personal security
26 WLAN Security STA-Enterprise WPA2 enterprise security
27 WLAN Security STA-Enterprise EAP-TLS
28 WLAN Security STA-Enterprise EAP-PEAPv0/TLS
29 WLAN Security STA-Enterprise EAP-PEAPv1/TLS
30 WLAN Security STA-Enterprise EAP-PEAPv0/MSCHAPv2
31 WLAN Security STA-Enterprise EAP-PEAPv1/MSCHAPv2
32 WLAN Security STA-Enterprise EAP-TTLS/EAP-TLS
33 WLAN Security STA-Enterprise EAP-TTLS/MSCHAPv2
34 WLAN Security AP-Personal WPA2 personal security
5.4 Power-Management Subsystem
The CC3100 power-management subsystem contains DC-DC converters to accommodate the differing
voltage or current requirements of the system. The module can operate from an input voltage ranging from
2.3 V to 3.6 V and can be directly connected to 2xAA Alkaline batteries.
The CC3100MOD is a fully integrated module based WLAN radio solution used on an embedded system
with a wide-voltage supply range. The internal power management, including DC-DC converters and
LDOs, generates all of the voltages required for the module to operate from a wide variety of input
sources. For maximum flexibility, the module can operate in the modes described in the following sections.
5.4.1 VBAT Wide-Voltage Connection
In the wide-voltage battery connection, the module is powered directly by the battery. All other voltages
required to operate the device are generated internally by the DC-DC converters. This scheme is the most
common mode for the device as it supports wide-voltage operation from 2.3 to 3.6 V.
5.5 Low-Power Operating Modes
This section describes the low-power modes supported by the module to optimize battery life.
5.5.1 Low-Power Deep Sleep
The low-power deep-sleep (LPDS) mode is an energy-efficient and transparent sleep mode that is entered
automatically during periods of inactivity based on internal power optimization algorithms. The module
draws about 7 µA from the supply in this low-power mode. The module can wake up in less than 3 ms
from the internal timer or from any incoming host command. Typical battery drain in this mode is 140 µA.
During LPDS mode, the module retains the software state and certain configuration information. The
operation is transparent to the external host; thus, no additional handshake is required to enter or exit this
sleep mode.
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5.5.2 Hibernate
The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small
section of the logic powered directly by the main input supply is retained. The real-time clock (RTC) is kept
running and the module wakes up once the n_HIB line is asserted by the host driver. The wake-up time is
longer than LPDS mode at about 50 ms.
NOTE
Wake-up time can be extended to 75 ms if a patch is loaded from the serial flash.
Copyright © 2014, Texas Instruments Incorporated Detailed Description 25
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HOST CONTROL
LOGGING
(DEBUG)
HOST CONTROL/
FLASH PROGRAM
The electrolytic capacitor
is to be added based on
the battery type, routing
resistance and current
drawn by the CC3100
(optional)
Matching circuit shown
below is for the antenna.
The module is matched
internally to 50 Ohm
VCC (2.3 to 3.6V)
R2
100K
TP1
R3
10K
C3
220uF
TP3
C2
1.0pF
L1 3.6nH
Feed
E1
2.45GHz Ant
TP2
U1
CC3100MOD
GND
1GND
2
NC
3
nHIB 4
SPI_CLK 5
SPI_DIN 6
SPI_DOUT 7
SPI_nCS 8
NC 9
NC 10
IRQ 11
NC
12
NC 13
NC 14
NC 15
GND
16
NC 17
NC
18
NC
19
NC
20
RESERVED
21
NC
22
TCXO_EN/SOP2 23
SOP1 24
ANT_SEL_1 25
ANT_SEL_2 26
GND
27
GND
28
NC
29
GND
30
RF_BG 31
GND
32
NC
33
SOP0 34
nRESET
35
VBAT_DCDC_ANA
36
VBAT_DCDC_PA
37
GND
38
NC
39
VBAT_DCDC_DIG_IO
40
NC
41
NC
42
GND
43
UART1_nRTS 44
NC
45
UART1_TX 46
UART1_RX 47
TEST_58 48
TEST_59 49
TEST_60 50
UART1_nCTS 51
TEST_62 52
NC 53
NC 54
GND
55 GND
56 GND
57 GND
58 GND
59 GND
60 GND
61 GND
62 GND
63
TP4
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6 Applications, Implementation, and Layout
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
6.1 Reference Schematics
Figure 6-1 shows the reference schematic for the CC3100MOD module.
Figure 6-1. CC3100MOD Module Reference Schematic
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6.2 Bill of Materials(1)
PART
QUANTITY VALUE MANUFACTURER PART NUMBER DESCRIPTION
REFERENCE
SimpleLink Wi-Fi MCU
1 U1 CC3100MOD Texas Instruments CC3100MODR11MAMOB Module
ANT Bluetooth WLAN
1 E1 2.45-GHz Ant Taiyo Yuden AH316M245001-T ZigBee®WIMAX
Murata Electronics North CAP CER 1 pF 50 V
1 C2 1.0 pF GJM1555C1H1R0BB01D
America NP0 0402
Murata Electronics North INDUCTOR 3.6 NH
1 L1 3.6 nH LQP15MN3N6B02D
America 0.1 NH 0402
(1) Resistors are not shown here. Any resistor of 5% tolerance can be used.
6.3 Layout Recommendations
6.3.1 RF Section (Placement and Routing)
Figure 6-2. RF Section Layout
Being wireless device, the RF section gets the top priority in terms of layout. It is very important for the RF
section to be laid out correctly to get the optimum performance from the device. A poor layout can cause
low output power, EVM degradation, sensitivity degradation and mask violations.
Copyright © 2014, Texas Instruments Incorporated Applications, Implementation, and Layout 27
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6.3.2 Antenna Placement and Routing
The antenna is the element used to convert the guided waves on the PCB traces to the free space
electromagnetic radiation. The placement and layout of the antenna is the key to increased range and
data rates.
The following points need to be observed for the antenna.
SR NO. GUIDELINES
1 Place the antenna on an edge or corner of the PCB
2 Make sure that no signals are routed across the antenna elements on all the layers of the
PCB
3 Most antennas, including the chip antenna used on the booster pack require ground
clearance on all the layers of the PCB. Ensure that the ground is cleared on inner layers
as well.
4 Ensure that there is provision to place matching components for the antenna. These need
to be tuned for best return loss once the complete board is assembled. Any plastics or
casing should also be mounted while tuning the antenna as this can impact the
impedance.
5 Ensure that the antenna impedance is 50 Ωas the device is rated to work only with a
50-Ωsystem.
6 In case of printed antenna, ensure that the simulation is performed with the solder mask
in consideration.
7 Ensure that the antenna has a near omni-directional pattern.
8 The feed point of the antenna is required to be grounded
9 To use the FCC certification of the Booster pack board, the antenna used should be of
the same gain or lesser. In addition, the Antenna design should be exactly copied
including the Antenna traces.
Table 6-1. Recommended Components
CHOICE PART NUMBER MANUFACTURER NOTES
1 AH316M245001-T Taiyo Yuden Can be placed on edge of the
PCB and uses very less PCB
space
2 RFANT5220110A2T Walsim Need to place on the corner of
PCB
28 Applications, Implementation, and Layout Copyright © 2014, Texas Instruments Incorporated
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W
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6.3.3 Transmission Line
The RF signal from the device is routed to the antenna using a CPW-G (Coplanar Waveguide with
ground) structure. This structure offers the maximum isolation across filter gap and the best possible
shielding to the RF lines. In addition to the ground on the L1 layer, placing GND vias along the line also
provides additional shielding
Figure 6-3. Coplanar Waveguide (Cross Section) with GND and Via Stitching
Figure 6-4. CPW with GND (Top View)
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The recommended values for the PCB are provided for 4- and 2-layer boards in Table 6-2 and Table 6-3,
respectively.
Table 6-2. Recommended PCB Values for 4-Layer Board (L1-L2 = 10 mils)
PARAMETER VALUE UNITS
W 20 mils
S 18 mils
H 10 mils
Er (FR-4 substrate) 4
Table 6-3. Recommended PCB Values for 2-Layer Board (L1-L2 = 40 mils)
PARAMETER VALUE UNITS
W 35 mils
S 6 mils
H 40 mils
Er (FR-4 substrate) 3.9
6.3.4 General Layout Recommendation
1. Have a solid ground plane and ground vias under the module for stable system and thermal
dissipation.
2. Do not run signal traces underneath the module on a layer where the module is mounted.
3. RF traces must have 50-Ωimpedance
4. RF trace bends must be gradual with a maximum bend of approximately 45 degrees and with trace
mitered.
5. RF traces must not have sharp corners.
6. There must be no traces or ground under the antenna section.
7. RF traces must have via stitching on the ground plane beside the RF trace on both sides.
8. RF traces must be as short as possible. The antenna, RF traces, and the module must be on the edge
of the PCB product in consideration of the product enclosure material and proximity.
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7 Environmental Requirements and Specifications
7.1 Temperature
7.1.1 PCB Bending
The PCB bending specification shall maintain planeness at a thickness of less than 0.1 mm.
7.2 Handling Environment
7.2.1 Terminals
The product is mounted with motherboard through land grid array (LGA). To prevent poor soldering, do
not touch the LGA portion by hand.
7.2.2 Falling
The mounted components will be damaged if the product falls or is dropped. Such damage may cause the
product malfunction.
7.3 Storage Condition
7.3.1 Moisture Barrier Bag Before Opened
A moisture barrier bag must be stored in a temperature of less than 30°C with humidity under 85% RH.
The calculated shelf life for the dry-packed product shall be a 12 months from the date the bag is sealed.
7.3.2 Moisture Barrier Bag Open
Humidity indicator cards must be blue, < 30%.
7.4 Baking Conditions
Products require baking before mounting if:
Humidity indicator cards read > 30%
Temp < 30°C, humidity < 70% RH, over 96 hours
Baking condition: 90°C, 12–24 hours
Baking times: 1 time
7.5 Soldering and Reflow Condition
1. Heating method: Conventional Convection or IR/convection
2. Temperature measurement: Thermocouple d = 0.1 mm to 0.2 mm CA (K) or CC (T) at soldering
portion or equivalent method.
3. Solder paste composition: Sn/3.0 Ag/0.5 Cu
4. Allowable reflow soldering times: 2 times based on the following reflow soldering profile
(see Figure 7-1).
5. Temperature profile: Reflow soldering shall be done according to the following temperature profile (see
Figure 7-1).
6. Peak temp: 245°C
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Figure 7-1. Temperature Profile for Evaluation of Solder Heat Resistance of a Component
(at Solder Joint)
32 Environmental Requirements and Specifications Copyright © 2014, Texas Instruments Incorporated
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X
PREFIX
X = preproduction device
no prefix = production device
CC 3 10 0 MOD R 1 1M A MOB R
DEVICE FAMILY
CC = wireless connectivity
SERIES NUMBER
3 = Wi-Fi Centric
PACKAGE DESIGNATOR
MOB = module
PACKAGING
R = tape/reel
T = small reel
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8 Product and Documentation Support
8.1 Development Support
TI offers an extensive line of development tools, including tools to evaluate the performance of the
processors, generate code, develop algorithm implementations, and fully integrate and debug software
and hardware modules. The tool's support documentation is electronically available within the Code
Composer Studio™ Integrated Development Environment (IDE).
The following products support development of the CC3100MOD applications:
Software Development Tools: Code Composer Studio Integrated Development Environment (IDE):
including Editor C/C++/Assembly Code Generation, and Debug plus additional development tools
Scalable, Real-Time Foundation Software ( DSP/BIOS™), which provides the basic run-time target
software needed to support any CC3100MOD application.
Hardware Development Tools: Extended Development System ( XDS™) Emulator
For a complete listing of development-support tools for the CC3100MOD platform, visit the Texas
Instruments website at www.ti.com. For information on pricing and availability, contact the nearest TI field
sales office or authorized distributor.
8.1.1 Firmware Updates
TI updates features in the service pack for this module with no published schedule. Due to the ongoing
changes, TI recommends that the user has the latest service pack in his or her module for production. To
stay informed, sign up for the SDK Alert Me button on the tools page or www.ti.com/tool/cc3100sdk.
8.2 Device Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of the
CC3100MOD and support tools (see Figure 8-1).
Figure 8-1. CC3100MOD Device Nomenclature
For orderable part numbers of CC3100MOD devices in the MOB package types, see the Package Option
Addendum of this document, the TI website (www.ti.com), or contact your TI sales representative.
Copyright © 2014, Texas Instruments Incorporated Product and Documentation Support 33
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8.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the
respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views;
see TI's Terms of Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster
collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge,
explore ideas and help solve problems with fellow engineers.
TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help
developers get started with Embedded Processors from Texas Instruments and to foster
innovation and growth of general knowledge about the hardware and software surrounding
these devices.
8.4 Trademarks
SimpleLink, Internet-On-a-Chip, SmartConfig, E2E, Code Composer Studio, DSP/BIOS, XDS are
trademarks of Texas Instruments.
ARM is a registered trademark of ARM Limited.
Wi-Fi CERTIFIED, Wi-Fi Direct are trademarks of Wi-Fi Alliance.
Wi-Fi is a registered trademark of Wi-Fi Alliance.
ZigBee is a registered trademark of ZigBee Alliance.
8.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
8.6 Export Control Notice
Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data
(as defined by the U.S., EU, and other Export Administration Regulations) including software, or any
controlled product restricted by other applicable national regulations, received from Disclosing party under
this Agreement, or any direct product of such technology, to any destination to which such export or re-
export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from
U.S. Department of Commerce and other competent Government authorities to the extent required by
those laws.
8.7 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
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9 Mechanical Packaging and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and
revision of this document.
Figure 9-1 shows the CC3100MOD module.
9.1 Mechanical Drawing
Figure 9-1. Mechanical Drawing
Copyright © 2014, Texas Instruments Incorporated Mechanical Packaging and Orderable Information 35
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9.2 Package Option
We offer 2 reel size options for flexibility: a 1000-unit reel and a 250-unit reel.
9.2.1 Packaging Information Package
Orderable Device Status (1) Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL, Peak Temp (3) Op Temp (°C) Device Marking(4) (5)
Drawing
CC3100MODR11MAMOBR ACTIVE MOB 63 1000 RoHS Exempt Ni Au 3, 250°C –20 to 70 CC3100MODR11MAMOB
CC3100MODR11MAMOBT ACTIVE MOB 63 250 RoHS Exempt Ni Au 3, 250°C 20 to 70 CC3100MODR11MAMOB
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
space
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest
availability information and additional product content details.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the
requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified
lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by
weight in homogeneous material)
space
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
space
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device
space
(5) Multiple Device markings will be inside parentheses. Only on Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief
on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third
parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
36 Mechanical Packaging and Orderable Information Copyright © 2014, Texas Instruments Incorporated
Submit Documentation Feedback
Reel Width (W1)
REEL DIMENSIONS
A0
B0
K0
W
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Dimension designed to accommodate the component width
TAPE DIMENSIONS
K0 P1
B0 W
A0
Cavity
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Pocket Quadrants
Sprocket Holes
Q1 Q1
Q2 Q2
Q3 Q3Q4 Q4
Reel
Diameter
User Direction of Feed
P1
CC3100MOD
www.ti.com
SWRS161 DECEMBER 2014
9.2.2 Tape and Reel Information
Reel
Package Reel A0 B0 K0 P1 W Pin1
Device Pins SPQ Width W1
Drawing Diameter (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
(mm)
CC3100MODR11MAMOBR MOB 63 1000 330.0±2.0 44.0 17.85±0.10 20.85±0.10 2.50±0.10 24.00±0.10 44.00±0.30 Q3
CC3100MODR11MAMOBT MOB 63 250 330.0±2.0 44.0 17.85±0.10 20.85±0.10 2.50±0.10 24.00±0.10 44.00±0.30 Q3
Copyright © 2014, Texas Instruments Incorporated Mechanical Packaging and Orderable Information 37
Submit Documentation Feedback
TAPE AND REEL BOX DIMENSIONS
Width (mm)
W
L
H
CC3100MOD
SWRS161 DECEMBER 2014
www.ti.com
Device Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CC3100MODR11MAMOBR MOB 63 1000 354.0 354.0 55.0
CC3100MODR11MAMOBT MOB 63 250 354.0 354.0 55.0
38 Mechanical Packaging and Orderable Information Copyright © 2014, Texas Instruments Incorporated
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com 14-Feb-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
CC3100MODR11MAMOBR ACTIVE QFM MOB 63 1000 TBD Call TI Call TI -20 to 70 CC3100MODR1M2AMOB
Z64-CC31000MODR1
2015DJ3068(M)
3.3V, 400MA
451L-CC3100MODR1
MO-VVSS
001-A08147
CC3100MODR11MAMOBT ACTIVE QFM MOB 63 250 TBD Call TI Call TI -20 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 14-Feb-2018
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
www.ti.com
PACKAGE OUTLINE
C
2X (0.38)
2X (0.42)
2.45 MAX
0.88
0.72 2X 12.7
2X
19.05
30X 1.27
54X 0.81 0.05
9X
2 0.05
1.5
1.5
6X 3
6X 3
20X 1.27
A17.75
17.25 B
20.75
20.25
(0.3) TYP
(0.3)
TYP (0.32)
PADS 1,16,28 & 43
QFM - 2.45 mm max heightMOB0063A
QUAD FLAT MODULE
4221462/B 10/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
AREA
PIN 1 INDEX
0.1
X1)(45
PIN 1 ID
1
2
15
16 17 27
28
29
42
43
44
54
55
57
58
60 63
61
0.15 C A B
0.05 C
56 59 62
SCALE 0.650
www.ti.com
EXAMPLE BOARD LAYOUT
54X ( 0.81)
(1.27) TYP
2X (19.1)
9X ( 2)
(1.5)
6X (3)
(1.5)
6X (3)
2X (16.1)
0.05 MIN
ALL AROUND
(0.65)
TYP
(0.65)
TYP
( 0.2) TYP
VIA
(R0.05)
ALL PADS
( 8.1)
0.05 MIN TYP
QFM - 2.45 mm max heightMOB0063A
QUAD FLAT MODULE
4221462/B 10/2016
NOTES: (continued)
3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments
literature number SLUA271 (www.ti.com/lit/slua271).
LAND PATTERN EXAMPLE
SOLDER MASK DEFINED
SCALE:6X
PKG
PKG
SEE DETAIL
1
2
15
16
17 27
28
29
42
43
44
54
55
57
58
60
63
61
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
9X
(45 X 1)
56
59
62
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SIGNAL PADS DETAIL
www.ti.com
EXAMPLE STENCIL DESIGN
54X ( 0.81)
(1.27) TYP
2X (19.1)
2X (16.1)
(3) TYP
(1.5) TYP
(1.5) TYP
(3) TYP
(R0.05)
TYP
2X ( 0.89) (0.55 TYP)
(0.55) TYP
(R0.05)
TYP
(0.45)
(1.54) (0.55) TYP
(0.55) TYP
( 0.89) TYP
(R0.05) TYP
QFM - 2.45 mm max heightMOB0063A
QUAD FLAT MODULE
4221462/B 10/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
PKG
PKG
1
2
15
16
17 27
28
29
42
43
44
54
55
57
58
60
63
61
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PADS PRINTED SOLDER COVERAGE BY AREA
PAD 55: 77.5 %, PADS 56 - 63: 79%
SCALE:6X
SEE DETAILS
56
59
62
SOLDER MASK EDGE SOLDER MASK
EDGE, TYP
PAD 55 DETAIL
SCALE:10X
METAL
TYP PADS 56 - 63 DETAIL
SCALE:10X
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