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Intel ® Core™ i7 Processor I7 -950
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Processor Specifications:
sSpec Number:
CPU Speed:
PCG:
Bus Speed:
Bus/Core Ratio:
L3 Cache Size:
L3 Cache Speed:
SLBEN
3.06 GHz
08
4.8 GT/s
23
8 MB
Package Type:
Manufacturing Technology:
Core Stepping:
CPUID String:
Thermal Design Power:
Thermal Specification:
VID Voltage Range:
LGA1366
45 nm
D0
106A5
130W
67.9°C
.80V -1.375V
Product Documentation:
http://www.intel.com/design/corei7/documentation.htm
Product Order Codes:
Box Order Code: BX80601950
BXC80601950 OEM Order Code: AT80601002112AA
Supported Features:
?Quad Core
?Enhanced Intel Speedstep ® Technology
?Hyper -Threading Technology 1
?Intel ® EM64T 2
?Intel ® Virtualization Technology
?Enhanced Halt State (C1E)
?Execute Disable Bit 3
Notes:
1/1/1/2 are the available frequency bins (+133 MHz)of Intel ® Turbo Boost Technology that are available for 4,
3, 2, 1 active cores respectively.
Legal Disclaimers:
1 Hyper -Threading Technology requires a computer system with an Intel ® Pentium ® 4 processor or Intel ® Core™ i7 processor
supporting HT Technology and a Hyper -Threading Technology enabled chipset, BIOS and operating system. Performance will vary
depending on the specific hardware and software you use. See http://www.intel.com/info/hyperthreading/ for more information
including details on which processors support HT Technology.
2 Intel ® EM64T requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications
enabled for Intel EM64T. Processor will not operate (including 32 -bit operation) without an Intel EM64T -enabled BIOS. Performance
will vary depending on your hardware and software configurations. See http://www.intel.com/info/em64t for more information
including details on which processors support Intel ® EM64T or consult with your system vendor for more information.
3 Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting
operating system. Check with your PC manufacturer on whether your system delivers Execute Disable Bit functionality.
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