international Rectifier HEXFET Power MOSFET PD-9.597A IRFR310 IRFU310 @ Dynamic dv/dt Rating Repetitive Avalanche Rated p _ @ Surface Mount (IRFR310} Voss = 400V Straight Lead (IRFU310) Available in Tape & Reel 6 Rpgyon) = 3.62 Fast Switching Ease of Paralleling 5 Ip =1.7A Description Third Generation HEXFETs from Internationa! Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. 4 The D-Pak is designed for surface mounting using vapor phase, infrared, or < wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-PAK PAK TO-252AA TO-251AA Absolute Maximum Ratings Parameter ~ Max. _ Units _ Ip @ To = 25C Continuous Drain Current, Vag @ 10 V 1.7 ] lp @ Tc = 100C__| Continuous Drain Current, Vag @ 10 V ee A lom Pulsed Drain Current 60. _ Pp @ Tc= 25C _| Power Dissipation 25 tw Pp @ Ta=25C | Power Dissipation (PCB Mount)** 25 Linear Derating Factor 0.20 | WPC Linear Derating Factor (PCB Mount)** _ 0.020 Ves Gate-to-Source Voltage 20 | Vv Eas Single Pulse Avalanche Energy 86 mJ lAR Avalanche Current _ 1.7 A Ear Repetitive Avalanche Energy oO 2.5 mJ dv/dt Peak Diode Recovery dv/dt __ 4.0 Vins [tu_Iste Junction and Storage Temperature Range -55 to +150 | 6 Soldering Temperature, for 10 seconds 260 (1.6mm from case) _ | Thermal Resistance Parameter Min. Typ. Max. | Units | Rec ____| Junction-to-Case _ 5.0 Roa Junction-to-Ambient (PCB mount)** = 50 CAN Rasa _ Junction-to-Ambient _ _ 110 ** When mounted on 1 square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 1169IRFR310, IRFU310 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. ; Units Test Conditions Vieryoss Drain-to-Source Breakdown Voltage 400 | _ V__ | Vas=0V, Ip= 250A AV prypss/ATy} Breakdown Voltage Temp. Coefficient | 0.47 | | V/C | Reference to 25C, Ip= 1mA Rosjon) Static Drain-to-Source On-Resistance _ _ 3.6 Q | Vaes=10V, ln=1.0A Vasc) Gate Threshold Voltage 2.0 _ 4.0 V__| Vos=Vas, Ip= 250nA Dis Forward Transconductance 0.97 | _ S| Vos=50V, ln=1.0A @ Ipss Drain-to-Source Leakage Current = 28 pA Vos-400V, Vas=OV _ 250 Vos=320V, Vas=0V, Ty=125C lass Gate-to-Source Forward Leakage _ _ 100 nA Vas=20V Gate-to-Source Reverse Leakage = | -100 Ves=-20V Qg Total Gate Charge _ 12 Ip=2.0A Qgs Gate-to-Source Charge | | 19 | nC | Vps=320v Qog Gate-to-Drain ("Miller") Charge _ _ 6.5 Vas=10V See Fig. 6 and 13 ta(on) Turn-On Delay Time _ 7.9 _ Vop=200V tr Rise Time = 9.9 _ ns Ip=2.0A tajott) Turn-Off Delay Time - 21 _ Re=240 ty Fall Time _ 11 = Ro=95Q See Figure 10 Lo Internal Drain Inductance _ 45 | Soo goad ) @ nH | from package Ls Internal Source Inductance |75) and center of die contact $ Ciss Input Capacitance _ 170 = Vas=0V Coss Output Capacitance _ 34 PF | Vps=25V Ciss Reverse Transfer Capacitance _ 6.3 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 17 MOSFET symbol 5 (Body Diode) , A showing the Ism Pulsed Source Current _ _ 6.0 integral reverse @ (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage = = 1.6 V_ | Ty=25C, Is=1.7A, Vas=0V tr Reverse Recovery Time _ 240 | 540 ns | Ty=25C, Ir=2.0A Qn Reverse Recovery Charge | 085 | 16 | uC |di/dt=100A/us @ ton Forward Turn-On Time intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) Vpp=50V, starting Ty=25C, L=52mH Re=25Q, las=1.7A (See Figure 12) \sp<1.7A, di/dt<40A/us, Vop<V(R)Dss, Tys150C @ Pulse width < 300 us; duty cycle <2%. 1170Ip, Drain Current (Amps) Ip, Drain Current (Amps) 4,5V 1 20us PULSE WIDTH To = 25C Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Tco=25C 490f 150C Vpg = 50V 20us_ PULSE WIDTH 4 a Vas, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Rpsyon) Drain-to-Source On Resistance Ip, Drain Current (Amps) (Normalized) IRFR310, IRFU310 20us PULSE WIDTH Te = 150C 404 Vps, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, To=150C a a Ves = 10V 0.0 ~60 -40 -20 0 20 40 60 80 100 120 140 4160 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 1171IRFR310, IRFU310 Cgg + Cag Cag Coa Cas + Capacitance (pF) Ves, Gate-to-Source Voltage (volts) SEE FIGURE 13 sot Vps, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 108 a OPERATION IN THIS AREA LIMITED a BY ADs (an) E < s z E Cc 2 x 10 a3 ~ Oo o & a & 8 & @ g @ At > - @ Qa & L g T ~ _ Ty=150C 4 Veg = OV SINGLE PULSE oa 0.6 0.8 1.0 12 1.4 ON TES ag ge ag Vsp, Source-to-Drain Voltage (volts) Vos, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 1172{p, Drain Current (Amps) 25 Fig 9. IRFR310, IRFU310 Vos MA DUT. a 7 - Von YPt0Vv Puise Width < tus Duty Factor < 0.1% <r 50 75 100 125 150 To, Case Temperature (C) taon) tr tao tr Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature 10 o Q 3 N LY o 1 a c 8 Q a o ac 3 SINGLE PULSE Ee (THERMAL_RESPONSE) Eo. + 2 LS o - tee tad NOTES: 4. DUTY FACTOR, D=t1/t2 2. PEAK Ty=Pom x Zthjc + Te 10 105 1074 103 10? 0.4 4 10 t,, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1173IRFR310, IRFU310 Vary tp to obtain Vbs > required las Ip TOP .76A 1.14 =~ BOTTOM 1.74 s E =~ ey oO c uw > oO Fig 12a. Unclamped Inductive Test Circuit 2 ao oO 2 oO G t uw DD = 50V Vos 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) as T- Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator r Same Type as D.UT. | | 50KQ lyev /2RF | .SpF _______. Q, | | tovf a SSS SSS] | + Gas + Sap 4 Ves > Ve amat | Charge - Ie * Ip Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See pages 1512, 1513 Intemational Rectifier Appendix C: Part Marking Information See page 1518 Appendix D: Tape & Reel Information See page 1523 1174