Revised May 2005 74LCX126 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description Features The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. 5V tolerant inputs and outputs The 74LCX126 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Supports live insertion/withdrawal (Note 1) 2.3V-3.6V VCC specifications provided 5.5 ns tPD max (VCC 3.3V), 10 PA ICC max Power down high impedance inputs and outputs r24 mA output drive (VCC 3.0V) Implements patented noise/EMI reduction circuitry Latch-up performance exceeds JEDEC 78 conditions ESD performance: Human body model ! 2000V Machine model ! 100V Leadless Pb-Free DQFN package Note 1: To ensure the high-impedance state during power up or down, OE should be tied to GND through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Package Description Number 74LCX126M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX126SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX126BQX (Note 2) MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 74LCX126MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX126MTCX_NL (Note 3) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 2: DQFN package available in Tape and Reel only. Note 3: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated. (c) 2005 Fairchild Semiconductor Corporation DS500386 www.fairchildsemi.com 74LCX126 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs September 2000 74LCX126 Connection Diagrams Logic Symbol Pin Assignments for SOIC, SOP, and TSSOP IEEE/IEC Pin Descriptions Pin Names (Top View) Pad Assignments for DQFN Description An Inputs OEn Output Enable Inputs On Outputs Truth Table Inputs Output OEn An H L L H H H X Z L H HIGH Voltage Level L LOW Voltage Level (Top Through View) www.fairchildsemi.com 2 On Z X High Impedance Immaterial Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current Value IO DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature Conditions 0.5 to 7.0 0.5 to 7.0 0.5 to 7.0 0.5 to VCC 0.5 50 50 50 r50 r100 r100 65 to 150 Units V V Output in 3-STATE V Output in HIGH or LOW State (Note 5) VI GND V mA VO GND mA VO ! VCC mA mA mA qC Recommended Operating Conditions (Note 6) Symbol VCC Parameter VI Input Voltage VO Output Voltage IOH/IOL Min Max Operating 2.0 3.6 Data Retention 1.5 3.6 Supply Voltage Output Current TA Free-Air Operating Temperature 't/'V Input Edge Rate, VIN 0.8V-2.0V, VCC 0 5.5 HIGH or LOW State 0 VCC 3-STATE 0 5.5 VCC 3.0V 3.6V VCC 2.7V 3.0V VCC 2.3V 2.7V r24 r12 r8 Units V V V mA 40 85 qC 0 10 ns/V 3.0V Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed. Note 6: Unused inputs or I/Os must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH Parameter Conditions HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH 100 PA IOH = -8 mA VOL LOW Level Output Voltage 40qC to 85qC Min 2.3 2.7 1.7 2.7 3.6 2.0 Max 2.3 2.7 0.7 0.8 2.3 3.6 VCC 0.2 2.3 1.8 2.7 2.2 IOH 18 mA 3.0 2.4 2.2 IOH 24 mA 3.0 100 PA 2.3 3.6 0.2 IOL = 8mA 2.3 0.6 IOL 12 mA 2.7 0.4 IOL 16 mA 3.0 0.4 IOL 24 mA IOZ 3-STATE Output Leakage 0 d VO d 5.5V VI V IH or VIL VI or VO 5.5V 3 V V IOL 0 d VI d 5.5V Units V 2.7 3.6 12 mA Input Leakage Current Power-Off Leakage Current TA (V) IOH II IOFF VCC V 3.0 0.55 2.3 3.6 r5.0 PA 2.3 3.6 r5.0 PA 0 10 PA www.fairchildsemi.com 74LCX126 Absolute Maximum Ratings(Note 4) 74LCX126 DC Electrical Characteristics Symbol (Continued) Parameter VCC Conditions TA (V) ICC Quiescent Supply Current VI VCC or GND 3.6V d VI, VO d 5.5V (Note 7) 'ICC Increase in ICC per Input VIH VCC 0.6V 40qC to 85qC Min Units Max 2.3 3.6 10 2.3 3.6 r10 2.3 3.6 500 PA PA Note 7: Outputs disabled or 3-STATE only. AC Electrical Characteristics TA Symbol tPHL Parameter Propagation Delay tPLH tPZL Output Enable Time tPZH tPLZ Output Disable Time tPHZ tOSHL VCC CL 40qC to 85qC, RL 3.3V r 0.3V VCC 50 pF CL 500: 2.7V VCC 50 pF CL 2.5V r 0.2V 30 pF Min Max Min Max Min 1.5 5.5 1.5 6.0 1.5 6.6 1.5 5.5 1.5 6.0 1.5 6.6 1.5 6.0 1.5 7.0 1.5 7.8 1.5 6.0 1.5 7.0 1.5 7.8 1.5 5.5 1.5 6.5 1.5 6.6 1.5 5.5 1.5 6.5 1.5 6.6 Output to Output Skew (Note 8) Max 1.0 tOSLH Units ns ns ns ns 1.0 Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL VCC Conditions TA 25qC (V) Typical CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 CL 30 pF, VIH 2.5V, VIL 0V 2.5 0.6 CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 CL 30 pF, VIH 2.5V, VIL 0V 2.5 0.6 Units V V Capacitance Symbol Parameter Conditions CIN Input Capacitance VCC Open, VI COUT Output Capacitance VCC 3.3V, VI 0V or VCC CPD Power Dissipation Capacitance VCC 3.3V, VI 0V or VCC, f www.fairchildsemi.com 4 0V or VCC 10 MHz Typical Units 7 pF 8 pF 25 pF 74LCX126 AC Loading and Waveforms Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC 3.3 r 0.3V VCC x 2 at VCC 2.5 r 0.2V tPZH,tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output Low Enable and Disable Times for Logic Propagation Delay, Pulse Width and trec Waveforms Setup Time, Hold TIme and Recovery TIme for Logic 3-STATE Output High Enable and Disable TImes for Logic trise and tfall FIGURE 2. Waveforms (Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns) Symbol VCC 3.3V r 0.3V 2.7V 2.5V r 0.2V Vmi 1.5V 1.5V VCC/2 Vmo 1.5V 1.5V VCC/2 Vx VOL 0.3V VOL 0.3V VOL 0.15V Vy VOH 0.3V VOH 0.3V VOH 0.15V 5 www.fairchildsemi.com 74LCX126 Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 Tape Format for DQFN Package Tape Number Cavity Designator Section Cavities Status Status Leader (Start End) 125 (typ) Empty Sealed Carrier 2500/3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed BQX Cover Tape TAPE DIMENSIONS inches (millimeters) REEL DEMENSIONS Inches (millimeters) Tape Size 12mm A B C D N W1 W2 13.0 0.059 0.512 0.795 7.008 0.488 0.724 (330) (1.50) (13.00) (20.20) (178) (12.4) (18.4) 7 www.fairchildsemi.com 74LCX126 Tape and Reel Specification 74LCX126 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 8 74LCX126 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 9 www.fairchildsemi.com 74LCX126 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm Package Number MLP014A www.fairchildsemi.com 10 74LCX126 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 11 www.fairchildsemi.com