© 2005 Fairchild Semiconductor Corporation DS500386 www.fairchildsemi.com
September 2000
Revised May 2005
74LCX126 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs
74LCX126
Low Voltage Quad Buffer
with 5V Tolerant Inputs and Output s
General Descript ion
The LCX126 contains four indepe ndent non-in verting buff-
ers with 3-STATE outputs. Each output is disabled when
the associated output-enable (OE) input is LOW. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
The 74LCX126 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
■5V tolerant inputs and outputs
■2.3V–3.6V VCC specifications provided
■5.5 ns tPD max (VCC
3.3V), 10
P
A ICC max
■Power down high impedance inputs and outputs
■Supports live insertion/withdrawal (Note 1)
■
r
24 mA output drive (VCC
3.0V)
■Implements patented noise/EMI reduction circuitry
■Latch-up performance exceeds JEDEC 78 conditions
■ESD performa nce :
Human bod y mode l
!
2000V
Machine model
!
100V
■Leadless Pb-Free DQFN package
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to GND through a pull-up resistor: the minimum value or the
resisto r is det ermin ed by the current-so urc ing capa bility of the driv er.
Ordering Code:
Device a l s o av ailable in Tape and R eel. Specify by appending su ffix le t te r “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 2: DQFN packag e av ailable in Tape and Reel only.
Note 3: “_NL” indicates Pb-Fre e pac k age (per JE D EC J -STD-0 20B). Ple as e use order number as indi c at ed.
Order Number Package Package Description
Number
74LCX126M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX126SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX126BQX
(Note 2) MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 3.0mm
74LCX126MTC MTC14 14-Lead Thin Shrink Smal l Outli ne Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX126MTCX_NL
(Note 3) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
www.fairchildsemi.com 2
74LCX126
Connection Diagrams
Pin Assign ments for SOIC, SO P, and TSSOP
(Top View)
Pad Assignme nts for DQFN
(Top Through View)
Logic Symbol
IEEE/IEC
Pin Descriptions
Truth Table
H
HIGH Vo ltage Level Z
High Impedance
L
LOW Voltage Level X
Immaterial
Pin Nam es Description
AnInputs
OEnOutput Enab le Inputs
OnOutputs
Inputs Output
OEnAnOn
HLL
HHH
LXZ
3 www.fairchildsemi.com
74LCX126
Absolute Maximum Ratings(Note 4)
Recommended Operating Conditions (Note 6)
Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The para metric value s defined in the Elec trical Cha racteristic s tables are n ot guarantee d at the A bsolute Ma ximum R atings . The “Recom-
mended Operating Conditions” table will defin e th e c onditions f or ac t ual devic e operation.
Note 5: IO Absolu te Maximu m Rating must be observed.
Note 6: Unused input s o r I/Os must b e held HIGH or LOW. They m ay not f loat.
DC Electrical Characteristics
Symbol Parameter Value Conditions Units
VCC Supply Voltage
0.5 to
7.0 V
VIDC Input Voltage
0.5 to
7.0 V
VODC Output Voltage
0.5 to
7.0 Output in 3-S TATE V
0.5 to VCC
0.5 Output in HIGH or LOW State (Note 5) V
IIK DC Input Diode Current
50 VI
GND mA
IOK DC Output Diode Current
50 VO
GND mA
50 VO
!
VCC
IODC Output Source/Sink Current
r
50 mA
ICC DC Supply Current per Supply Pin
r
100 mA
IGND DC Ground Current per Ground Pin
r
100 mA
TSTG Storage Temperature
65 to
150
q
C
Symbol Parameter Min Max Units
VCC Supply Voltage Operating 2.0 3.6 V
Data Retention 1.5 3.6
VIInput Voltage 05.5V
VOOutput Voltage HIGH or LOW State 0 VCC V
3-STATE 0 5.5
IOH/IOL Output Curr en t VCC
3.0V
3.6V
r
24 mAVCC
2.7V
3.0V
r
12
VCC
2.3V
2.7V
r
8
TAFree-Air Operating Temperature
40 85
q
C
'
t/
'
V Input Edge Rate, VIN
0.8V–2.0V, VCC
3.0V 0 10 ns/V
Symbol Parameter Conditions VCC TA
40
q
C to
85
q
CUnits
(V) Min Max
VIH HIGH Level Input Voltage 2.3
2.7 1.7 V
2.7
3.6 2.0
VIL LOW Level Input Volt age 2.3
2.7 0.7 V
2.7
3.6 0.8
VOH HIGH Level Output Voltage IOH
100
P
A2.3
3.6 VCC
0.2
V
IOH = -8 mA 2.3 1.8
IOH
12 mA 2.7 2.2
IOH
18 mA 3.0 2.4
IOH
24 mA 3.0 2.2
VOL LOW Level Output Voltage IOL
100
P
A2.3
3.6 0.2
V
IOL = 8mA 2.3 0.6
IOL
12 mA 2.7 0.4
IOL
16 mA 3.0 0.4
IOL
24 mA 3.0 0.55
IIInput Leakage Current 0
d
VI
d
5.5V 2.3
3.6
r
5.0
P
A
IOZ 3-STATE Output Leakage 0
d
VO
d
5.5V 2.3
3.6
r
5.0
P
A
VI
VIH or VIL
IOFF Power-Off Leakage Current VI or VO
5.5V 0 10
P
A
www.fairchildsemi.com 4
74LCX126
DC Electrical Characteristi cs (Continued)
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristi cs
Note 8: Skew is de fi ned as th e absolut e valu e of the difference betwee n t he ac tu al propaga t ion delay f or any t w o separa t e outputs of t he same device. The
specif ic ation ap plies to an y o ut puts switch ing in the same direc t ion, either HIGH-to- LOW (tOSHL) or LO W-to-HIGH (t OSLH).
Dynamic Switching Characteristics
Capacitance
Symbol Parameter Conditions VCC TA
40
q
C to
85
q
CUnits
(V) Min Max
ICC Quiescent Supply Current VI
VCC or GND 2.3
3.6 10
P
A
3.6V
d
VI, VO
d
5.5V (Note 7) 2.3
3.6
r
10
'
ICC Increase in ICC per Input VIH
VCC
0.6V 2.3
3.6 500
P
A
Symbol Parameter
TA
40
q
C to
85
q
C, RL
500
:
Units
VCC
3.3V
r
0.3V VCC
2.7V VCC
2.5V
r
0.2V
CL
50 pF CL
50 pF CL
30 pF
Min Max Min Max Min Max
tPHL Propagation Delay 1.5 5.5 1.5 6.0 1.5 6.6 ns
tPLH 1.5 5.5 1.5 6.0 1.5 6.6
tPZL Output Enable Time 1.5 6.0 1.5 7.0 1.5 7.8 ns
tPZH 1.5 6.0 1.5 7.0 1.5 7.8
tPLZ Output Disable Time 1.5 5.5 1.5 6.5 1.5 6.6 ns
tPHZ 1.5 5.5 1.5 6.5 1.5 6.6
tOSHL Output to Output Skew (Note 8) 1.0 ns
tOSLH 1.0
Symbol Parameter Conditions VCC TA
25
q
CUnits
(V) Typical
VOLP Quiet Output Dynamic Peak VOL CL
50 pF, VIH
3.3V, VIL
0V 3.3 0.8 V
CL
30 pF, VIH
2.5V, VIL
0V 2.5 0.6
VOLV Quiet Output Dynamic Valley VOL CL
50 pF, VIH
3.3V, VIL
0V 3.3
0.8 V
CL
30 pF, VIH
2.5V, VIL
0V 2.5
0.6
Symbol Parameter Conditions Typical Units
CIN Input Capacitance VCC
Open, VI
0V or VCC 7pF
COUT Output Capacitance VCC
3.3V, VI
0V or VCC 8pF
CPD Power Dissipation Capacitance VCC
3.3V, VI
0V or VCC, f
10 MHz 25 pF
5 www.fairchildsemi.com
74LCX126
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit
(CL incl udes probe and jig capacita nce)
Waveform for Inverting and Non-Inverting Functions
Propagation Delay, Pulse Width and trec Waveforms
3-STATE Output High Enable and
Disable TImes for Logic
3-STATE Output Lo w Enable and
Disable Times for Logic
Setup Time, Hold TI me and Recovery TIme for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns)
Test Switch
tPLH, tPHL Open
tPZL, tPLZ 6V at VCC
3.3
r
0.3V
VCC x 2 at VCC
2.5
r
0.2V
tPZH,tPHZ GND
Symbol VCC
3.3V
r
0.3V 2.7V 2.5V
r
0.2V
Vmi 1.5V 1.5V VCC/2
Vmo 1.5V 1.5V VCC/2
VxVOL
0.3V VOL
0.3V VOL
0.15V
VyVOH
0.3V VOH
0.3V VOH
0.15V
www.fairchildsemi.com 6
74LCX126
Schematic Diagram Generic for LCX Family
7 www.fairchildsemi.com
74LCX126
Tape and Reel Specification
Tape Format for DQFN
TAPE DIMENSIONS inches (millimeters)
REEL DEMENSIONS Inches (millimeters)
Packa ge Tap e Number Cavit y Cove r Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
BQX Carrier 2500/3000 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Tape SizeABCDNW1W2
12mm 13.0 0.059 0.512 0.795 7.008 0.488 0.724
(330) (1.50) (13.00) (20.20) (178) (12.4) (18.4)
www.fairchildsemi.com 8
74LCX126
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
9 www.fairchildsemi.com
74LCX126
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com 10
74LCX126
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm
Packag e Num b er MLP01 4A
11 www.fairchildsemi.com
74LCX126 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide
Package Number MTC14
Fairchild does not assum e any responsibility for use of any circuitry described, no cir cuit patent licenses are im plied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syst ems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use provided in the l abe li ng, can be re a-
sonably expected to result in a significant injury to the
user.
2. A crit ical com ponen t in any com ponen t of a life s uppor t
device or system whose failure to perform can be rea-
sonabl y e xpec ted to cause th e fa i lure of the l ife suppor t
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
