PM50CTJ060-3
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
OUTLINE DRAWING Dimensions in mm
APPLICATION
Air-conditioner, General purpose inverter, servo drives and other motor controls
¡4th gen. planer IGBTs are integrated
¡3φ 50A, 600V Current-sense IGBT type
inverter
¡
Monolithic gate drive & protection logic
¡Detection, protection & status indication
circuits for over-current, short-circuit,
over-temperature & under-voltage
¡
Acoustic noise-less 3.7kW class inverter
application
LABEL
21
16 17 18 19 20
3546 879 1110 12 1413 15
PNUVW
A : DETAIL B : DETAIL
2–R5
2–φ4.5
56
±0.8
84.5
±0.5
3.5
±0.5
33.6
±0.8
44
±1
5.5 5.5 5.5
10.5
3.5
8
6.35
0.8
±0.1
8
±0.5
3.4
±0.1
3.45
±1.25
7.95 (1)
16
±1
19.4
±1
X=3.56±0.25mm
8.
9.
10.
11.
12.
13.
14.
Terminal code
1.
2.
3.
4.
5.
6.
7.
V
UPC
U
P
V
UP1
V
VPC
V
P
V
VP1
V
WPC
VW
P1
V
P
V
NC
V
N1
U
N
V
N
W
N
F
O
P
U
N
V
W
AB
14
±0.3
(14.25)
94.5
±1
64
±0.5
2–φ
0.8
76
3.56✕17=60.52
±0.8
3.56
±0.3
19
(11.99)
7.127.12 7.12
(t = 0.4)
TAB #250(t = 0.8) φ1.65
15.
16.
17.
18.
19.
20.
(t=0.8)
Mar. 2001
http://store.iiic.cc/
Mar. 2001
V
V
V
A
A
W
°C
450
500
600
50
100
100
–20 ~ +125*
Applied between : P-N
Applied between : P-N, Surge value
TC = 25°C
TC = 25°C
TC = 25°C
Supply voltage
Supply voltage (surge)
Collector-emitter voltage
Collector current
Collector current (peak)
Collector dissipation
Junction temperature
V
NC
V
N1
F
O
W
N
V
N
U
N
V
WPC
W
P
V
WP1
V
VPC
V
P
V
VP1
V
UPC
U
P
V
UP1
GND In V
CC
GND Out
GND In V
CC
GND Out
GND In V
CC
GND OutS
WN
O
WN
S
VN
O
VN
S
UN
O
UN
GND V
CC
F
O
W
N
V
N
U
N
Tc
Tb
GND
NWVUP
VCC
VCC(surge)
VCES
±IC
±ICP
PC
Tj
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol Parameter Conditions Ratings Unit
EQUIVALENT CIRCUIT DIAGRAM
* The item defines the maximum junction temperature for the power elements (IGBT/Diode) of the IPM to ensure safe operation. However, these power elements
can endure junction temperature as high as 150°C instantaneously. To make use of this additional temperature allowance, a detailed study of the exact applica-
tion conditions is required and, accordingly, necessary information is requested to be provided before use.
Ratings
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC
At : UP, V P, WP, UN, V N, WN terminals
Applied between : FO-VNC
Sink current of FO terminals
ICIN
VFO
IFO
Input current
Fault output supply voltage
Fault output current
Conditions
CONTROL PART
Symbol Parameter Unit
mA
V
mA
20
20
20
VDSupply voltage 20 V
http://store.iiic.cc/
Mar. 2001
Tj = 25°C
Tj = 125°C
PNUVW
Tc
TOTAL SYSTEM
ParameterSymbol Supply voltage protected
by OC & SC
Module case operating temperature
Storage temperature
Isolation voltage
Conditions
TC
Tstg
Viso
Ratings
VCC(PROT) 400
–20 ~ +100
–40 ~ +125
2500
Unit
°C
°C
Vrms
V
VD = 13.5 ~ 16.5V,
Inverter part, Tj = 125°C start
(Note 1)
60Hz, sinusoidal, Charged part to Base, AC · 1 min.
Note 1 : TC measurement point.
Inverter IGBT part (per 1/6 module)
Inverter FWD part (per 1/6 module)
Case to fin, (per 1 module) thermal grease applied
THERMAL RESISTANCES
Symbol Parameter Test conditions Unit
Rth(j-c)Q
Rth(j-c)F
Rth(c-f)
°C / W
°C / W
°C / W
Limits
Min. Tye. Max.
—
—
—
—
—
—
1.2
2.9
0.4
Junction to case
thermal resistances
Contact thermal resistance
Collector-emitter
saturation voltage
Collector-emitter
cutoff current
Min. Typ. Max.
–IC = 50A, VD = 15V, ICIN = 0mA (Fig. 2)
Tj = 25°C
Tj = 125°C
V
mA
Unit
ParameterSymbol Test conditions
VCE(sat)
ICES
VEC
ton
trr
tc(on)
toff
tc(off)
Limits
V
µs
µs
µs
µs
µs
2.6
3.0
3.5
2.0
—
0.9
4.0
2.0
1
10
—
—
—
0.5
—
—
—
—
—
—
1.8
2.0
2.5
1.0
0.1
0.3
3.0
1.0
—
—
FWD forward voltage
Switching time
VD = 15V, ICIN = 0mA↔10mA
VCC = 300V, IC = 50A
Tj = 125°C
Inductive Load (Upper-Lower Arm) (Fig. 3)
VCE = VCES, VD = 15V (Fig. 4)
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
VD = 15V, ICIN = 10mA
IC = 50A, Pulsed (Fig. 1)
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
http://store.iiic.cc/
Mar. 2001
VN1-VNC
VXP1-VXPC
At : UP-VUPC
,
VP-VVPC, WP-VWPC
UN
·
VN · WN-VNC terminals
–20°C ≤ Tj ≤ 125°C, VD = 15V (Fig. 5, 6) (Lower Arm only)
–20°C ≤ Tj ≤ 125°C, VD = 15V (Fig. 5, 6) (Lower Arm only)
VD = 15V (Fig. 5, 6)
VD = 15V (Note 2)
Parameter
1.47
—
1.18
80
—
—Mounting torque
Weight
VD = 15V, ICIN = 0mA
Baseplate
Temperature detection, VD = 15V
–20°C ≤ Tj ≤ 125°C (Lower Arm only)
VD = 15V, VFO = 15V (Note 2)
mA
mA
A
A
µs
°C
°C
V
V
mA
mA
ms
35
10
5
5
—
—
—
120
—
12.5
—
0.01
15
—
25
5
3
3
91
130
10
110
90
12.0
12.5
—
10
1.8
Min.
Input on threshold current
Input off threshold current
Over current trip level
Short circuit trip level
Over current delay time
Minimum fault output pulse
width
—
—1
1
65
—
—
100
—
11.5
—
—
—
1.0
Over temperature protection
Supply circuit under voltage
protection
Fault output current
Trip level
Reset level
Trip level
Reset level
Note 2 : Fault output is given only when the internal OC, SC, OT & UV protections schemes of lower arm device operate to protect it.
Circuit current
ParameterSymbol Test conditions Max.
Typ. Unit
Limits
CONTROL PART
IDmA
I
th(ON)
I
th(OFF)
OC
SC
toff(OC)
OT
OTr
UV
UVr
IFO(H)
IFO(L)
tFO
Applied across P-N terminals
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC
For IPM’s each input signals, (Fig. 7)
For IPM’s each input signals, (Fig. 7)
At : UP, VP, WP, UN, VN, WN terminals
VCC
ICIN(ON)
ICIN(OFF)
fPWM
tdead
V
mA
mA
kHz
µs
Input on current
Input off current
PWM input frequency
Arm shoot-through blocking time
VDSupply voltage V
0.98
—
MECHANICAL RATINGS AND CHARACTERISTICS
Symbol Parameter Test conditions Limits Unit
N·m
g
Min. Typ. Max.
Mounting part screw : M4
RECOMMENDED CONDITIONS FOR USE
Symbol Test conditions Limits Unit
0
13.5
5
0
—
3.5
Min. Typ. Max.
300
15.0
10
—
—
—
400
16.5
20
1
8
—
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
http://store.iiic.cc/
Mar. 2001
10%
90%
trr Irr
trtd (on)
tc (on) tc (off)
td (off)
I
CIN
Vce
10%
90%
tf
ton= td (on) + tr toff= td (off) + tf
V
D
(all) U,V,W,(N)
P,(U,V,W) A
Pulse
V
CC
I
CIN
I
CIN
V
D
(all) U,V,W,(N)
P,(U,V,W)
V
CC
I
C
I
C
I
C
OC
SC
I
CIN
toff (OC)
toff (OC)
U,V,W
Snubber
N
I
CINN
I
CINP
V
D
V
D
P
I
C
V
CC
I
CINN
0A
0A
I
CINP
t
t
t
dead
t
dead
t
dead
P, (U,V,W,B)
U,V,W, (N)
U,V,W,(N)
V
D
(all) V
D
(all)
I
CIN
Ic
VV
P,(U,V,W)
all open
P
N
N
U,V,W V
CC
V
CC
I
C
I
C
I
C
V
D
(all)
V
D
(all)
P
U,V,W
I
CIN
I
CIN
Short Circuit
Over Current
Constant Current
Constant Current
Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform
Fig. 7 Dead time measurement point example
Fig. 3 Switching time Test circuit and waveform
Fig.1 VCE(sat) Test Fig.2 VEC Test
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
Fig.4 ICES Test
Signal input
Signal input
–Ic
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input signals should be turned on from its off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “OC” and “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not
be allowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
http://store.iiic.cc/
Mar. 2001
V
D1
V
D2
V
D3
560 V
UP1
V
CC
GND
OUT
GND
In
P
U
V
W
N
V
UPC
U
P
560 V
VP1
V
CC
GND
OUT
GND
In
V
VPC
V
P
560 V
WP1
V
CC
GND
GND
Tc
Tb
OUT
GND
In
V
WPC
U
N
U
N
560
560
560
33
V
N
V
D4
V
N1
V
NC
W
N
F
O
V
N
W
N
F
O
V
CC
O
UN
S
UN
O
VN
O
WN
S
WN
S
VN
GND
W
P
+
+
+
NOTES FOR STABLE AND SAFE OPERATION ;
•Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
•Connect low impedance capacitor between the Vcc and GND terminal of each switching opto-coupler.
•Slow switching opto-coupler : CTR = 100%~200%
•Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
•Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
•Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE
http://store.iiic.cc/
