1
®
3650/52
3650
3652
Optically-Coupled Linear
ISOLATION AMPLIFIERS
FEATURES
●BALANCED INPUT
●LARGE COMMON-MODE VOLTAGES:
±2000V Continuous
140dB Rejection
●ULTRA LOW LEAKAGE:
0.35µA max at 240V/60Hz
1.8pF Leakage Capacitance
●EXCELLENT GAIN ACCURACY:
0.05% Linearity
0.05%/1000 Hrs Stability
●WIDE BANDWIDTH:
15kHz ±3dB
1.2V/µs Slew Rate
APPLICATIONS
●INDUSTRIAL PROCESS CONTROL
●DATA ACQUISITION
●INTERFACE ELEMENT
●BIOMEDICAL MEASUREMENTS
●PATIENT MONITORING
●TEST EQUIPMENT
●CURRENT SHUNT MEASUREMENT
●GROUND-LOOP ELIMINATION
●SCR CONTROLS
DESCRIPTION
The 3650 and 3652 are optically coupled integrated
circuit isolation amplifiers. Prior to their introduction
commercially available isolation amplifiers had been
modular or rack mounted devices using transformer
coupled modulation demodulation techniques.
Compared to these earlier isolation amplifiers, the
3650 and 3652 have the advantage of smaller size,
lower cost, wider bandwidth and integrated circuit
reliability. Also, because they use a DC analog modu-
lation technique as opposed to a carrier-type tech-
nique, they avoid the problems of electro-
magnetic interference (both transmitted and received)
that most of the modular isolation amplifiers exhibit.
A
1
A
1
11
10
8
9
Light
Flux
Coupling
23
A
3
A
4
1.6MΩ
1.6MΩ
R
G1
R
G2
R
IN
3652 Only Common to 3650 and 3652
3
1
6
4
®
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1976 Burr-Brown Corporation PDS-342L Printed in U.S.A. August, 1997
SBOS129
2
®
3650/52
SPECIFICATIONS
At +25°C and ±15VDC supply voltages, unless otherwise specified.
106106
RG1 + RG2 + RIN RG1 + RG2 + RIN + RO
25Ω
90Ω ±30Ω
PRODUCT 3650MG, HG(1) 3650JG 3650KG 3652MG, HG(1) 3652JG
ISOLATION
Isolation Voltage
Rated Continuous, min 2000Vp or VDC
Tested Voltage, min, 10s Duration 5000Vp
Isolation Mode Rejection, G = 10
DC 140dB
60Hz, 5000Ω Source Unbalance 120dB
Leakage Current, 240V/60Hz 0.35µA, max
Isolation Impedance
Capacitance 1.8pF
Resistance 1012Ω
GAIN
Gain Equation
for Current Sources G1 = 106V/Amp G1 = 1.0057 x 106V/Amp(2)
for Voltage Sources GV1 = V/V V/V
Input Resistance, RIN, max 25Ω
Buffer Output Impedance, RONot Applicable
Gain Equation Error, max(3) 1.5% 0.5% 0.5% 1.5%(4) 0.5%(4)
Gain Nonlinearity ±0.05% typ ±0.2% max ±0.03% typ ±0.1% max ±0.02% typ ±0.05% max ±0.05% typ ±0.2% max ±0.05% typ ±0.1% max
Gain vs Temperature 300ppm/°C 100ppm/°C 50ppm/°C 300ppm/°C 200ppm/°C
Gain vs Time ±0.05%/1000hrs ±0.05%/1000hrs
Frequency Response
Slew Rate 0.7V/µs min, 1.2V/µs typ
±3dB Frequency 15kHz
Settling Time
to ±0.01% 400µs
to ±0.1% 200µs
INPUT STAGE(5)
Input Offset Voltage
at 25°C, max(3) ±5mV ±1mV ±0.5mV ±5mV ±2mV
vs Temperature, max ±25µV/°C±10µV/°C±5µV/°C±50µV/°C±25µV/°C
vs Supply 100µV/V 100µV/V
vs Time 50µV/1000hrs 100µV/1000hrs
Input Bias Current
at 25°C 10nA typ, 40nA max 10pA typ, 50pA max
vs Temperature 0.3nA/°C Doubles Every +10°C
vs Supply 0.2nA/V 1pA/V
Input Offset Current 10pA
vs Temperature Effects Included Doubles Every +10°C
vs Supply In Output Offset 1pA/V
Input Impedance
Differential “RIN” = 25Ω max 1011Ω
Common-Mode 109Ω1011Ω
Input Noise
Voltage, 0.05Hz to 100Hz 4µVp-p 8µVp-p
10Hz to 10kHz 4µVrms 5µVrms
Input Voltage Range
Common-Mode, Linear Operation, ±(|V| –5)V ±(|V| –5)
w/o damage, at +, – ±V±V
at +I, –I Not Applicable(6) ±300V for 10ms(7)
at +IR, –IRNot Applicable(6) ±3000V for 10ms(7)
Differential, w/o damage, at +, – ±V±V
Differential, w/o damage, at +I, –I Not Applicable ±600V for 10ms(7)
Differential, w/o damage,
at +IR, –IRNot Applicable ±6000V for 10ms(7)
Common-Mode Rejection, 60Hz 90dB at 60Hz, 5kΩ Imbalance 80dB at 60Hz, 5kΩ Imbalance
Power Supply (Input Stage Only)
Voltage (at “+V” and “–V”) ±8V to ±18V ±8V to ±18V
Current
Quiescent ±1.2mA(8) ±3mA(8)
with ±10V Output(7) +6.5mA or –6.5mA, typ +8.5mA or –8.5mA, typ
+12mA or –12mA, max +16mA, or –16mA, max
3
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3650/52
A1
A2
1.6MΩ
1.6MΩ
RO
2
RO
2
Gain Adj Gain Adj
811 13 14
15 1612109 32 29
17
C23
20
26
6
4
3
1
C
–
+
–V +V
Bal
+VCC –VCC
Bal
3652
13 14
15 16
10
32 29
17
C23
20
26
C
–
+
–V +V
Bal
+VCC –VCC
Bal
3650
12
11
SPECIFICATIONS (CONT)
At +25°C and ±15VDC supply voltages, unless otherwise specified.
PRODUCT 3650MG, HG(1) 3650JG 3650KG 3652MG, HG(1) 3652JG
OUTPUT STAGE
Output Voltage, min ±10V ±10V
Output Current, min ±5mA ±5mA
Output Offset Voltage
at 25°C, max(3) ±25mV ±10mV ±10mV ±25mV ±10mV
vs Temperature, max ±900µV/°C±450µV/°C±300µV/°C±900µV/°C±450µV/°C
vs Supply ±500µV/V ±500µV/V
vs Time ±1mV/1000hrs ±1mV/1000hrs
Output Noise Voltage
0.05Hz to 100Hz 50µVp-p 50µVp-p
10Hz to 1kHz 65µVrms 65µVrms
Power Supply (Output Stage Only)
Voltage (“+VCC” and “–VCC”) ±8V to ±18V
Current
Quiescent ±2.3mA typ, ±6mA max
with ±5mA Output, max ±11mA
TEMPERATURE(9)
Specification 0°c to +85°C
Operating –40°C to +100°C
Storage –40°C to +125°C
NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following
specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage
at 25°C, max: ±10mV; vs temperature max: ±100µV/°C; (c) Output offset voltage at 25°C, max; ±50mV; vs temperature max; ±1.8mV/°C. (2) If used as 3650, see
Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e., ±1 or ±IR pins). (5) Input
stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating.
(8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt < 1°C/minute below
0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range.
PIN CONFIGURATIONS PACKAGE INFORMATION
PACKAGE DRAWING
PRODUCT PACKAGE NUMBER(1)
3650 32-Pin DIP 77
3652 32-Pin DIP 77
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
4
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3650/52
GAIN ERROR vs FREQUENCY
Frequency (kHz)
–8 1
2
0
–2
–4
–6
Gain Error (dB)
30310
Gain = 1
Gain = 100
DISTORTION vs FREQUENCY
Frequency (kHz)
0.10.1 10
313
10
3
1
0.3
Distortion (%)
VOUT = +10V
RL = 2kΩ
REJECTION vs RESISTOR IMBALANCE
Input Resistor Imbalance
40 01
0.25 0.50 0.75
160
120
80
Rejection (dB)
R
G1
R
G1
+ R
G2
or R
G2
R
G1
+ R
G2
IMR 60Hz
CMR 60Hz
G =100
G =100
G =100
G =1
G =1
G =1
3652
3650
3650
3652
NORMALIZED LINEARITY vs TEMPERATURE
Temperature (°C)
1–25
1.5
1.4
1.3
1.2
1.1
Relative Nonlinearity
0 255075100
ISOLATION LEAKAGE CURRENT
vs ISOLATION VOLTAGE
Isolation Voltage (kV)
Leakage Current
µA AC or 100s pA, DC
006
24
5
4
3
2
1
135
Typ at 60Hz
Typ at DC
INPUT STAGE SUPPLY CURRENT
vs OUTPUT VOLTAGE
Output Voltage (V)
Supply Current (mA)
0–15 15
–5 5
12
10
8
6
4
2
–10 0 10
Add 2mA typ, 4mA max for 3652 at V–
at V+
Max at 70°C
Max at 25°C
Typ at 70°C
Typ at 25°C Typ at 25°C
3mA
1.2mA
TYPICAL PERFORMANCE CURVES
Typical at +25°C and ±15VDC power supplies, unless otherwise noted.
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3650/52
OUTPUT VOLTAGE AND GAIN ERROR vs TIME
Time of Operation (Hours)
8100 100K
14
12
10
Estimated Output Swing (+V)
1k 10k 0
0.5
0.1
0.05
Gain Error Change (%)
70°C
70°C
25°C
Gain Error
Change
140
120
100
80
60 1 10 100 1000
Gain
3652 COMMON-MODE AND
ISOLATION-MODE REJECTION vs GAIN
Rejection (dB)
Isolation-mode Rejection
Common-mode Rejection
DC at I or I
R
pins
60Hz at I pins
60Hz at I
R
pins
60Hz at I
R
pins
DC at I or I
R
pins
60Hz at I pins
140
120
100
80
60 1 10 100 1000
Gain
3650 COMMON-MODE AND
ISOLATION-MODE REJECTION vs GAIN
Rejection (dB)
Isolation-mode Rejection
Common-mode Rejection
DC 60Hz
60Hz
DC
OUTPUT VOLTAGE SWING
vs INPUT SUPPLY VOLTAGE
Input Supply Voltage (V)
0520
15
10
5
Output Voltage (V)
10 15
Typ at 25°C
25°C
70°C
Guaranteed
Min at Output
Supply ±15V
PHASE SHIFT vs FREQUENCY
Frequency (kHz)
–2000.3
0
–40
–80
–120
–160
Phase Shift (Deg)
301310
Gain 1 to 100
TYPICAL PERFORMANCE CURVES (CONT)
Typical at +25°C and ±15VDC power supplies, unless otherwise noted.
REJECTION vs FREQUENCY
Frequency (kHz)
400.1
140
120
100
80
60
Rejection (dB)
0.3 1 3 10 30
IMR
CMR
Supply Voltage
Gain = 100
3650
+V
–V
3652
6
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3650/52
DEFINITIONS
ISOLATION-MODE VOLTAGE, VISO
The isolation-mode voltage is the voltage which appears
across the isolation barrier, i.e., between the input common
and the output common. (See Figure 1.)
Two isolation voltages are given in the electrical specifica-
tions: “rated continuous” and “test voltage”. Since it is
impractical on a production basis to test a “continuous”
voltage (infinite test time is implied), it is a generally
accepted practice to test at a significantly higher voltage for
some reasonable length of time. For the 3650 and 3652, the
“test voltage” is equal to 1000V plus two times the “rated
continuous” voltage. Thus, for a continuous rating of 2000V,
each unit is tested at 5000V.
COMMON-MODE VOLTAGE, VCM
The common-mode voltage is the voltage midway between
the two inputs of the amplifier measured with respect to
input common. It is the algebraic average of the voltage
applied at the amplifiers’ input terminals. In the circuit in
Figure 1, (V+ + V–)/2 = VCM. (NOTE: Many applications
involve a large system “common-mode voltage.” Usually in
such cases the term defined here as “VCM” is negligible and
the system “common-mode voltage” is applied to the ampli-
fier as “VISO” in Figure 1.)
ISOLATION-MODE REJECTION
The isolation-mode rejection is defined by the equation in
Figure 1. The isolation-mode rejection is not infinite be-
cause there is some leakage across the isolation barrier due
to the isolation resistance and capacitance.
FIGURE 1. Illustration of Isolation-Mode and Common-
Mode Specifications.
NONLINEARITY
Nonlinearity is specified to be the peak deviation from a best
straightline expressed as a percent of peak-to-peak full scale
output (i.e. ±10mV at 20Vp-p ≈ 0.05%).
THEORY OF OPERATION
Prior to the introduction of the 3650 family optical isolation
had not been practical in linear circuits. A single LED and
photodiode combination, while useful in a wide range of
digital isolation applications, has fundamental limitations—
primarily nonlinearity and instability as a function of time
and temperature.
The 3650 and 3652 use a unique technique to overcome the
limitations of the single LED and photodiode isolator.
Figure 2 is an elementary equivalent circuit for the 3650,
which can be used to understand the basic operation without
considering the cluttering details of offset adjustment and
biasing for bipolar operation.
FIGURE 2. Simplified Equivalent Circuit of Linear Isolator.
Two matched photodiodes are used—one in the input (CR3)
and one in the output stage (CR2)—to greatly reduce
nonlinearities and time-temperature instabilities. Amplifier
A1, LED CR1, and photodiode CR3 are used in a negative
feedback configuration such that I1 = IIN RG (where RG is the
user supplied gain setting resistor). Since CR2 and CR3 are
closely matched, and since they receive equal amounts of
light from the LED CR1 (i.e., λ1 = λ2), I2 = I1 = IIN. Amplifier
A2 is connected as a current-to-voltage converter with VOUT
= I2 RK where RK is an internal 1MΩ scaling resistor. Thus
the overall transfer function is:
VOUT = VIN , (RG in Ωs)
This improved isolator circuit overcomes the primary
limitations of the single LED and photodiode combination.
The transfer function is now virtually independent of any
degradation in the LED output as long as the two photo-
diodes and optics are closely matched(1). Linearity is now a
NOTE: (1) The only effect of decreased LED output is a slight decrease in full
scale swing capability. See Typical Performance Curves.
C
(Output)
+
RG1
RG2
RIN
VISO
VCM
VD
–
+
V+
V–
C
(Input)
IL–
VOUT
Isolation Barrier
System
Ground
106
RG1 + RG2 + RIN
VCM
CMRR
VOUT = VD + + VISO
IMRR
V
IN
V
OUT
= V
IN
R
K
R
G
A
1
R
G
Input Common
I
IN
+V
–V
I
1
λ1λ2
CR
3
CR
1
CR
2
R
K
A
2
+V
CC
V
OUT
–V
CC
Output Common
I
2
I
2
I
3
Isolation Barrier
–
+
–
+
106
RG
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3650/52
function of the accuracy of the matching and is further
enhanced by the use of negative feedback in the input stage.
Advanced laser trimming techniques are used to further
compensate for residual matching errors.
A model of the 3650 suitable for simple circuit analysis is
shown in Figure 3. The output is a current dependent voltage
source, VD, whose value depends on the input current. Thus,
the 3650 is a transconductance amplifier with a gain of one
volt per microamp. When voltage sources are used, the input
current is derived by using gain setting resistors in series
with the voltage source (see Installation and Operating
Instructions for details). RIN is the differential input imped-
ance. The common-mode and isolation impedances are very
high and are assumed to be infinite for this model.
FIGURE 3. Simple Model of 3650.
A simplified model of the 3652 is shown in Figure 4. The
isolation and output stages are identical to the 3650. Addi-
tional input circuitry consisting of FET buffer amplifiers and
input protection resistors have been added to give higher
differential and common-mode input impedance (1011Ω),
lower bias currents (50pA) and overvoltage protection. The
+IR and –IR inputs have a 10ms pulse rating of 6000V
differential and 3000V common-mode (see Definitions for a
discussion of common-mode and isolation-mode voltages.)
The addition of the buffer amplifiers also creates a voltage-
in voltage-out transfer function with the gain set by RG1 and
RG2.
INSTALLATION AND
OPERATING INSTRUCTIONS
POWER SUPPLY CONNECTIONS
The power supply connections for the 3650 and 3652 are
shown in Figure 5. When a DC/DC converter is used for
isolated power, it is placed in parallel with the isolation
barrier of the amplifier. This can lower the isolation imped-
ance and degrade the isolation-mode rejection of the overall
circuit. Therefore, a high quality, low leakage DC/DC con-
verter such as the Burr-Brown Model 722 should be used.
OFFSET VOLTAGE ADJUSTMENTS
The offset nulling circuits are identical for the 3650 and
3652 and are shown in Figure 5. The offset adjust circuitry
is optional and the units will meet the stated specifications
with the BAL terminals unconnected. Provisions are avail-
able to null both the input and output stage offsets. If the
amplifier is operated at a fixed gain, normally only one
adjustment will be used: the output stage (10kΩ adjustment)
for low gains and the input stage (50kΩ adjustment) for high
gains, (>10).
Use the following procedure if it is desired to null both input
and output components. (For example, if the gain of the
amplifier is to be switched). The input stage offset is first
nulled (50kΩ adjustment) with the appropriate input signal
pins connected to input common and the amplifier set at its
maximum gain. The gain is then set to its minimum value
and the output offset is nulled (10kΩ adjustment).
FIGURE 4. Simple Model of 3652.
(Output)
+
R
IN
+
–
23
10
11
I
IN
(Input)
C12
14 13
+V –V
R
OUT
V
D
–17
+V
CC
–V
CC
26
20
V
D
= I
IN
X1V
µA
C
R
G1
R
G2
11
10
C
(Output)
23
C
(
Input
)
A
1
A
2
R
O
2
R
O
2
8
9
–I
R
+I
R
+I
–I
I
IN
Same as 3650 in Figure 3.
1.6MΩ
1.6MΩ
17
6
4
3
112
8
®
3650/52
+
C
R
G1
R
G2
R
IN
V
ISO
V
2
11
10
12
17
(1)
V
1
V
OUT
–
23
+
–C
NOTE: (1) The offset adjustment circutry and power supply connections
have been omitted for simplicity. Refer to Figure 5 for details.
10
6
Ω
R
G1
+ R
G2
+ R
IN
+ R
O
V
OUT
= (V
1
– V
2
) +
V
ISO
IMRR
FIGURE 6a. 3650 with Differential Current Sources.
FIGURE 6b. 3650 with Differential Voltage Sources.
ERROR ANALYSIS
A model of the 3650 suitable for DC error analysis of offset
voltage, voltage drift versus temperature, bias current, etc.,
is shown in Figure 7.
A1 and A2, the input and output stage amplifiers, are consid-
ered to be ideal. Separate external generators are used to
model the offset voltages and bias currents. RIN is assumed
to be small relative to RG1 and RG2 and is therefore omitted
from the gain equation. The feedback configuration, optics
and component matching are such that I1 = I2 = I3 = I4. A
simple circuit analysis gives the following expression for the
+
C
R
IN
V
ISO
I
2
11
10
12
17
(!)
I
1
V
OUT
–
23
+
–C
NOTE: (1) The offset adjustment circutry and power supply connections
have been omitted for simplicity. Refer to Figure 5 for details. (2) IMRR
here is in pA/V, typically 5pA/V at 60Hz and 1pA/V at DC.
V
OUT
= (I
1
– I
2
) X 10
6
V/A + V
ISO
X IMRR
(2)
FIGURE 5. Power and Offset Adjust Connections.
NOTE: (1) Optional Offset Adjust.
+V
CC
–V
CC
R
IN
+15VDC
50kΩ
(1)
15
16
3MΩ
(1)
12 CBal
14
13
+V
O
C
–V
O
722
1.3kΩ
32 29 17
23
C
20
26
10kΩ
(1)
–15VDC
Output
Output
Common
P+
V+
E
V–
To Input Circuitry
Bal
Model 722 DC/DC
converter or equivalent
+V –V
+
–
INPUT CONFIGURATIONS
Some possible input configurations for the 3650 and 3652
are shown in Figures 6a, 6b, 6c. Differential input sources
are used in these examples. For situations with nondifferential
inputs, the appropriate source term should be set to zero in
the gain equations and replaced with a short in the diagrams.
Figure 6a shows the 3650 connected as a transconductance
amplifier with input current sources. Voltage sources are
shown in Figure 6b. In this case the voltages are converted
to currents by RG1 and RG2. As shown by the equations, they
perform as gain setting resistors in the voltage transfer
function. When a single voltage source is used, it is recom-
mended (but not essential) that the gain setting resistor
remain split into two equal halves in order to minimize
errors due to bias currents and common-mode rejection (see
Typical Performance Curves).
Figure 6c illustrates the connections for the 3652 when the
FET buffer amplifiers, A1 and A2, are used. This configura-
tion provides an isolation amplifier with high input imped-
ance (both common-mode and differential, and good com-
mon-mode and isolation-mode rejection. It is a true isolated
instrumentation amplifier which has many benefits for noise
rejection when source impedance imbalances are present.
In the 3652, the voltage gain of the buffer amplifiers is
slightly less than unity, but the gain of the output stage has
been raised to compensate for this so that the overall transfer
function from the ±I or ±IR inputs to the output is correct. It
should be noted that A1 and A2 are buffer amplifiers. No
summing can be done at the ±I or ±IR inputs. Figure 6c
shows the +I and –I inputs used. If more input voltage
protection is desired, then the +IR and –IR inputs should be
used. This will increase the input noise due to the contribu-
tion from the 1.6MΩ resistors, but will provide additional
differential and common-mode protection (10ms rating of
3kV).
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3650/52
The effects of temperature may be analyzed by replacing the
offset terms with their corresponding temperature gradient
terms:
VOUT ➞∆ VOUT/∆T, EOSI ➞∆EOSI/∆T, etc.
For a complete analysis of the effects of temperature, gain
variations must also be considered.
OUTPUT NOISE
The total output noise is given by:
EN (RMS) = √(ENIG)2 + (ENO)2
where EN (RMS) = Total output noise
ENI = RMS noise of the input stage
ENO = RMS noise of the output stage
G = 106/(RG1 + RG2)
ENO includes the noise contribution due to the optics and the
noise currents of the output stage. Errors created by the noise
current of the input stage are insignificant compared to other
noise sources and are therefore omitted.
FIGURE 6c. 3652 with Differential Voltage Sources.
FIGURE 7. DC Error Analysis Model for 3650.
I
1
= I
2
= I
3
= I
4
A
1
–
R
G2
+
+
–
R
G1
I
B1
I
B2
E
OSI
C (Input)
A
2
–
+
1MΩ
E
OSO
I
3
λI
4
C (Output)
Optics
I
1
I
2
2RG1
106 EOSI
+
C
R
G1
R
G2
R
IN
V
ISO
V
1
11
10
12
17
(1)
V
OUT
–
23
+
–C
NOTE: (1) The offset adjustment circutry and power supply connections
have been omitted for simplicit
y
. Refer to Fi
g
ure 5 for details.
10
6
Ω
R
G1
+ R
G2
+ R
IN
+ R
O
V
OUT
= (V
1
– V
2
) +
V
ISO
IMRR
A
1
A
2
R
O
2
R
O
2
64
3
1
8
9
V
2
–I
R
+I
R
+I
–I
+0
–0
106
RG1 + RG2
total output error voltage due to offset voltages and bias
currents.
V
OUT-TOTAL
= [E
OSI
+ (I
B1
R
GI
– I
B2
R
G2
)]+ E
OSO
(1)
Offset current is defined as the difference between the two
bias currents IB1 and IB2. If IB1 = IB and IB2 = IB +IOSI
then, for RG1 = RG2, VOUT – IB =
This component of error is not a function of gain and is
therefore included as a part of EOSO specifications. The
output errors due to the output stage bias current are also
included in EOSO. This results in a very simple equation for
the total error:
VOUT-TOTAL = + EOSO (for RG1 = RG2). (2)
In summary, it should be noted that equation (2) should be
used only when RG1 = RG2. When RG1 ≠ RG2, equation (1)
applies.
2
106 IOS
10
®
3650/52
APPLICATIONS
Figure 8 shows a system where isolation amplifiers (3650)
are used to measure the armature current and the armature
voltage of a motor.
The armature current of the motor is converted to a voltage
by the calibrated shunt RS and then amplifier (adjustable
gain) and isolated by the 3650.
The armature voltage is sensed by the voltage divider (ad-
justable) shown and then amplified and isolated by the 3650.
The 3650 provides the advantage of accurate current mea-
surement in the presence of high common-mode voltage.
Both 3650s provide the advantage of isolating the motor
ground from the control system ground. Isolated power is
provided by an isolated DC/DC converter (BB Model 722 or
equivalent).
The 3652 is ideally suited for patient monitoring applica-
tions as shown in Figure 9. The fact that it is a true balanced
input instrumentation amplifier with very high differential
and common-mode impedance means that it can greatly
reduce the common-mode noise pick up due to imbalance in
lead impedances that often appear in patient monitoring
situations. The 3kV and 6kV shown in Figure 9 are the 10ms
pulse ratings of the +IR and –IR inputs for the common-mode
and differential input voltages with respect to input com-
mon. The rating of the isolation barrier is 2000Vpk continu-
FIGURE 8. Isolated Armature Current and Voltage Sensor.
P+
V–+V
O
3650HG
11
10
12
20
4.99kΩ
+V
CC
23
G = 1V/V
To
Voltage
Sense
C
–V
O
722 1.3kΩ
E
V+
1MΩ
4.99kΩ
500Ω
9.76kΩ
14 13
17
26 –V
CC
O/P Com
+V –V
I/O Com
3650JG
11
10
20
4.75kΩ
23
4.99kΩ
14 12 13
+V –V
I/O Com
V
A
/100
To
Current
Sense
17 O/P Com 100V
S
26
+V
CC
–V
CC
+15VDC
–15VDC
O/P Com
G = 100V/V
500Ω
Motor Control
V
A
(500V)
V
S
(100mV) R
S
V
OUT
+
–
+
–
VCM
CMRR IMRR
COMMON-MODE AND
ISOLATION-MODE REJECTION
The expression for the output error due to common-mode
and isolation mode voltage is:
VOUT = G +
GUARDING AND PROTECTION
To preserve the excellent inherent isolation characteristics of
these amplifiers, the following recommended practice should
be noted.
1. Use shielded twisted pair of cable at the input as with
any instrumentation amplifier.
2. Care should be taken to minimize external capacitance.
A symmetrical layout of external components to achieve
balanced capacitance from the input terminals to output
common will preserve high IMR.
3. External components and conductor patterns should be
at a distance equal to or greater than the distance
between the input and output terminals to prevent HV
breakdown.
4. Though not an absolute requirement, the use of lamin-
ated or conformally coated printed circuit boards is
recommended.
VISO
11
®
3650/52
ous. The nonrecurrent pulse rating of the isolation barrier is
5000Vpk, since each unit is factory tested at 5000Vpk. If the
isolation barrier is to be subjected to higher voltages a gas
filled surge voltage protection device can be used. For
multichannel operation, two 3652s can be powered by one
Model 722 isolated DC/DC converter. The total leakage
current for both channels at 240V 60Hz would still be less
than 2µA.
The block diagram in Figure 10 shows the use of isolation
amplifiers in SCR control application.
FIGURE 9. 3652 Used in Patient Monitoring Application (ECG, VCG, EMG Amplifier).
+15VDC
9
10
12
+V
O
C
–V
O
722 1.3kΩ
17
23
20
26 –15VDC
V
OUT
To Monitor
Output
Common
P+
V+
E
V–
25kΩ
25kΩ
8
11 14
Input Common
6
1
12
+5kV
3652
+I
R
–I
R
Input
Common
Isolated DC/DC Converter
V
OUT
≈ es = 20e
s
10
6
50k
e
s
–6kV
–3kV –3kV
12
®
3650/52
FIGURE 10. 3-Phase Bidirectional SCR Control with Voltage Feedback.
3650HG
+V
ISO
+
–
3650HG
3650HG
+
–
+
–
+V
ISO
±V
ISO
–V
+V
+V
A
B
C
AC/DC
Power
Supply
Isolated
DC/DC
Converter
722
±V
±V
ISO
Control
A CB
Input Command
Firing CKT
Firing CKT
Firing CKT
3.0
Lead
3.0
Input
Neutral
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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