DS2409 DS2409 MicroLAN Coupler FEATURES PIN ASSIGNMENT * Low impedance coupler to create large common- ground, multi-level MicroLAN networks 6-PIN TSOC PACKAGE * Keeps inactive branches pulled high to 5V 1 2 3 * Simplifies network topology analysis by logically decoupling devices on active network segments 6 5 4 TOP VIEW 3.7 X 4.0 X 1.5 mm * Conditional search for fast event signaling * Auxiliary 1-WireTM line to connect a memory chip or to be used as digital input SIDE VIEW * Programmable, general purpose open drain control output * Communicates at 16.3k bits per second * Unique, factory-lasered and tested 64-bit registration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures absolute traceability because no two parts are alike * 8-bit family code specifies device communication requirements to bus master * Built-in multidrop controller ensures compatibility with other MicroLAN products PIN DESCRIPTION Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 GND 1-Wire in Main 1-Wire out Auxiliary 1-Wire out Control Output VDD ORDERING INFORMATION DS2409P 6-pin TSOC package * Operating temperature range from -40C to +85C * Compact, low cost 6-pin TSOC surface mount package DESCRIPTION The MicroLAN coupler is an essential component to build and control 1-Wire MicroLAN networks with multi- level branching. In contrast to approaches that switch the ground line, the coupler maintains a common ground level for the whole network and keeps the inactive segments powered. This simplifies supplying central or local power for additional circuitry and prevents loss of status of parasitically powered devices. It also avoids disrupting communication caused by the parasitic power supply of 1-Wire devices after activating a branch. The coupler does not contain any user-programmable memory. To label a branch one can connect any 1-Wire memory device to the auxiliary 1-Wire output of the coupler. Both the main and the auxiliary 1-Wire output are supported by a "smart-on" command. This command generates a reset/presence sequence on the selected output before the electronic switch closes the contact to the 1-Wire bus. This way the bus master can apply a ROM function command (optionally followed by a memory function) to the 072398 1/16 DS2409 factory-lasered registration number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit family code (1FH). The 64-bit ROM portion of the DS2409 not only creates an absolutely unique electronic identification for the device itself but also is a means to locate and address the device in order to exercise its control functions. devices on the just activated segment with all other devices in the network remaining deselected. This significantly speeds up the analysis of topology and population in a continuously changing network. The coupler also supports the bus master in detecting arrivals on the inactive segments of the network by responding to the conditional search command. The control output can be used to optically signal the on/off state of a branch or, together with the auxiliary output, for handshaking in dual-master applications. The network size can be maximized by using a DS2480 line driver at the bus masters serial interface. The DS2480 compensates for the rising ground level caused by the non-zero on-resistance of couplers in multi-level networks. The DS2409 uses the standard Dallas Semiconductor 1-Wire protocol for data transfers (Figure 2), with all data being read and written least significant bit first. Communication to and from the DS2409 requires a single bi-directional line that is typically a port pin of a microcontroller. The 1-Wire bus master (microcontroller) must first issue one of five ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, or 5) Conditional Search ROM. These commands operate on the 64-bit lasered ROM portion of each device and can singulate a specific device if many are present on the 1-Wire line as well as indicate to the bus how many and what type of each device is present. After a ROM function command is successfully executed, the control functions of the device can be exercised via the 1-Wire bus. OVERVIEW The DS2409 Coupler provides a means to create large MicroLAN networks with additional control capability provided by an open-drain N-channel MOSFET that can be remotely switched via communication over the 1-Wire bus (Figure 1). An auxiliary output can be used to label the branch by connecting a programmed 1-Wire memory chip or as digital input. The DS2409 contains a BLOCK DIAGRAM Figure 1 VDD 1.5k 1.5k 1-WIRE FUNCTION CONTROL 64-BIT LASERED ROM 1-WIRE BUS 64-BIT LASERED ROM Each DS2409 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last 072398 2/16 MAIN OUT COUPLER FUNCTION CONTROL CONTROL OUT AUX. OUT eight bits are a CRC of the first 56 bits. (See Figure 3.) The 1-Wire CRC of the lasered ROM is generated using the polynomial X8 + X5 + X4 + 1. Additional information about the Dallas Semiconductor 1-Wire Cyclic Redun- DS2409 dancy Check is available in the Book of DS19xx iButton Standards. The 64-bit ROM and ROM Function Control section allow the DS2409 to operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section "1-Wire Bus System". The functions required to exercise the control functions of the DS2409 are not accessible until the ROM function protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure 7). The 1-Wire bus master must first provide one of the five ROM function commands. After a ROM function sequence has been successfully executed, the bus master may then provide any one of the function commands specific to the DS2409 (Figure 5). HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2 1-WIRE BUS BUS MASTER OTHER DEVICES DS2409 COMMAND LEVEL: 1-WIRE ROM FUNCTION COMMANDS (SEE FIGURE 7) DS2409 SPECIFIC FUNCTION COMMANDS (SEE FIGURE 5) AVAILABLE COMMANDS: DATA FIELD AFFECTED: READ ROM MATCH ROM SEARCH ROM SKIP ROM 64-BIT ROM 64-BIT ROM 64-BIT ROM N/A CONDITIONAL SEARCH ROM 64-BIT ROM, ACTIVITY ON MAIN OUTPUT STATUS READ/WRITE ALL OUTPUTS ALL LINES OFF ALL OUTPUTS DISCHARGE LINES ALL OUTPUTS DIRECT-ON MAIN ALL OUTPUTS SMART-ON MAIN ALL OUTPUTS SMART-ON AUX. ALL OUTPUTS 64-BIT LASERED ROM Figure 3 MSB LSB 8-Bit CRC Code MSB LSB 48-Bit Serial Number MSB 8-Bit Family Code (1FH) LSB MSB LSB 1-WIRE CRC GENERATOR Figure 4 INPUT Polynomial = X8 + X5 + X4 + 1 1ST STAGE X0 2ND STAGE X1 3RD STAGE X2 4TH STAGE X3 5TH STAGE XOR X4 6TH STAGE XOR X5 7TH STAGE X6 8TH STAGE X7 XOR X8 072398 3/16 DS2409 CONTROL FUNCTION COMMANDS The "Control Function Flow Chart" (Figure 5) describes the protocols necessary for controlling the main and auxiliary output as well as the control output of the DS2409. The 1-Wire Function Control section and the Coupler Function Control section combine to interpret the commands issued by the bus master and create the correct control signals within the device. Depending on the complexity of function to be exercised, the 1-byte command code may require one or two more bytes being sent by the bus master. Switching one branch on implies that the other branch is automatically switched off. At Power-on, both branches are switched off. Each command flow includes at least one byte of feedback information for the bus master to check if the command was understood and executed. the value of this bit, the information in bit 6 (CNTR. STAT) either reports the association of the control output to a particular output (auto-control mode) or the status of the transistor at the control output. STATUS CONTROL BYTE Table 1 7 6 DATA CNTR. X SEL. 0-2 5 6 072398 4/16 2 1 0 MODE R/W R/W X X X don`t care X STATUS INFO BYTE Table 2 7 6 5 4 3 2 1 0 CNTR. EVNT EVNT AUX. AUX. MAIN MAIN MODE STAT AUX. MAIN LEVL STAT LEVL STAT 0 The status info byte allows the bus master to verify the actual status of each output (STAT, active/inactive, on/ off) and the static level at the main and auxiliary output (LEVL, 1 for normal, 0 in case of a short). If a 1-Wire output is inactive and a low-going edge is encountered during this time, the DS2409 will set the event flag (EVNT) in the status info byte. Each output has its own event flag. The event flags are cleared with the All Lines Off command. Bit 7 of the status info byte tells if the device is in auto-control mode or manual mode. Depending on 3 Write control: both bits must be 0 to change the status. control output mode selection: 0 = auto- MODE control mode (default), 1 = manual mode CNTR. control output association (auto-control SEL. mode): 0 = main (default), 1 = auxiliary DATA value to be written to control output X (manual mode only): don't care otherwise 7 At power-on the device will be in the auto-control mode and the control output will be assigned to the main output. The control output can be assigned to the auxiliary output by setting bit 6 of the status control byte to a 1. For manual operation of the control output one has to select manual mode (bit 5 = 1). The value of bit 7 of the status control byte will then determine the status of the control output. A 1 for bit 7 will make the transistor conducting, a 0 will turn it off (non-conducting). To change the status of the device, both bits 3 and 4 of the status control byte have to be 0. Otherwise the settings will remain unchanged. In any case, the status info byte will reflect the currently valid settings including the changes that might have been made with the status control byte. 4 3 - 4 R/W STATUS READ/WRITE [5Ah] This command should be sent to the device after powering up unless the default settings are adequate for the application. Following the command code, the bus master has to send the status control byte. The bus master will then read the status info byte from the device. The confirmation byte is identical to the status info byte. Tables 1 and 2 show the bit assignments in both bytes. 5 1 2 3 4 5 6 7 status of main output: 0 = active (connected to bus master), 1 = inactive voltage sensed at main output: 0 = low, 1 = high (see note) status of auxiliary output: 0 = active (connected to bus master), 1 = inactive voltage sensed at auxiliary output: 0 = low, 1 = high (see note) event flag for main output: 0 = no event, 1 = negative edge sensed since inactive event flag for aux. output: 0 = no event, 1 = negative edge sensed since inactive if auto-control mode: control output CNTR. association, 0 = main, 1 = auxiliary STAT if manual mode: 0 = output transistor off, 1 = output transistor on control output mode: 0 = auto-control MODE mode, 1 = manual mode MAIN STAT MAIN LEVL AUX. STAT AUX. LEVL EVNT MAIN EVNT AUX. Note: Data is valid only if the output is decoupled from the 1-Wire input. ALL LINES OFF [66h] This command is used to deactivate the currently active 1-Wire output and to clear both event flags or to end a discharge cycle initiated by the Discharge Lines command. Before issuing this command, one should read the status and check the event flags of both, the main and the auxiliary output. Otherwise one might inadvertently clear the event flag without having taken appropri- DS2409 ate action. If the DS2409 is in auto-control mode, the transistor at the control output will be switched off (non- conducting). At power-on, the device will automatically perform the All Lines Off command. In contrast to a power-on cycle, the All Lines Off command does not clear the Mode and Control Select bits. DISCHARGE LINES [99h] There may be situations where one has to force a power-on reset for parasitically powered 1-Wire devices connected to the main or auxiliary output of the DS2409. For this purpose the Discharge Lines command has been implemented. This command first deactivates the output lines and then turns on the pull-down transistors of both, the main and the auxiliary outputs. This state will be maintained until the bus master accesses the coupler again and issues a different control function command. The duration of the discharge time should be100 ms minimum and is controlled solely by the bus master. Although any of the other control function commands will end the discharge cycle, it is recommended to use the All Lines Off or Status Read/Write command to do so. This will allow the discharged lines to fully recharge and prevent a sudden voltage droop on the active part of the network in case of a Direct-On Main command. This precaution is not necessary with the Smart-On command. DIRECT-ON MAIN [A5h] The Direct-on Main command is typically used to activate the main 1-Wire output to subsequently issue a reset pulse and access a device residing on the segment of the MicroLAN connected to the Main output of the DS2409. If this command is received, the DS2409 will automatically set the auxiliary output to inactive. Depending on the currently valid device status settings, the transistor at the control output may change state (see Status Read/Write command). SMART-ON MAIN [CCh] When analyzing huge MicroLAN networks for changes in population it may be useful to limit the number of devices participating in a Search ROM command. The smaller the number of participants, the faster the responding devices are identified. The DS2409 supports the bus master in this process with the Smart-On Main command. As a preparation for the subsequent steps, the first action of the Smart-On Main command is deactivating the main output. Compared to the Direct-On Main command, the Smart-On Main requires the bus master to follow the function command with 16 more time slots. The first 8 time slots (reset stimulus) are translated by the DS2409 as a reset low time on the Main 1-Wire output. Now the bus master reads the reset response byte. This generates the reset high time where devices connected to the Main 1-Wire output may assert their presence pulse. If a presence pulse was found, several of the most significant bits of the reset response byte will be zeros. After these 16 time slots are completed the Main 1-Wire output will be activated (= through-connected to the 1-Wire input of the DS2409). Now only the devices on the newly activated segment of the MicroLAN are ready to receive a ROM function command optionally followed by a memory function command. All other devices in the network will remain silent until the next reset pulse is issued. As with the Direct-On command, the Smart-On Main command will automatically set the auxiliary output to inactive. Depending on the currently valid device status settings, the transistor at the control output may change state (see Status Read/Write command). If the Smart-On Main command is terminated by a 1-Wire reset pulse while receiving the reset stimulus, the DS2409 will immediately turn off the pull-down transistor and let the output line go high. SMART-ON AUXILIARY [33h] This command works essentially the same way as the Smart-On Main command, but it affects the auxiliary 1-Wire output. After the reset response byte is received by the bus master, the auxiliary output is activated and the main output becomes inactive. Depending on the currently valid device status settings, the transistor at the control output may change state (see Status Read/ Write command). 072398 5/16 DS2409 FUNCTION COMMAND FLOW CHART Figure 5 MASTER TX CONTROL FUNCTION COMMAND 5Ah N STATUS RD./WR. ? 99h N 66h N Y Y Y STOP DISCHARGE (IF ON) STOP DISCHARGE (IF ON) BUS MASTER TX CONTROL BYTE DS2409 DEACTIVATES MAIN & AUX. OUTPUT DS2409 DEACTIVATES MAIN & AUX. OUTPUT DS2409 DEACTIVATES AUX. OUTPUT BUS MASTER RX STATUS BYTE DS2409 CLEARS BOTH EVENT FLAGS DS2409 DISCHARGES MAIN & AUX. OUTPUT DS2409 ACTIVATES MAIN OUTPUT AUTO- CONTROL ON ? Y UPDATE CONTROL OUT STOP DISCHARGE (IF ON) AUTO- CONTROL ON ? Y UPDATE CONTROL OUT N UPDATE CONTROL OUT N 1) 2) 2) BUS MASTER RX CONFIRMATION BYTE BUS MASTER RX CONFIRMATION BYTE BUS MASTER TX RESET ? N BUS MASTER TX RESET ? Y N BUS MASTER TX RESET ? Y Y 1) SAME AS STATUS BYTE 2) SAME AS COMMAND CODE DS2409 TX PRESENCE PULSE 072398 6/16 AUTO- CONTROL ON ? Y BUS MASTER RX CONFIRMATION BYTE N N DIRECT-ON MAIN ? DISCHARGE ? ALL LINES OFF ? TO FIGURE 5 SECOND PART A5h N 2) BUS MASTER RX CONFIRMATION BYTE N BUS MASTER TX RESET ? Y FROM FIGURE 5 SECOND PART DS2409 FUNCTION COMMAND FLOW CHART Figure 5 Cont'd FROM FIGURE 5 FIRST PART CCH SMART-ON MAIN ? 33H N N SMART-ON AUX. ? Y Y STOP DISCHARGE (IF ON) STOP DISCHARGE (IF ON) DS2409 DEACTIVATES MAIN OUTPUT DS2409 DEACTIVATES AUXILIARY OUTPUT BUS MASTER TX FFH RESET STIMULUS BUS MASTER TX FFH RESET STIMULUS BUS MASTER RX RESET RESPONSE FROM MAIN OUTPUT BUS MASTER RX RESET RESPONSE FROM AUXILIARY OUTPUT BUS MASTER RX CONFIRMATION BYTE 3) 3) BUS MASTER RX CONFIRMATION BYTE DS2409 DEACTIVATES 4) AUXILIARY OUTPUT 4) DS2409 ACTIVATES MAIN OUTPUT Y UPDATE CONTROL OUT DS2409 DEACTIVATES MAIN OUTPUT DS2409 ACTIVATES AUXILIARY OUTPUT AUTO- CONTROL ON ? 4) AUTO- CONTROL ON ? Y UPDATE CONTROL OUT N 4) N N Y Y BUS MASTER TX RESET ? N 4) BUS MASTER PERFORMS ROM AND MEMORY FUNCTION ON MAIN SEGMENT BUS MASTER TX RESET ? N Y TO FIGURE 5 FIRST PART 3) SAME AS COMMAND CODE IF NO SHORT INVERTED COMMAND CODE IF SHORT BUS MASTER TX RESET ? BUS MASTER TX RESET ? Y N BUS MASTER PERFORMS ROM AND MEMORY FUNCTION ON AUXILIARY SEGMENT BUS MASTER TX RESET ? N Y 4) STEP IS SKIPPED IF A SHORT WAS DETECTED 072398 7/16 DS2409 HARDWARE CONFIGURATION Figure 6 BUS MASTER OPEN DRAIN PORT PIN VPUP DS2409 1-WIRE INPUT PORT 1.5k FOR MicroLAN PIN 2 1-WIRE RX RX TX RX = RECEIVE 5 A TYP. TX = TRANSMIT 1-WIRE BUS SYSTEM The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances the DS2409 behaves as a slave. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during specified time slots that are initiated on the falling edge of sync pulses from the bus master. For a more detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton Standards. Hardware Configuration The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open drain or 3-state outputs. The 1-Wire input of the DS2409 is open drain with an internal circuit equivalent to that shown in Figure 6. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus has a maximum data rate of 16.3k bits per second and requires a pull-up resistor of approximately 1.5k or a DS2480 driver for MicroLAN applications. The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be 072398 8/16 TX 100 MOSFET left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 120 s, one or more of the devices on the bus may be reset. The DS2409 may perform a power-on reset cycle and deactivate both 1-Wire outputs if the 1-Wire input is low for minimum 8 ms. A low time of 12 ms or more will always cause a power-on reset cycle. Transaction Sequence The protocol for accessing the DS2409 via the 1-Wire port is as follows: * Initialization * ROM Function Command * Control Function Command INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS2409 is on the bus and is ready to operate. For more details, see the "1-Wire Signaling" section. DS2409 ROM FUNCTION COMMANDS Once the bus master has detected a presence, it can issue one of the five ROM function commands. All ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in Figure 7): more than one slave is present on the bus and a read command is issued following the Skip ROM command, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain pull-downs will produce a wired-AND result). Read ROM [33h] Search ROM [F0h] This command allows the bus master to read the DS2409s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single DS2409 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired-AND result). The resultant family code and 48-bit serial number will usually result in a mismatch of the CRC. When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simple, 3-step routine on each bit of the ROM. After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the Book of DS19xx iButton Standards for a comprehensive discussion of a search ROM, including an actual example. Match ROM [55h] The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS2409 on a multidrop bus. Only the DS2409 that exactly matches the 64-bit ROM sequence will respond to the following memory function command. All slaves that do not match the 64-bit ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the bus. Skip ROM [CCh] This command can save time in a single drop bus system by allowing the bus master to access the control functions without providing the 64-bit ROM code. If Conditional Search ROM [ECh] This ROM command works exactly as the normal ROM Search, but it will identify only devices that encounter certain conditions. The DS2409 will respond to this command only if the event flag for the main output is set (see Status Read/Write command). The event flag is cleared with the All Lines Off command. 072398 9/16 DS2409 ROM FUNCTIONS FLOW CHART Figure 7 MASTER TX RESET PULSE DS2409 TX PRESENCE PULSE MASTER TX ROM FUNCTION COMMAND 33h READ ROM COMMAND ? Y N 55h F0h N MATCH ROM COMMAND ? Y SEARCH ROM COMMAND ? Y ECh N Y EVENT FLAG SET ? DS2409 TX BIT 0 DS2409 TX FAMILY CODE 1 BYTE MASTER TX BIT 0 BIT 0 MATCH ? N DS2409 TX BIT 0 MASTER TX BIT 0 BIT 0 MATCH ? Y N DS2409 TX BIT 1 BIT 1 MATCH ? Y DS2409 TX BIT 63 MASTER TX BIT 63 BIT 63 MATCH ? Y N N BIT 1 MATCH ? N Y DS2409 TX BIT 63 DS2409 TX BIT 63 DS2409 TX BIT 63 MASTER TX BIT 63 MASTER TX BIT 63 BIT 63 MATCH ? Y MASTER TX CONTROL FUNCTION COMMAND (SEE FIGURE 5) 072398 10/16 Y MASTER TX BIT 1 N N DS2409 TX BIT 1 DS2409 TX BIT 1 Y DS2409 TX CRC BYTE BIT 0 MATCH ? MASTER TX BIT 1 MASTER TX BIT 1 BIT 1 MATCH ? DS2409 TX BIT 0 MASTER TX BIT 0 DS2409 TX BIT 1 DS2409 TX SERIAL NUMBER 6 BYTES N DS2409 TX BIT 0 N Y N CONDITIONAL SEARCH ? BIT 63 MATCH ? Y N CCh SKIP ROM COMMAND ? Y N DS2409 1-WIRE SIGNALING indicates the DS2409 is ready to send or receive data given the correct ROM command and control function command. The bus master transmits (TX) a reset pulse (tRSTL, minimum 480 s). The bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the pull-up resistor. After detecting the rising edge on the data line, the DS2409 waits (tPDH, 15-60 s) and then transmits the presence pulse (tPDL, 60-240 s). The DS2409 requires strict protocols to insure data integrity. The protocol consists of four types of signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read Data. All these signals except presence pulse are initiated by the bus master. The initialization sequence required to begin any communication with the DS2409 is shown in Figure 8. A reset pulse followed by a presence pulse INITIALIZATION PROCEDURE "RESET AND PRESENCE PULSES" Figure 8 MASTER TX "RESET PULSE" MASTER RX "PRESENCE PULSE" tRSTH VPULLUP VPULLUP MIN VIH MIN VIL MAX 0V tRSTL tPDL tR tPDH RESISTOR MASTER DS2409 480 s < tRSTL < * 480 s < tRSTH < (includes recovery time) 15 s < tPDH < 60 s 60 s < tPDL < 240 s *In order not to mask interrupt signaling by other devices on the 1-Wire bus, tRSTL + tR should always be less than 960 s. **The slew rate of the Presence Pulse is actively limited by the DS2409 to 1V/s typically to minimize ringing. The slope of all other edges is controlled by the 1-Wire bus driver at the host. READ/WRITE TIME SLOTS The definitions of write and read time slots are illustrated in Figure 9. All time slots are initiated by the master driving the data line low. The falling edge of the data line synchronizes the DS2409 to the master by triggering a delay circuit in the DS2409. During write time slots, the delay circuit determines when the DS2409 will sample the data line. For a read data time slot, if a "0" is to be transmitted, the delay circuit determines how long the DS2409 will hold the data line low overriding the 1 generated by the master. If the data bit is a "1", the device will leave the read data time slot unchanged. 072398 11/16 DS2409 READ/WRITE TIMING DIAGRAM Figure 9 Write-one Time Slot tSLOT tREC VPULLUP VPULLUP MIN VIH MIN DS2409 SAMPLING WINDOW VIL MAX 0V tLOW1 15 s 60 s 60 s < tSLOT < 120 s 1 s < tLOW1 < 15 s 1 s < tREC < Write-zero Time Slot tREC tSLOT VPULLUP VPULLUP MIN VIH MIN DS2409 SAMPLING WINDOW VIL MAX 0V 15 s 60 s tLOW0 60 s < tLOW0 < tSLOT < 120 s 1 s < tREC < Read-data Time Slot tSLOT tREC VPULLUP VPULLUP MIN VIH MIN MASTER SAMPLING WINDOW VIL MAX 0V tSU tRELEASE tLOWR tRDV RESISTOR MASTER DS2409 072398 12/16 60 s < tSLOT < 120 s 1 s < tLOWR < 15 s 0 < tRELEASE < 45 s 1 s < tREC < tRDV = 15 s tSU < 1 s DS2409 USAGE EXAMPLE Configuration: A bus master controls a MicroLAN consisting of a trunk with many DS2409s that create branches. Each of the DS2409s has a DS2430A connected to its auxiliary output to label its physical location in the network (see Figure 10). iButton devices are constantly arriving at or departing from the branches. Task: Identify one branch where an iButton has arrived and get the branch's physical location. Determine the population on that particular branch. STEP MASTER MODE DATA (LSB FIRST) 1 TX Reset COMMENTS 2 RX Presence 3 TX ECh 4 RX/RX/TX for each of the 64 ROM bits 5 TX 33h Issue Smart-On Auxiliary command 6 TX FFh Send reset stimulus 7 RX <data byte>* 8 RX 33h Get confirmation byte 9 TX CCh Issue "skip ROM" command Issue "read memory" command Reset pulse (480-960 s) Presence pulse Issue "conditional search ROM" command Identify and access one of the qualifying devices Get reset response byte with presence info 10 TX F0h 11 RX <32 data bytes> 12 TX Reset 13 RX Presence 14 TX 55h 15 TX <8 byte ROM ID> 16 TX CCh Issue Smart-On Main command 17 TX FFh Send reset stimulus 18 RX <data byte>* 19 RX CCh Get confirmation byte 20 TX F0h Issue "search ROM" command 21 RX/RX/TX for each of the 64 ROM bits Get branch location information (DS2430A) Reset pulse Presence pulse Issue "Match ROM" command Access the previously identified coupler Get reset response byte with presence info Identify one of the devices connected 22 TX Reset 23 RX Presence Reset pulse 24 TX 55h 25 TX <8 byte ROM ID> 26 TX 66h Send all lines off command 27 RX 66h Get confirmation byte 28 TX Reset 29 RX Presence Presence pulse Issue "Match ROM" command Access the previously identified coupler Reset pulse Presence pulse repeat steps 12 to 21 for each of the remaining devices on the branch of the identified coupler * 00h or 01h if presence pulse, FFh if no presence pulse Note: The sequence of steps 12 to 21 logically decouples all other devices residing on the trunk from responding to the search ROM command. The All Lines Off command is required to clear the event flag that made the device respond to the conditional search command. 072398 13/16 DS2409 APPLICATION EXAMPLES The dual-master system realizes a master to master communication path via the 1-Wire bus. The DS1996 Memory iButton serves as a temporary storage for the data packets to be exchanged. When idle, both main outputs as well as the auxiliary outputs are inactive. To access the Memory iButton, the host A first switches on the control output, thereby pulling the auxiliary line of the coupler at the B side low. This tells host B that it is not allowed to activate the main output of coupler B. Now host A activates the main output of coupler A and writes data to the Memory iButton. After the writing is complete, host A deactivates the main output of coupler A and switches off the control output. Host B meanwhile has been polling the logic level at the auxiliary line of coupler B and realizes that host A has finished the access. Now host B follows the same procedure and accesses the memory to read the data, etc. The memory iButton may be replaced by a MicroLAN network. The Silicon Label stores information telling the hosts that these particular couplers access the same network and that the control and auxiliary outputs are cross-coupled for handshaking. Figures 10 and 11 show two application examples of the DS2409 MicroLAN Coupler. A single trunk with branches is the typical topology of an access control system with the iButtons being the electronic keys required for admittance. The host computer runs a program that scans the devices on the trunk for events (conditional search). When somebody touches the probe with an iButton, this will set the event flag of the main line and the coupler will respond. The ID chip represents the DS2430A that labels the access point. The 64-bit ROM ID of the arriving iButton is the key for the entrance. In a real access control application, the LED will be replaced by a solenoid that opens the lock under software control (manual mode). The same network topology could be used for an inventory control system with the branches representing individual shelves of a rack. The iButtons would be electronic tags mounted on objects sitting on the shelves. The LED would guide the warehouse worker in placing the objects onto the right shelf. MicroLAN TRUNK WITH BRANCHES Figure 10 HOST COMPUTER iButton iButton iButton SERIAL PORT TRUE GROUND ADAPTER MAIN CNT. DS2409 AUX. ID CHIP GND 1-WIRE 5V DUAL MASTER SYSTEM Figure 11 A HOST COMPUTER NETWORK MAIN MAIN B CNT. CNT. DS2409 SERIAL PORT AUX. DS 1996 AUX. GND TRUE GROUND ADAPTER 072398 14/16 DS2409 SERIAL PORT GND 1-WIRE 5V HOST COMPUTER 1-WIRE SI.-LABEL SI.-LABEL 5V TRUE GROUND ADAPTER DS2409 ABSOLUTE MAXIMUM RATINGS* Voltage on Data to Ground Operating Temperature Storage Temperature Soldering Temperature -0.5V to +7.0V -40C to +85C -55C to +125C 260C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. (-40C to +85C, VDD = 5V 10%) DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL MIN Logic 1 (1-Wire In) VIH1 Logic 0 (1-Wire In) VIL1 Output Logic Low @ 4 mA (1-Wire In) TYP MAX UNITS NOTES 2.2 VDD V 1 -0.3 +0.8 V 1 VOL1 0.4 V 1 Output Logic High (1-Wire In) VOH1 VPUP V 1, 3 Input Load Current (1-Wire In) IL1 A 4 V 1 V 1 mA 1, 8 V 1 V 1 mA 1 5 Logic 1 (Main Out) VIHM 2.2 Logic 0 (Main Out) VILM -0.3 Output Sink Current @ 0.4V (Main Out) ISM Logic 1 (Aux. Out) VIHA 2.2 Logic 0 (Aux. Out) VILA -0.3 Output Sink Current @ 0.4V (Aux. Out) ISA Output Leakage (Control Output) ILOC Current @ 0.4V (Control Output) IOLC Operating Current IDD 50 A 2 Quiescent Current IDDQ 25 A 2 MAX UNITS +0.8 10 +0.8 10 1 10 A mA CAPACITANCE PARAMETER (tA = 25C) SYMBOL MIN TYP Capacitance 1-Wire In CIN1 50 pF Capacitance Main Out CINM 50 pF Capacitance Aux. Out CINA 50 pF NOTES 072398 15/16 DS2409 RESISTANCES PARAMETER (-40C to +85C) SYMBOL MIN TYP MAX UNITS 1-Wire In to Main ON Res. ZMON 10 20 1-Wire In to Aux. ON Res. ZAON 15 30 Main and Aux. Pull-up Res. RPU 1.5 k (-40C to +85C, VDD = 5V 10%) AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL MIN MAX UNITS Time Slot tSLOT 60 120 s Write 1 Low Time tLOW1 1 15 s Write 0 Low Time tLOW0 60 120 s Read Low Time tLOWR 1 15 s Read Data Valid tRDV Release Time tRELEASE NOTES TYP s exactly 15 0 15 NOTES 45 s 1 s Read Data Setup tSU 6 Recovery Time tREC 1 s Reset Time High tRSTH 480 s 5 Reset Time Low tRSTL 480 960 s 7 Presence Detect High tPDH 15 60 s Presence Detect Low tPDL 60 240 s NOTES: 1. All voltages are referenced to ground. 2. Measured with outputs open. 3. VPUP = external pull-up voltage. 4. Input load is to ground. 5. An additional reset or communication sequence cannot begin until the reset high time has expired. 6. Read data setup time refers to the time the bus master must pull the I/O line low to read a bit. Data is guaranteed to be valid within 1 s of this falling edge. 7. The reset low time (tRSTL) should be restricted to a maximum of 960 s, to allow interrupt signaling, otherwise, it could mask or conceal interrupt pulses. The DS2409 may perform a power-on reset cycle and deactivate both 1-Wire outputs if the 1-Wire input is low for minimum 8 ms. A low time of 12 ms or more will always cause a power-on reset cycle. 8. The main output has a slew rate controlled output. The indicated current is a DC value. The sink current typically reaches 80% of its DC value 1 s after turning on the transistor. 072398 16/16