ee FAIRCHILD ee SEMICONDUCTOR 100322 Low Power 9-Bit Buffer General Description The 100322 is a monolithic 9-bit buffer. The device contains nine non-inverting buffer gates with single input and output. All inputs have 50 kQ pull-down resistors and all outputs are buffered. Features w 30% power reduction of the 100122 March 1998 2000V ESD protection Pin/function compatible with 100122 Voltage compensated operating range = -4.2V to -5.7V Available to MIL-STD-883 Available to industrial grade temperature range Ordering Code: Logic Symbol o, _>_ 0, DSO 10608-1 Pin Names Description D,, Dg Data Inputs O,, Oo Data Outputs 1998 Fairchild Semiconductor Corporation DS010608 www fairchildsemi.com A9}HING WE-6 49MOd MO] ZZEOOLConnection Diagrams 24-Pin DIP NA Vocaq 1 24D; 03-42 23D, O43 22,;D, o-44 211-Dg 0-45 20;-Ds Yoo 6 19F-Voca Voca]7 18 F-Ver Og48 17D, 0743 16 [Dg Og, 10 15,-Ds Ost 14D, 04-412 13 EVocq DS010608-2 24-Pin Quad Cerpak Dg Dg VecaVer D7 Dg Lj} t tt 28-Pin PCC Ds D4VccaeesO4 5 Og Of 2) ] Dy Dy D3 VeesVoca9s Op DS010608-4 us D3 Voca 7] 034 4 24 23 22 21 20 19 1 18] Ds 2 17/-Dy 3 18 Voc, 4 15-0, 5 14-0, 8 13; 0, 7.8 9 10 1112 rr?rtdtd od 81 09 Voc Veca% 07 DS010608-3 www fairchildsemi.comAbsolute Maximum Ratings (note 1) Above which the useful life may be impaired. Storage Temperature (Teta) -65C to +150C Maximum Junction Temperature (TJ) Ceramic H175C Plastic +150C Vee Pin Potential to Ground Pin -7.0V to +0.5V Input Voltage (DC) Vee to +0.5V Output Current (DC Output HIGH) -50 mA ESD (Note 2) 22000V Commercial Version DC Electrical Characteristics Recommended Operating Conditions Case Temperature (Tg) Commercial 0C to +85C Industrial -40C to +85C Military -55C to +125C Supply Voltage (Vee) -5.7V to -4.2V Note 1: Absolute maximum ratings are those values beyond which the de- vice may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Vee = 4.2V to -5.7V, Voo = Voca = GND, To = 0C to +85C (Note 3) Symbol Parameter Min Typ Max Units Conditions Vou Output HIGH Voltage -1025 -955 -870 mV Vin =Vin (Max) Loading with VoL Output LOW Voltage -1830 -1705 -1620 or Vit (min) 50Q to -2.0V Vouc Output HIGH Voltage -1035 mV Vin = Vincminy Loading with Voto Output LOW Voltage -1610 oF Vit (Max) 50Q to -2.0V Vin Input HIGH Voltage -1165 -870 mV Guaranteed HIGH Signal for All Inputs Vit Input LOW Voltage -1830 -1475 mV Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 HA Vin = Vic min) liq Input HIGH Current 240 HA Vin = Vin (Max) lee Power Supply Current -65 -30 mA Inputs Open Note 3: The specified limits represent the "worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. DIP AC Electrical Characteristics Ver = -4.2V to -5.7V, Veo = Veca = GND Symbol Parameter Te = 0C Te = +25C Te = +85C Units Conditions Min Max Min Max Min Max teLy Propagation Delay 0.45 1.45 0.45 1.45 0.45 1.55 Figures 1, 2 TPHL Data to Output ns (Note 4) tH Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns Figures 1, 2 THe 20% to 80%, 80% to 20% Note 4: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching. PCC and Cerpak AC Electrical Characteristics Vee = -4.2V to -5.7V, Voc = Veca = GND Symbol Parameter Te = 0C To = +25C To = +85C Units Conditions Min Max Min Max Min Max teLy Propagation Delay 0.45 1.25 0.45 1.25 0.45 1.35 ns Figures 1, 2 tpHL Data to Output (Note 6) tty Transition Time 0.35 1.10 0.35 1.10 0.35 1.10 ns Figures 1, 2 tH 20% to 80%, 80% to 20% www fairchildsemi.comPCC and Cerpak AC Electrical Characteristics (continue) Vee = -4.2V to -5.7V, Veo = Veca = GND Symbol Parameter To = OC To = +25C To = +85C Units Conditions Min Max Min Max Min Max tosHL Maximum Skew Common Edge PCC Only Output-to-Output Variation 200 200 200 ps (Note 5) Data to Output Path tosLH Maximum Skew Common Edge PGC Only Output-to-Output Variation 200 200 200 ps (Note 5) Data to Output Path tost Maximum Skew Opposite Edge PCC Only Output-to-Output Variation 260 260 260 ps (Note 5) Data to Output Path tps Maximum Skew PCC Only Pin (Signal) Transition Variation 200 200 200 ps (Note 5) Data to Output Path Note 5: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH to LOW (tggy1), or LOW to HIGH (tog_y), or in opposite directions both HL and LH (tost). Parameters togt and tpg guaranteed by design. Note 6: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching. Industrial Version PCC DC Electrical Characteristics Vee = 4.2V to -5.7V, Voo = Voca = GND, To = -40C to +85C (Note 7) Symbol Parameter To = -40C Te = OC to Units Conditions +85C Min Max Min Max Vou Output HIGH Voltage -1085 -870 -1025 -870 mV | Vin =Vin (max Loading with VoL Output LOW Voltage -1830 -1575 -1830 -1620 or Vit (min) 50Q to -2.0V Vouc Output HIGH Voltage -1095 -1035 mV Vin = Vin amin) Loading with Vote Output LOW Voltage -1565 -1610 or Vit (Max) 50Q to -2.0V Vin Input HIGH Voltage -1170 -870 -1165 -870 mV Guaranteed HIGH Signal for All Inputs Vit Input LOW Voltage -1830 -1480 -1830 -1475 mV Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 0.50 HA Vin = Vic miny liq Input HIGH Current 300 240 HA Vin = Vin (Max lee Power Supply Current -65 -30 -65 -30 mA Inputs Open Note 7: The specified limits represent the "worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. PCC AC Electrical Characteristics Vee = 4.2V to -5.7V, Voo = Voca = GND Symbol Parameter Te = -40C To = +25C To = +85C Units Conditions Min Max Min Max Min Max teLy Propagation Delay 0.45 1.25 0.45 1.25 0.45 1.35 ns Figures 1, 2 TpHL Data to Output (Note 8) tty Transition Time 0.30 1.20 0.35 1.10 0.35 1.10 ns Figures 1, 2 trae 20% to 80%, 80% to 20% Note 8: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching. www fairchildsemi.com 4Military Version DC Electrical Characteristics Vee = -4.2V to -5.7V, Voc = Veca = GND, Te = 0C to +85C Symbol Parameter Min | Max | Units Te Conditions Notes Vou Output HIGH Voltage |-1025 | -870 | mV 0C to +125C (Notes 9, 10, -1085 | -870 | mV -55C Vin =Vin (max | Loading with 11) VoL Output LOW Voltage [-1830 |-1620 | mV 0C to +125C or Vi (min) 50Q to -2.0V 1830 |-1555 | mV -55C Vouc Output HIGH Voltage |-1035 mV 0C to +125C (Notes 9, 10, 1085 mV -55C Vin =Vin (max | Loading with 11) Vote Output LOW Voltage -1610 | mV 0C to +125C or Vi (min) 50Q to -2.0V 1555 | mV -55C Vin Input HIGH Voltage |-1165 | -870 | mV 55C to +125C Guaranteed HIGH Signal (Notes 9, 10, for All Inputs 11, 12) Vit Input HIGH Voltage [-1830 |-1475 | mV 58C to +125C Guaranteed LOW Signal (Notes 9, 10, for All Inputs 11, 12) lit Input LOW Current 0.50 HA 55C to +125 Vee = -4.2V (Notes 9, 10, Vin = Vic (min) 11) liq Input HIGH Current 240 HA 0C to +125C Vee = -5.7V (Notes 9, 10, 340 HA -55C Vin = Vin (Max 11) lee Power Supply -70 | -25 mA 58C to +125C Inputs Open (Notes 9, 10, Current 11) Note 9: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 10: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8. Note 11: Sample tested (Method 5005, Table |) on each manufactured lot at -55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8. Note 12: Guaranteed by applying specified input condition and testing VoH/VoL. AC Electrical Characteristics Vee = -4.2V to -5.7V, Voc = Veca = GND Symbol Parameter To = -55C To = +25C To = +125C | Units Conditions Notes Min Max Min Max Min Max teLy Propagation Delay 0.30 1.80 0.40 1.60 0.40 1.80 ns (Notes 13, teHL Data to Output Figures 1,2 | 14, 15, 17) tty Transition Time 0.30 1.20 0.30 1.20 0.30 1.20 ns (Note 16) tra 20% to 80%, 80% to 20% Note 13: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals 55C), then testing immedi- ately after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 14: Screen tested 100% on each device at +25C, only Subgroup AQ. Note 15: Sample tested (Method 5005, Table |) on each manufactured lot at +25C, Subgroup AQ, and at +125C and 55C temperatures, Subgroups A10 and A11. Note 16: Not tested at +25C, +125C, and -55C temperature (design characterization data). Note 17: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching. www fairchildsemi.comTest Circuit ut On SCOPE y am, CHAN A CC 0.1 LF ry L Rr L2 PULSE ON eoeR cn SCOPE GENERATOR y wear tt CHAN B I L gs, 01,.F = vee T ~ DBS010608-5 Notes: Voc. Veca = +2V, Veg = -2.5V L1 and L2 = equal length 50Q impedance lines Ry = 50Q terminator internal to scope Decoupling 0.1 pF from GND to Voc and Vee All unused outputs are loaded with 500 to GND C, = Fixture and stray capacitance < 3 pF FIGURE 1. AC Test Circuit 0.7+0.1 | [rerens ns +1.05V OUTPUT Switching Waveforms _ LL | lL LH DS010608-6 FIGURE 2. Propagation Delay and Transition Times www fairchildsemi.com 6Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 100322 D CG QB Device Type (basic) Special Variation QB = Military grade device with environmental and burn-in processing. Package Code D = Ceramic DIP F = Quad Cerpak Q = Plastic Leaded Chip Carrier (PCC) P = Plastic DiP Temperature Range C = Commercial (0C to + 85C) | = Industrial ( 40C to + 85C) (PCC only) M = Military (55C to + 125C) DS010608-7 Physical DimeNnSiONS inches (millimeters) unless otherwise noted 1.215 (30.86) - 0,025 MAX 0.030 0.055 (0.64) 24 8 (0.761.40) nF Am RAO TYP 0.390 (9.91) MAX / Litt ht Gel he Gel Ret Gt GA hal bel Ol | | ost a07 0.005 GLASS 0.050 0,060 81-1. 0.400 0.430 0.180 (0.13) SEALANT (1271.52) \P|] 0.015 - 0.055, (10.16 10.92) (4.57) MIN TYP (0.38 1.40) Y MAX t i N 0.225 | TA (5.72) __ Y wax vel te WARE LSA ae 90 100 0.008 0.012 Tye (0.20~0.30) 0.125 TYP 0.055 0.090-0.110 g.or50.071 (3.18) 0.435 - 0.535 (a) (2.29 2.7a) (0.38 0.53) MIN (11.05 13.59) MAX TYP TYP TYP TYP BOTH ENDS 24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D) Package Number J24E J24E (REV J) www fairchildsemi.com9.035-0.045 R To.a9-1.14] IN 1.194-1.214 [30.33-30.84] 0.202 24 [5.13] 13 DOO ooo 5 b) 0.337-0.347 [8.56-8.81] u OUOUOUOIOI OU u 12 0.125 24-Lead Plastic Dual-In-Line Package (P) PIN NO. 1 IDENT [3.18] 0.125-0.135 4 0.060 0.039 [3.18-3.43] TYP |e 4X | [1.52] [0.99] 0.065 [1.65] 0.145-0.200_| | } [3.68-5.08] 6-44 9.020 iy L__ 0.125-0.140 1, noo Ip [0.51] [3.18-3.56] ! | |___0.047-0.057 0.050 typ [1.19-1.45] [1.27] 0.090-0.110 0.015-0.021 [0.38-0.53] |? [2.29-2.79] TYP Package Number N24E TYP Physical DimensiON$ inches (millimeters) unless otherwise noted (Continued) 0.390-0.410 [9.91-10.41] 90-100 0.380 yin [9.65] +0.040 0.428 10-040 +1.02] 0.009-0.015 [10.87 5 35] [0.23-0.38] N24E (REV A) www fairchildsemi.comPhysical DimMeNnSiONS inches (millimeters) unless otherwise noted (Continued) +0.006 0.450 +5008 11.43 40.15 ON Pr et 450 x 2048 1.14 ; - [1.14] 9.01740.004 ryp 0.02940,003 rp [0.4340.10] [0.7440.08] 1 - 5 [] 25 = = A 7] + a A 0.41040.020 typ [10.4140.51] a a 11 L]19 1 0.050 typ | ae [1.27] >| je 2-920 win tye 0.300 typ [0.51] [7.62] 0.1050.015 0.045 [2.670.33] anns_/ a SEATING PLANE 0.185-0.180 typ [4.19-4.57] ax]0.004 [0.10] 0.4900.005 typ [12.4540.13] V25A (REV K) 28-Lead Plastic Chip Carrier (Q) Package Number V28A www fairchildsemi.com100322 Low Power 9-Bit Buffer Physical DimensiON$ inches (millimeters) unless otherwise noted (Continued) 0.360 0.370 MIN 0.360 0.007 Ht 9 550 TYP > |~< TYP {925g TYP 1 aoa TYP (MOLDED BODY) PIN ND. 1 nN (~24 19 YI rd 4 18] Q eS _ 0 J _ q TT + Do id J TT a |, 3, ig 7 i2 0.018 | 0.075 MAX _| 0.050 o.oig TYP < 8 pLcs Pl | 0.035 >] 0.050 + 9.005 >| -t 0.085 MAX LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE- VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI- lg 0.400 MAX___.| GLASS 24-Lead Ceramic Flatpak (F) Package Number W24B CONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or sys- 2. W24B (REV 0} A critical component in any component of a life support tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild Semiconductor Fairchild Semiconductor Fairchild Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd. Americas Fax: +49 (0) 1 80-530 85 86 13th Floor, Straight Block, Tel: 81-3-5620-6175 Customer Response Center Email: europe.support@nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-3-5620-6179 Tel: 1-888-522-5372 Deutsch Tel: +49 (0) 8 141-35-0 Tsimshatsui, Kowloon English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +89 (0) 2 57 5631 www fairchildsemi.com Hong Kong Tel: +852 2737-7200 Fax: +852 2314-0061 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.