ADT7408CCPZ2-R2 - Analog Devices, Inc.

±2°C Accurate, 12-Bit Digital

Temperature Sensor

Preliminary Technical Data

ADT7408

Rev. PrC

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FEATURES

12-bit temperature-to-digital converter

±2oC accuracy typ

Operation from −20°C to +125°C

Operation from 3 V to 3.6 V

Average supply current (500µA max)

Selectable 0, 1.5oC, 3oC, 6oC Hysteresis

SMBus- /I2C- compatible interface

Dual purpose event pin: Comparator or Interrupt

8-pin LFCSP 3mm x 3mm (JEDEC MO-229 VEED-4) package

Complies with JEDEC standard JC-42.4 Memory Module

Thermal Sensor Component Specification

APPLICATIONS

Memory module temperature monitoring

Isolated sensors

Environmental control systems

Computer thermal monitoring

Thermal protection

Industrial process control

Power-system monitors

Hand Held Applications

FUNCTIONAL BLOCK DIAGRAM

ADT7408

Capability

Configuration

Alarm Temp Upper

Boundary Trip

Alarm Temp Lower

Boundary Trip

Critical Temp

Temperature

Manufacturer’s

ID Register

Factory Reserved

Address Pointer

12/10 Bit Event#

VSS

ADT7408

Capability

Configuration

Alarm Temp Upper

Boundary Trip

Alarm Temp Lower

Boundary Trip

Critical Temp

Temperature

Manufacturer’s

ID Register

Factory Reserved

Address Pointer

12/10 Bit Event#

VSS

Figure 1.

GENERAL DESCRIPTION

The ADT7408 is the first digital temperature sensor that

complies with JEDEC standard JC-42.4 for Mobile Platform

Memory Module. The ADT7408 contains a band gap

temperature sensor and 12-bit ADC to monitor and digitize the

temperature to a resolution of 0.0625°C.

There is an open-drain Event# output that is active when the

monitoring temperature exceeds a critical programmable limit

or the temperature falls above or below an alarm window. This

pin can operate in either comparator or interrupt mode. There

are three slave-device address pins that allows up to eight

ADT7408s to be used in a system that monitors temperature of

various components and subsystems.

The ADT7408 is specified for operation at supply voltages from

3.0 V to 3.6 V. Operating at 3.3 V, the average supply current is

less than typically 240µA. The ADT7408 offers a shutdown

mode that powers down the device and gives a shutdown

current of typically 3 µA. The ADT7408 is rated for operation

over the –20°C to +125°C temperature range. The ADT7408 is

available in lead-free 8-lead LFCSP 3mm x 3mm (JEDEC MO-

229 VEED-4) package.

ADT7408 Preliminary Technical Data

Rev. PrC | Page 2 of 22

Specifications

All specifications TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

TEMPERATURE SENSOR AND ADC

Local Sensor Accuracy (C grade) ±1.0 ±2.0 °C 75°C ≤ TA ≤ 95°C, 3.0V ≤ VDD ≤ 3.6V Active Range

±2.0 ±3.0 °C

40°C ≤ TA ≤ 125°C, 3.0V ≤ VDD ≤ 3.6V Monitor Range

±3.0 ±4.0 °C

-20°C ≤ TA ≤ 125°C, 3.0V ≤ VDD ≤ 3.6V

ADC Resolution 12 Bits

Temperature Resolution 0.0625 °C

Temperature Conversion Time 15 30 ms

Update Rate 100 125 ms

Long Term Drift 0.081 °C Drift over 10 years, if part is operated at 55°C

Event# OUTPUT (OPEN DRAIN)

Output Low Voltage, VOL 0.4 V IOL = 3 mA

Sink Current, ISINK 6 mA

Pin Capacitance 10 pF

High Output Leakage Current IOH 0.1 1 µA Event# = 3.6 V

Rise Time1 t

LH 30 ns

Fall Time1 t

HL 30 ns

RON Resistance (Low Output) 55 Ω Supply and temperature dependent

DIGITAL INPUTS

Input Current, IIH, IIL -1 +1 µA VIN = 0 V to VDD

Input Low Voltage VIL 0.8 V

3.0 V ≤ VDD ≤ 3.6 V

Input High Voltage VIH 2.1 V

3.0 V ≤ VDD

≤ 3.6 V

SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than

50 ns

Pin Capacitance 3 10 pF

DIGITAL OUTPUT (OPEN DRAIN)

Output Low Current, IOL 6 mA SDA Forced to 0.6 V

Output Low Voltage VOL 0.4 V

3.0 V ≤ VDD ≤ 3.6 V at IOPULL_UP = 350 µA

Output High Voltage VOH 2.1 V

Output Capacitance COUT 3 10 pF

Hysteresis 500 mV

POWER REQUIREMENTS

Supply Voltage VDD 3.0 3.3 3.6 V

Average Supply Current IDD 240 500 µA

Supply Current IDD_CONV 370 550 µA Device current while converting

Quiescent Current IDD_Q 35 40 µA Device current between conversions

Shutdown Mode at 3.3 V 3 10 µA

Average Power Dissipation PD 790 µW VDD = 3.3 V, normal mode at 25°C

Preliminary Technical Data ADT7408

Rev. PrC | Page 3 of 22

TIMING CHARACTERISTICS

Guaranteed by design and characterization, not production tested. The SDA & SCL timing is measured with the input filters turned on so

as to meet the Fast-Mode I2C specification. Switching off the input filters improves the transfer rate but has a negative affect on the EMC

behavior of the part.

TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.

Table 2.

Parameter Symbol MIN TYP MAX Units Comments

SCL Clock Frequency fSCL 10 100 kHz

Bus Free Time between a STOP (P) and START (S)

condition

tBUF 4.7 µs

Hold Time after (Repeated) START condition. After

this period, the first clock is generated

tHD:STA 4.0 µs

Repeated Start Condition Setup Time tSU:STA 4.7 µs

High Period of the SCL Clock tHIGH 4.0 50 µs

Low Period of the SCL Clock tLOW 4.7 µs

Fall Time of Both SDA and SCL Signals tF 300 ns

Rise Time of Both SDA and SCL Signals tR 1000 ns

Data Setup Time tSU;DAT 250 ns

Data Hold Time tHD;DAT 300 ns

Setup Time for STOP Condition tSU;STO 4.0 µs

Capacitive Load for each Bus Line, CB 400 pF

Figure 2. SMBus/I2C Timing Diagram

SCL

SDA

P S P

tBUF

tLOW tHIGH

tHD:STA

tR t

tSU:DA

tSU:STA tSU:STO

03224-028

VIL

VIH

VIL

VIH

tHD:DAT

tRtF

ADT7408 Preliminary Technical Data

Rev. PrC | Page 4 of 22

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VDD to VSS –0.3 V to +7 V

SDA Input Voltage to VSS –0.3 V to VDD + 0.3 V

SDA Output Voltage to VSS –0.3 V to VDD + 0.3 V

SCL Input Voltage to VSS –0.3 V to VDD + 0.3 V

Event# Output Voltage to VSS –0.3 V to VDD + 0.3 V

Operating Temperature Range –55°C to +150°C

Storage Temperature Range –65°C to +160°C

Maximum Junction Temperature, TJMAX 150°C

Power Dissipation1 PMAX = (TJMAX − TA2)/θJA

Thermal Impedance3

θJA, Junction-to-Ambient (still air) TBD

θJC, Junction-to-Case TBD

IR Reflow Soldering

Peak Temperature TBD

Time at Peak Temperature TBD

Ramp-Up Rate TBD

Ramp-Down Rate TBD

Time 25°C to Peak Temperature TBD

IR Reflow Soldering – Pb-Free Package

Peak Temperature TBD

Time at Peak Temperature TBD

Ramp-Up Rate TBD

Ramp-Down Rate TBD

Time 25°C to Peak Temperature TBD

1 Values relate to package being used on a standard 2-layer PCB..

2 TA = ambient temperature.

3Junction-to-case resistance is applicable to components featuring a

preferential flow direction, e.g., components mounted on a heat sink.

Junction-to-ambient resistance is more useful for air-cooled, PCB mounted

components.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or

any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-

tion or loss of functionality.

Preliminary Technical Data ADT7408

Rev. PrC | Page 5 of 22

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 A0 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.

2 A1 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.

3 A2 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.

4 VSS Negative Supply, Ground.

5 SDA SMBus/I2C Serial Data Input/Output. Serial data to be loaded into the part’s registers and read from these registers

is provided on this pin. Open-drain configuration - needs a pullup resistor.

6 SCL Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock in and clock out data to

and from any register of the ADT7408. Open-drain configuration - needs a pullup resistor.

7 Event# Active Low. Open Drain event output pin. Driven low on comparator level, or Alert Interrupt

8 VDD Positive Supply, Power. The supply should be decoupled to ground.

Figure 3. LFCSP-8 (Bottom View) Pin Configurations

Bottom View

Not to Scale

(ADT7408

LFCSP-8

(MO-229 VEED-2)

ADT7408 Preliminary Technical Data

Rev. PrC | Page 6 of 22

THEORY OF OPERATION

CIRCUIT INFORMATION

The ADT7408 is a 12-bit digital temperature sensor. Its output

is Two’s complement that the 12th bit is the sign bit. An on-

board sensor generates a voltage precisely proportional to

absolute temperature, which is compared to an internal voltage

reference and is input to a precision digital modulator. Overall

accuracy for the ADT7408 is ±2°C from 75°C to 95°C, ±3°C

from 40°C to +125°C, and ±4°C from -20°C to +125°C with

excellent transducer linearity. The serial interface is SMBus-

/I2C- compatible and the open-drain output of the ADT7408 is

capable of sinking 6 mA.

The on-board temperature sensor has excellent accuracy and

linearity over the entire rated temperature range without

needing correction or calibration by the user.

The sensor output is digitized by a first-order ∑-∆ modulator,

also known as the charge balance type analog-to-digital

converter. This type of converter utilizes time-domain over-

sampling and a high accuracy comparator to deliver 12 bits of

effective accuracy in an extremely compact circuit.

CONVERTER DETAILS

The ∑-∆ modulator consists of an input sampler, a summing

network, an integrator, a comparator, and a 1-bit DAC. This

architecture creates a negative feedback loop that minimizes the

integrator output by changing the duty cycle of the comparator

output in response to input voltage changes. The comparator

samples the output of the integrator at a much higher rate than

the input sampling frequency, called oversampling.

Oversampling spreads the quantization noise over a much

wider band than that of the input signal, improving overall

noise performance and increasing accuracy.

Figure 4. First-Order ∑-∆ Modulator

The modulated output of the comparator is encoded using a

circuit technique that results in SMBus/I2C temperature data.

FUNCTIONAL DESCRIPTION

The conversion clock for the part is internally generated. No

external clock is required except when reading from and

writing to the serial port. In normal mode, the internal clock

oscillator runs an automatic conversion sequence. During this

automatic conversion sequence, a conversion is initiated every

100 ms. At this time, the part powers up its analog circuitry and

performs a temperature conversion. This temperature

conversion typically takes 60 ms, after which time the analog

circuitry of the part automatically shuts down. The analog

circuitry powers up again 40 ms later, when the 100 ms timer

times out and the next conversion begins. The result of the most

recent temperature conversion is always available in the

temperature value register as the SMBus/I2C circuitry never

shuts down.

The ADT7408 can be placed in a shutdown mode via the

configuration register, in which case the on-chip oscillator is

shut down and no further conversions are initiated until the

ADT7408 is taken out of shutdown mode. The ADT7408 can be

taken out of shutdown mode by writing zero to Bit D8 in the

configuration register. The conversion result from the last

conversion prior to shut-down can still be read from the

ADT7408 even when it is in shutdown mode.

In normal conversion mode, the internal clock oscillator is reset

after every read or write operation. This causes the device to

start a temperature conversion, the result of which is typically

available 60 ms later. Similarly, when the part is taken out of

shutdown mode, the internal clock oscillator is started and a

conversion is initiated. The conversion result is typically

available 60 ms later. Reading from the device before a

conversion is complete causes the ADT7408 to stop converting;

the part starts again when serial communication is finished.

This read operation provides the previous result.

The measured temperature value is compared with the

temperature set at the Alarm Temp Upper Boundary Trip

the Critical Temp Trip Register. If the measured value exceeds

these limits then the EVENT# pin is activated. This EVENT#

output is programmable for interrupt mode, comparator mode,

and also the output polarity via the configuration register.

Preliminary Technical Data ADT7408

Rev. PrC | Page 7 of 22

TEMPERATURE DATA FORMAT

The 16-bit value used in the three Temperature Trip Point

Registers and Temperature Register is in Two’s complement

format. The Temperature Register has a 12-bit resolution with

256oC range with one LSB = 0.0625 oC (256oC/212). The

temperature data in the three Temperature Trip Point Registers

(Alarm Upper, Alarm Lower and Critical), is a 10-bit format

with 256oC range with one LSB = 0.25 oC. D12 in all these

registers represent the sign bit such that 0 = positive and 1 =

negative. In Two’s Complement format, the data bits are

inverted and add 1 if the sign bit is negative.

For example if the following values are read in the Temperature

1. A T1 value of 0x019C is 0000 0001 1001 1100 in binary, thus

T1 = + 0x19C * 0.0625 = +25.75oC

2. A T2 value of 0x07C0 is 0000 0111 1100 0000 in binary, thus

T2 = 0x7C0 * 0.0625 = +124oC

3. A T3 value of 0x1E74 is 0001 1110 0111 0100 in binary. Since

the sign bit is negative, the data becomes 0001 1000 1100, thus

T3 = - 0x18C * 0.0625 = -24.75oC

If the following value is read from the Critical Temperature

1. A value of 0x07C0 is 0000 0111 1100 0000 in binary, thus the

critical temperature = + 0x1F0 * 0.25 = +124oC

The temperature calculations above are cumbersome, the more

convenient temperature conversion formula can be found in

equations (1) to (4) later.

Although one LSB of the ADC corresponds to 0.0625°C. The

ADC can theoretically measure a temperature range of 255°C

(−128°C to +127°C ), but the ADT7408 is guaranteed to

measure a low value temperature limit of −55°C to a high value

temperature limit of +125°C.

Reading back the temperature from the temperature value

resolution is required, then a one byte read is required.

Designers used to using a 9-bit temperature data format can

still use the ADT7408 by ignoring the last three LSBs of the 12-

bit temperature value. These three LSBs are Bit D4 to Bit D6 in

Table 5.

Table 5. 12-Bit Temperature Data Format

Temperature

Digital Output (Binary)

D11 to D0 Digital Output (Hex)

−55°C 1100 1001 0000 C90

−50°C 1100 1110 0000 CE0

−25°C 1110 0110 1111 E6F

−0.0625°C 1111 1111 1111 FFF

0°C 0000 0000 0000 000

+0.0625°C 0000 0000 0001 0x001

+10°C 0000 1010 0000 0x0A0

+25°C 0001 1001 0000 0x190

+50°C 0011 0010 0000 0x320

+75°C 0100 1011 0000 0x4B0

+100°C 0110 0100 0000 0x640

+125°C 0111 1101 0000 0x7D0

Temperature Conversion Formulas

12-Bit Temperature Data Format

Positive Temperature = ADC Code(d)/16 (1)

Negative Temperature = (ADC Code(d) − 4096)/16 (2)

For ADC Code, Bit D12 (sign bit) is removed from the ADC

code.

10-Bit Temperature Data Format

Positive Temperature = ADC Code(d)/4 (3)

Negative Temperature = (ADC Code(d) – 1024)/4 (4)

For ADC Code, Bit D12 (sign bit) is removed from the ADC

code

ADT7408 Preliminary Technical Data

Rev. PrC | Page 8 of 22

DESCRIPTION

The thermal sensor continuously monitors the temperature and

updates the temperature data ten times per second.

Temperature data is latched internally by the device and may be

read by software from the bus host at any time.

SMBus/I2C slave address selection pins allow up to 8 such

devices to co-exist on the same bus. This means that up to 8

memory modules can be supported given each module has one

such slave device address slot.

After initial power-on, the configuration registers are set to the

default values. Software can write to the configuration register

to set bits as per the bit-definitions in the following section.

ADT7408 REGISTERS

The ADT7408 contains sixteen accessible registers shown in

Table 6. The address pointer register is the only register that is 8

bits while the rest are 16 bits wide. On power-up, the Address

Pointer Register is loaded with 0x00 and points to the

Capability Register.

Table 6. ADT7408 Registers

Pointer

Address

Name Power-On

Default

Read/Write

Not

Applicable

Address Pointer 0x00 Write

0x00 Capability

0x001D Read

0x01 Configuration

0x0000 Read/Write

0x02 Alarm Temp

Upper Boundary

Trip Register

0x0000 Read/Write

0x03 Alarm Temp

Lower Boundary

Trip Register

0x0000 Read/Write

0x04 Critical Temp

Trip Register

0x0000 Read/Write

0x05 Temperature

Undefined Read

0x06 Manufacturer’s

ID Register

0x11D4 Read

0x07 Device

ID/Revision

0x0800 Read

0x08-0x0F Vendor-defined

Registers

0x0000 Reserved

Address Pointer Register (write only)

This 8-bit write only register selects which of the 16-bit registers

is accessed in subsequent read/write operations. Address space

between 0x08 and 0x0F are reserved for factory usage or test

registers.

Table 7. Address Pointer Register

Bits D7 D6 D5 D4 D3 D2 D1 D0

Content 0 0 0 0 Register

Select

Table 8. Address Pointer Selected Registers

D2 D1 D0 Register Selected

0 0 0 Capability Register

0 0 1 Configuration Register

0 1 0 Alarm Temp Upper Boundary Trip

0 1 1 Alarm Temp Lower Boundary Trip

1 0 0 Critical Temp Trip Register

1 0 1 Temperature Register

1 1 0 Manufacturer ID

1 1 1 Device ID/Revision

Preliminary Technical Data ADT7408

Rev. PrC | Page 9 of 22

Capability Register (read only)

This 16-bit read only register indicates the capabilities of the thermal sensor.

Table 9. Capability Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Content RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU TRES1 TRES0 Wider

Range

Higher

Precision

Has Alarm &

Critical Trips

*RFU=Reserved For Future Use

Table 10. Capability Mode Description

Bits Description

D0 Basic Capability

1 – Has Alarm & Critical Trips Capability (Required)

D1 Accuracy

0 – Default, accuracy +/-2oC over the active and +/-3oC monitor ranges

D2 Wider Range

0 – Values lower than 0oC will be clamped and represented as binary value 0

1 – Can read temperature below 0oC and set sign bit accordingly (Default)

D4:D3 Temperature Resolution

00 – 0.5oC LSB

01 – 0.25oC LSB

10 – 0.125oC LSB

11 – 0.0625oC LSB (Default)

D15:D5 0 – Reserved for future use. Must be zero

Configuration Register (read/write)

This 16-bit read/write register stores various configuration modes for the ADT7408 and are shown in Tables 11 and 12.

Table 11. Configuration Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Content RFU RFU RFU RFU RFU Hysteresis Shut-

down

Mode

Critical

Lock

Bit

Alarm

Lock

Bit

Clear

Event

Output

Status

Event

Output

Control

Critical

Event

Only

Event

Polarity

Event

Mode

Table 12. Configuration Mode Description

Bits Description

D0 Event Mode

0 – Comparator output mode (default)

1 – interrupt mode

When either of the lock bits is set, this bit cannot be altered until unlocked.

D1 Event Polarity

0 – Active Low (default)

1 – Active High

When either of the lock bits is set, this bit cannot be altered until unlocked.

D2 Critical Event Only

ADT7408 Preliminary Technical Data

Rev. PrC | Page 10 of 22

0 – Event Output on Alarm or Critical temp event (default)

1 – Event only if temperature is above the value in the critical temp register

When either of the lock bits is set, this bit cannot be altered until unlocked.

D3 Event Output Control

0 – Event Output Disabled (default)

1 – Event Output Enabled

When either of the lock bits is set, this bit cannot be altered until unlocked.

D4 Event Status (read only)

0 – Event Output condition is not being asserted by this device

1 – Event Output pin is being asserted by this device due to Alarm Window or Critical trip condition

The actual event causing the event can be determined from the Read Temperature register. Interrupt Events can be cleared by

writing to “Clear Event” bit. Writing to this bit will have no effect.

D5 Clear Event (write only)

0 – No effect

1 – Clears active event in Interrupt Mode. Writing to this register has no effect in Comparator Mode. When read, this bit will always

return zero ‘0’. Once the DUT temperature is greater than the Critical Temperature, Event cannot be cleared.

D6 Alarm Window Lock bit

0 – Alarm Trips are not locked and can be altered (default)

1 – Alarm Trip register settings cannot be altered

This bit is initially cleared. When set this bit will return a 1, and remain locked until cleared by internal power on reset. These bits

can be written with a single write and do not require double writes.

D7 Critical Trip Lock bit

0 – Critical Trip is not locked and can be altered (default)

1 – Critical Trip register settings cannot be altered

This bit is initially cleared. When set this bit will return a 1, and remain locked until cleared by internal power on reset. These bits

can be written with a single write and do not require double writes.

D8 Shutdown Mode

0 – Enabled TS (default)

1 – Shutdown TS

When shutdown, the thermal sensing device and A/D converter are disabled to save power, no events will be generated. When

either of the lock bits is set, this bit cannot be set until unlocked. However it can be cleared at any time.

D10:9 Hysteresis Enable

00 – Disable Hysteresis

01 – Enable Hysteresis at 1.5oC

10 – Enable Hysteresis at 3oC

11 – Enable Hysteresis at 6oC

When enabled, hysteresis is applied to temperature movement around trigger points. For example, consider the behavior of the

“Above Alarm Window” bit (Bit 14 of the Temperature Register) when the hysteresis is set to 3oC. As the temperature rises, But 14

will be set to 1 (temperature is above the alarm window) when the Temperature Register contains a value that is greater than the

value in the Alarm Temperature Upper Boundary Register. If the temperature decreases, Bit 14 will remain set until the measured

temperature is less than or equal to the value in the Alarm Temperature Upper Boundary Register minus 3oC. See Figure X for more

detail.

Similarly, the “Below Alarm Window” bit (Bit 13 of the Temperature Register) will be set to 0 (temperature is equal to or above the

Alarm window lower boundary trip temperature) when the value in the temperature register is equal to or greater than the value

in the Alarm Temperature Lower Boundary Register. As the temperature decreases, Bit 13 will be set to 1 when the value in the

Temperature Register is equal to or less than the value in the Alarm Temperature Lower Boundary Register minus 3oC.

Note that hysteresis is also applied to Event# pin functionality. When either of the lock bits is set, these bits cannot be altered.

Preliminary Technical Data ADT7408

Rev. PrC | Page 11 of 22

Figure 5. Hysteresis

ADT7408 Preliminary Technical Data

Rev. PrC | Page 12 of 22

Temperature Trip Point Registers

There are three Temperature Trip Point Registers, they are the Alarm Temperature Upper Boundary Register, the Alarm Temperature

Lower Boundary Register, and the Critical Temperature Register

Alarm Temperature Upper Boundary Register (read/write)

The value is the upper threshold temperature value for Alarm Mode. The data format is Two’s complement with one LSB = 0.25oC. RFU

(Reserved For Future Use) bits are not supported and will always report zero. Interrupts will respond to the presently programmed

boundary values. If boundary values are being altered in-system, it is advised to turn off interrupts until a known state can be obtained to

avoid superfluous interrupt activity. The format of this Register in shown in Table 13.

Table 13 Alarm Temperature Upper Boundary Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Sign

MSB

LSB

Content 0 0 0

Alarm Window Upper Boundary Temperature

RFU RFU

Alarm Temperature Lower Boundary Register (read/write)

The value is the lower threshold temperature value for Alarm Mode. The data format is Two’’s complement with one LSB = 0.25oC. RFU

bits are not supported and will always report zero. Interrupts will respond to the presently programmed boundary values. If boundary

values are being altered in-system, it is advised to turn off interrupts until a known state can be obtained to avoid superfluous interrupt

activity. The format of this Register in shown in Table 14.

Table 14 Alarm Temperature Lower Boundary Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Sign

MSB

LSB

Content 0 0 0

Alarm Window Upper Boundary Temperature

RFU RFU

Critical Temperature Register (read/write)

The value is the critical temperature. The data format is Two’s complement with one LSB = 0.25oC. RFU bits are not supported and will

always report zero. The format of this Register in shown in Table 15.

Table 15 Critical Temperature Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Sign

MSB

LSB

Content 0 0 0

Critical Temperature Trip Point

RFU RFU

Temperature Value Register (read only)

This 16-bit read only register stores the Trip Status and the temperature measured by the internal temperature sensor as shown in Table

16. The temperature is stored in 13-bit Two’s complement format with the MSB being the temperature sign bit and the 12 LSBs represent

temperature. One LSB = 0.0625oC. The most significant bit will have a resolution of 128oC.

When reading from this register the eight MSBs (Bit D15 to Bit D8) are read first and then the eight LSBs (Bit D7 to Bit D0) are read.

The Trip Status bits represent the internal temperature trip detection, and are not affected by the status of the Event or Configuration bits

e.g. Event Output Control, Clear Event. If neither Above or Below are set (i.e. both are 0) then the current Temperature is exactly within

the alarm window boundaries as defined in the Configuration Register. The format and descriptions are shown in Tables 16 and 17

respectively.

Preliminary Technical Data ADT7408

Rev. PrC | Page 13 of 22

Table 16 Temperature Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Sign

MSB

LSB

Contents Above

Critical

Trip

Above

Alarm

Window

Below

Alarm

Window Temperature

Table 17. Temperature Register Trip Status Description

Bit Definition

D13 Below Alarm Window

0 – Temp is equal to or above the Alarm window lower boundary temperature

1 – Temp is below the Alarm window lower boundary temperature

D14 Above Alarm Window

0 – Temp is equal to or below the Alarm window upper boundary temperature

1 – Temp is above the Alarm window upper boundary temperature

D15 Above Critical Trip

0 – Temp is below the critical temperature setting

1 – Temp is equal to or above the critical temperature setting

Manufacturer ID Register (read only)

This manufacturer ID matches that assigned to a vendor within the PCI SIG. This register may be used to identify the manufacturer of the

device in order to perform manufacturer specific operations. Manufacturer IDs can be found at www.pcisig.com. The format of this

Table 17. Manufacturer ID Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Content 0 0 0 1 0 0 0 1 1 1 0 1 0 1 0 0

Device ID and Revision Register (read only)

This Device ID and Device Revision are assigned by the manufacturer of the device. The Device Revision will start at 0 and be

incremented by one whenever an update to the device is issued by the manufacturer of the device. The format of this Register in shown in

Table 19.

Table 18. Device ID and Device Revision Register

Bits D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Content 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

ADT7408 Preliminary Technical Data

Rev. PrC | Page 14 of 22

Event Pin Functionality

Figure 6 shows the 3 differently-defined outputs of Event#

correspondent to the temperature change. Event# can be

programmed to be one of the three output modes in the

Configuration Register.

If in Interrupt Mode and the temperature reaches the critical

temperature, the device switches to the comparator mode

automatically and asserts the Event# output. When the

temperature drops below the critical temperature, the part

switches back to either Interrupt, or Comparator mode, as

programmed in the Configuration Register. Note that Figure 6

is drawn with no hysteresis, but the values programmed into

points. See Figure 5 and Table 12 for the explanation of

hysteresis functionality.

Event Thresholds

All event thresholds use hysteresis as programmed in register

0x01 bits 10:9 to set when they de-assert.

Alarm Window Trip

The device provides a comparison window with an upper

temperature trip point in the Alarm Upper Boundary Register,

and a lower trip point in the Alarm Lower Boundary Register.

When enabled, the Event# output will be triggered whenever

entering, or exiting (crossing above or below) the Alarm

Window.

Critical Trip

The device can be programmed in such a way that the Event

output is only triggered when the temperature exceeds critical

trip point. The Critical temperature setting is programmed in

Critical Temperature Register. When the temperature sensor

reaches the critical temperature value in this register, the device

is automatically placed in comparator mode meaning that the

Critical Event output cannot be cleared through software setting

the “Clear Event” bit.

Interrupt Mode

After an Event occurs, Software may write a one (‘1’) to the

“Clear Event” bit in the Configuration Register to de-assert the

Event# Interrupt output, until the next trigger condition occurs.

Comparator Mode

Reads/writes on the device registers will not affect the Event#

output in comparator mode. The Event# signal will remain

asserted until the temperature drops outside the range, or the

range is re-programmed such that the current temperature is

outside the range.

Note: Event# cannot be cleared once the DUT temperature is greater than the Critical temperature.

Figure 6. Temperature, Trip, and Events

Preliminary Technical Data ADT7408

Rev. PrC | Page 15 of 22

ADT7408 SERIAL INTERFACE

Control of the ADT7408 is carried out via the SMBus-/I2C-

compatible serial interface. The ADT7408 is connected to this

bus as a slave and is under the control of a master device.

Figure shows a typical SMBus-/I2C- interface connection.

Figure 7. Typical SMBus/I2C Interface Connection

Serial Bus Address

Like all SMBus/-I2C- compatible devices, the ADT7408 has a 7-

bit serial address. The four MSBs of this address for the

ADT7408 are set to 0011. The three LSBs are set by Pin 1, Pin 2,

and Pin 3 (A0, A1 and A2). These pins can be configured either

low or high permanently or dynamically to give eight different

address options. Table 20 shows the different bus address

options available. Recommended pullup resistor value on the

SDA and SCL lines is 2.2kΩ -10 kΩ .

Table 20. SMBus/I2C Bus Address Options

BINARY

A6 A5 A4 A3 A2 A1 A0

HEX

0011 0 0 0

0011 0 0 1

0011 0 1 0

0011 0 1 1

0011 1 0 0

0011 1 0 1

0011 1 1 0

0011 1 1 1

0x24

0x25

0x26

0x27

0x28

0x29

0x30

0x31

The ADT7408 has been designed with a SMBus/I2C timeout.

The SMBus/I2C interface will timeout after 75 ms to 325 ms of

no activity on the SDA line. After this timeout the ADT7408

will reset the SDA line back to its idle state (SDA set to high

impedance) and wait for the next start condition.

The serial bus protocol operates as follows:

1. The master initiates data transfer by establishing a start

condition, defined as a high to low transition on the serial

data line SDA while the serial clock line SCL remains high.

This indicates that an address/data stream will follow. All

slave peripherals connected to the serial bus respond to the

START condition and shift in the next eight bits, consisting

of a 7-bit address (MSB first) plus a R/W bit. The R/W bit

determines whether data will be written to, or read from,

the slave device.

2. The peripheral with the address corresponding to the

transmitted address responds by pulling the data line low

during the low period before the ninth clock pulse, known

as the acknowledge bit. All other devices on the bus now

remain idle while the selected device waits for data to be

read from or written to it. If the R/W bit is a 0 then the

master will write to the slave device. If the R/W bit is a 1

the master will read from the slave device.

3. Data is sent over the serial bus in sequences of 9 clock

pulses, 8 bits of data followed by an acknowledge bit from

the receiver of data. Transitions on the data line must occur

during the low period of the clock signal and remain stable

during the high period, as a low to high transition when

the clock is high may be interpreted as a STOP signal.

4. When all data bytes have been read or written, stop

conditions are established. In WRITE mode, the master

will pull the data line high during the 10th clock pulse to

assert a STOP condition. In READ mode, the master

device will pull the data line high during the low period

before the 9th clock pulse. This is known as no

acknowledge. The master will then take the data line low

during the low period before the 10th clock pulse, then

high during the 10th clock pulse to assert a STOP

condition.

Any number of bytes of data may be transferred over the serial

bus in one operation. However, it is not possible to mix read

and write in one operation because the type of operation is

determined at the beginning and cannot subsequently be

changed without starting a new operation.

The I2C address set up by the three address pins is not latched

by the device until after this address has been sent twice. On the

8th SCL cycle of the second valid communication, the serial bus

address is latched in. This is the SCL cycle directly after the

device has seen its own I2C serial bus address. Any subsequent

changes on this pin will have no affect on the I2C serial bus

address.

Event#

ADT7408

ADT7408 Preliminary Technical Data

Rev. PrC | Page 16 of 22

SMBus/I2C Communications

The data registers in the ADT7408 are selected by the Pointer Register. At power-up the Pointer Register is set to 0x00, the location for

the Capability Register. The Pointer Register latches the last location it was set to. Each data register falls into one of the three types of

user accessibility:

1. Read only

2. Write only

3. Write/Read same address

A Write to the ADT7408 will always include the address byte and the pointer byte. A write to any register, other than the pointer register,

requires two data bytes.

Reading data from the ADT7408 can take place either of two ways:

If the location latched in the Pointer Register is correct, then the read can simply consist of an address byte, followed by retrieving the two

data bytes.

If the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address byte will accomplish a read.

The data byte has the most significant bit first. At the end of a read, the ADT7408 can accept either Acknowledge (Ack) or No

Acknowledge (No Ack) from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte).

It takes the ADT7408 97ms to measure the temperature.

Writing Data to a Register

Except the Pointer Register, all other Registers are 16-bits wide so two bytes of data are written to these register. Writing two bytes of data to these Register consists of

the serial bus address, the Data Register address written to the Pointer Register, followed by the two data bytes written to the selected Data Register. This is illustrated

Figure . If more than the required number of data bytes is written to a register then the register will ignore these extra data bytes. To write

to a different register, another START or repeated START is required.

Preliminary Technical Data ADT7408

Rev. PrC | Page 17 of 22

Figure 8. Writing to the Address Pointer Register Followed by two Bytes of Data

Reading Data From the ADT7408

Reading data from the ADT7408 can take place in either of two ways:

Writing to the Pointer Register for a subsequent read

In order to read data from a particular register, the Pointer Register must contain the address of the data register. If it does not, the correct address must be written to

the address pointer register by performing a single-byte write operation, as shown in

Figure 9. The write operation consists of the serial bus address followed by the pointer byte. No data is written to any of the data registers.

Since the location latched in the Pointer Register is correct, then the read can simply consist of an address byte, followed by retrieving the

two data bytes as shown in Figure 10.

ADT7408 Preliminary Technical Data

Rev. PrC | Page 18 of 22

Figure 9. Writing to the Address Pointer Register to select a Register for a Subsequent Read Operation

Figure 10. Reading back data from the Register with the preset pointer

Reading from any Pointer Register

On the other hand, if the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address byte will

accomplish a read as shown in Figure 11.

Preliminary Technical Data ADT7408

Rev. PrC | Page 19 of 22

Figure 11. Write to the pointer register followed by a repeat start and an immediate data word read

ADT7408 Preliminary Technical Data

Rev. PrC | Page 20 of 22

Application Hints

THERMAL RESPONSE TIME

The time required for a temperature sensor to settle to a

specified accuracy is a function of the thermal mass of the

sensor and the thermal conductivity between the sensor and the

object being sensed. Thermal mass is often considered

equivalent to capacitance. Thermal conductivity is commonly

specified using the symbol Q, and can be thought of as thermal

resistance. It is commonly specified in units of degrees per watt

of power transferred across the thermal joint. Thus, the time

required for the ADT7408 to settle to the desired accuracy is

dependent on the package selected, the thermal contact

established in that particular application, and the equivalent

power of the heat source. In most applications, the settling time

is probably best determined empirically.

SELF-HEATING EFFECTS

The temperature measurement accuracy of the ADT7408 might

be degraded in some applications due to self-heating. Errors can

be introduced from the quiescent dissipation and power

dissipated when converting. The magnitude of these

temperature errors is dependent on the thermal conductivity of

the ADT7408 package, the mounting technique, and the effects

of airflow. At 25°C, static dissipation in the ADT7408 is

typically 778 µW operating at 3.3 V. In the 8-lead LFCSP

package mounted in free air, this accounts for a temperature

increase due to self-heating of

ΔT = PDISS × θJA = 778 µW × ???°C/W = °C

It is recommended that current dissipated through the device be

kept to a minimum, because it has a proportional effect on the

temperature error.

Using the shutdown mode can reduce the current dissipated

through the ADT7408 subsequently reducing the self-heating

effect. When the ADT7408 is in shutdown mode and operating

at 25°C, static dissipation in the ADT7408 is typically 33µW

with VDD = 3.3 V. In the 8-lead LFCSP package mounted in free

air, this accounts for a temperature increase due to self-heating

ΔT = PDISS × θJA = 33 µW × ???°C/W = ???°C

SUPPLY DECOUPLING

The ADT7408 should be decoupled with a 0.1 µF ceramic

capacitor between VDD and GND. This is particularly important

when the ADT7408 is mounted remotely from the power

supply. Precision analog products such as the ADT7408 require

a well-filtered power source. Because the ADT7408 operates

from a single supply, it might seem convenient to simply tap

into the digital logic power supply.

Unfortunately, the logic supply is often a switch-mode design,

which generates noise in the 20 kHz to 1 MHz range. In

addition, fast logic gates can generate glitches hundreds of mV

in amplitude due to wiring resistance and inductance.

If possible, the ADT7408 should be powered directly from the

system power supply. This arrangement, shown in Figure 4,

isolates the analog section from the logic switching transients.

Even if a separate power supply trace is not available, however,

generous supply bypassing reduces supply-line-induced errors.

Local supply bypassing consisting of a 0.1 µF ceramic capacitor

is critical for the temperature accuracy specifications to be

achieved. This decoupling capacitor must be placed as close as

possible to the ADT7408 VDD pin.

Figure 4. Use Separate Traces to Reduce Power Supply Noise

TEMPERATURE MONITORING

The ADT7408 is ideal for monitoring the thermal environment

within electronic equipment. For example, the surface-mounted

package accurately reflects the exact thermal conditions that

affect nearby integrated circuits.

The ADT7408 measures and converts the temperature at the

surface of its own semiconductor chip. When the ADT7408 is

used to measure the temperature of a nearby heat source, the

thermal impedance between the heat source and the ADT7408

must be considered. Often, a thermocouple or other

temperature sensor is used to measure the temperature of the

source, while the temperature is monitored by reading back

from the ADT7408’s temperature value register.

Once the thermal impedance is determined, the temperature of

the heat source can be inferred from the ADT7408 output. As

much as 60% of the heat transferred from the heat source to the

thermal sensor on the ADT7408 die is discharged via the

copper tracks, the package pins and the bond pads. Of the pins

on the ADT7408, the GND pin transfers most of the heat.

Therefore, to measure the temperature of a heat source it is

recommended that the thermal resistance between the

ADT7408 GND pin and the GND of the heat source is reduced

as much as possible.

03340-0-013

0.1µFADT7408

TTL/CMOS

LOGIC

CIRCUITS

POWER

SUPPLY

Preliminary Technical Data ADT7408

Rev. PrC | Page 21 of 22

One example of using the ADT7408’s unique properties is in

monitoring a high power dissipation DIMM module. Ideally the

ADT7408 device should be mounted in the middle between the

two memory chips major heat sources as shown in Figure 13.

The ADT7408 produces a linear temperature output while

needing only two I/O pins and requiring no external

characterization.

Figure 13. Locations of ADT7408 on Dimm module

ADT7408 Preliminary Technical Data

Rev. PrC | Page 22 of 22

Outline Dimensions

Figure 14. 8-Lead Frame Chip Scale Package [LFCSP]

3 x 3 mm Body

(CP-8)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Temperature Accuracy1 Package Description

Package

Option

Ordering

Quantity Branding

ADT7408CCPZ2-r2 –20°C to +125°C ±2°C 8-Lead LFCSP CP-8

250 T1M

ADT7408CCPZ2-reel –20°C to +125°C ±2°C 8-Lead LFCSP CP-8

5,000 T1M

ADT7408CCPZ2-reel7 –20°C to +125°C ±2°C 8-Lead LFCSP CP-8

1,500 T1M

1 Temperature accuracy is over the -20°C to +100°C temperature range.

2 Pb-free part

Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent

Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

PR05716-0-8/05(PrC)