AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Introduction
The AGR09030E is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power transistor suitable for cellular
band, code-division multiple access (CDMA), global
system for mobile communication (GSM), enhanced
data for global evolution (EDGE), and time-division
multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications. This
device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of deliver-
ing a minimum output power of 30 W, it is ideally
suited for today's RF power amplifier applications.
Figure 1. Available Packages
Features
Typical performance ratings are for IS-95 CDMA,
pilot, sync, paging, traffic codes 8—13:
Output power (POUT): 7 W.
Power gain: 21 dB.
Efficiency: 27%.
Adjacent channel power ratio (ACPR) for
30 kHz bandwidth (BW):
(750 kHz offset: –45 dBc)
(1.98 MHz offset: –60 dBc).
Input return loss: 10 dB.
High-reliability, gold-metalization process.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
30 W minimum output power.
Table 1. Thermal Characteristics
Table 2. Absolute Maximum Ratings*
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR09030EU (unflanged) AGR09030EF (flanged)
Parameter Sym Value Unit
Thermal Resistance,
Junction to Case:
AGR09030EU
AGR09030EF
RJC
RJC
1.85
2.2
°C /W
°C /W
Parameter Sym Value Unit
Drain-source Voltage VDSS 65 Vdc
Gate-source Voltage VGS –0.5, +15 Vdc
Drain Current—Continuous ID4.25 Adc
Total Dissipation at TC= 25 °C :
AGR09030EU
AGR09030EF
PD
PD
95
80
W
W
Derate Above 25 °C:
AGR09030EU
AGR09030EF
0.54
0.45
W/°C
W/°C
Operating Junction Tempera-
ture
TJ200 °C
Storage Temperature Range TSTG –65, +150 °C
AGR09030E Minimum (V) Class
HBM 500 1B
MM 50 A
CDM 1500 4
PEAK Devices
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
AGR09030E
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: TC = 30 °C.
Table 4. dc Characteristics
Table 5. RF Characteristics
Parameter Symbol Min Typ Max Unit
Off Characteristics
Drain-source Breakdown Voltage (VGS =0, ID=100 µA) V(BR)DSS65 Vdc
Gate-source Leakage Current (VGS =5V, VDS =0V) IGSS 0.95 µAdc
Zero Gate Voltage Drain Leakage Current (VDS =28 V, VGS =0V) IDSS2.9 µAdc
On Characteristics
Forward Transconductance (VDS =10 V, ID=1.0 A) GFS 2.2 S
Gate Threshold Voltage (VDS =10V, ID = 400 µA) VGS(TH) 5.0 Vdc
Gate Quiescent Voltage (VDS =28V, IDQ = 330 mA) VGS(Q) 3.8 Vdc
Drain-source On-voltage (VGS =10V, ID = 1.0 A) VDS(ON) 0.35 Vdc
Parameter Symbol Min Typ Max Unit
Dynamic Characteristics
Input Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
CISS56 pF
Output Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
COSS15.7 pF
Reverse Transfer Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
CRSS0.73 pF
Functional Tests (in Agere Systems Supplied Test Fixture)
(Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz)
Linear Power Gain
(VDS = 28 V, POUT = 5 W, IDQ = 330 mA)
GL19 21 dB
Output Power
(VDS = 28 V, 1 dB compression, IDQ = 330 mA)
P1dB 30 40 W
Drain Efficiency
(VDS = 28 V, POUT = P1dB, IDQ = 330 mA)
57 %
Third-order Intermodulation Distortion
(100 kHz spacing, VDS = 28 V, POUT = 30 WPEP, IDQ = 330 mA)
IMD –31 dBc
Input Return Loss IRL 10 dB
Ruggedness
(VDS = 28 V, POUT = 30 W, IDQ = 330 mA, f = 880 MHz,
VSWR = 10:1, all angles)
No degradation in output power.
150
50
(in Supplied Test Fixture)
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Test Circuit Illustrations for AGR09030E
A. Schematic
Parts List:
Microstrip line: Z1 0.900 in. x 0.066 in.; Z2 0.294 in. x 0.050 in.; Z3 0.123 in. x 0.066 in.; Z4 0.703 in. x 0.066 in.; Z5 0.267 in. x 0.150 in.;
Z6 0.270 in. x 0.150 in.; Z7 0.050 in. x 0.440 in.; Z8 0.324 in. x 0.440 in.; Z9 0.100 in. x 0.440 in.; Z10 0.155 in. x 0.440 in.;
Z11 1.024 in. x 0.050 in.; Z12 0.123 in. x 0.300 in.; Z13 0.050 in. x 0.300 in.; Z14 0.213 in. x 0.300 in.; Z15 0.393 in. x 0.100 in.;
Z16 0.194 in. x 0.100 in.; Z17 0.523 in. x 0.066 in.; Z18 1.085 in. x 0.066 in.; Z19 2.048 x 0.050.
ATC® chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C27: 8.2 pF, 100A8R2BW; C4, C5, C6, C7: 12 pF, 100B120JW;
C3: 1.0 pF, 100B1R0BW; C9, C16, C20: 10 pF, 100B100JW; C2, C17: 8.2 pF, 100B8R2BW.
Murata® chip capacitor: C12, C23: 0.01 µF GRM40X7R103K100AL.
0603 chip capacitor: C10, C21: 220 pF.
Sprague® tantalum chip capacitor: C14, C25, C26: 22 µF, 35 V.
Kreger® ferrite bead: FB1: 2743D19447.
Kemet® chip capacitor: C13, C24: 0.10 µF C1206C104KRAC7800.
Vitramon® chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA.
1206 size 0.25 W, fixed film, chip resistors: R1: 51 , RM73B2B510J; R2: 47 k, RM73B2B473J; R3: 1 k, RM73B2B102J.
Taconic® ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5.
B. Component Layout
Figure 2. AGR09030E Test Circuit
DUT
C14
R1
C13 C12
C3
FB1
Z12
Z3 C1 Z4 Z5 Z6 Z7
Z8 Z9
C22C21C20C19
Z19
C25C24
+
C23
RF INPUT
VGG
VDD
C11 C10 C9 C8
C2
C4 C6
Z10
C5 C7
Z14
RF OUTPUT
C17
Z15
C16
1
2
3PINS:
1. DRAIN
2. GATE
3. SOURCE
Z11
C26R2
R3
+
Z13
+
Z1
Z2
C27
Z18C18Z17Z16
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
AGR09030E
Typical Performance Characteristics
Figure 3. Series Equivalent Input and Output Impedances
MHz (f) ZS
(Complex Source Impedance)
ZL
(Complex Optimum Load Impedance)
865 (f1) 0.618 + j0.290 3.26 + j2.10
880 (f2) 0.711 + j0.364 3.39 + j2.47
895 (f3) 0.788 + j0.380 3.55 + j2.83
0. 1
0.1
0.1
0.2
0.2
0.2
0.3
0.3
0.4
0.4
0.5
0.5
0.6
0.6
0.7
0.7
0.8
0.8
0.9
0.9
1.01.0
1.2
1.2
1.4
1.4
1.6
1.8
2.0
0.2
0. 2
0.2
0.4
0.4
0.4
0.6
0.6
0.6
0.8
0.8
0.8
1.0
0
1.0
1.0
70
80
90
100
110
120
130
140
150
160
-160
170
-170
180
±
90-90
85
-85
80
75
70
65
60
55
50
45
40
35
0.04
0.05
0.06
0.07
0.08
0.09
0.1
0.11
0.12
0.13
0.14
0.15
0.35
0.36
0.37
0.38
0.39
0.4
0.41
0.42
0.43
0.44
0.45
0.46
0.47
.47
0.48
0.48
0.49
0.49
0.0
0.0
>
W
A
V
E
L
E
N
G
T
H
S
T
O
W
A
R
D
G
E
N
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R
A
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>
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A
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L
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G
T
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S
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A
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A
D
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I
N
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U
C
T
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A
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C
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P
O
N
E
N
T
(
+
j
X
/
Z
o
)
,
O
R
C
A
P
A
C
I
T
I
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E
S
U
S
C
E
P
T
A
N
C
E
(
+
j
B
/
Y
o
)
P
T
A
N
C
E
(
-
j
B
/
Y
o
)
RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)
Z0 = 8
ZL
f1
f3
f1 f3
ZS
DUT
ZSZL
INPUT MATCH OUTPUT MATCH
DRAIN (1)
SOURCE (3)
GATE (2)
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C.
IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8—13. OFFSET 1 = 750 kHz, 30 kHz BW. OFFSET 2 = 1.98 MHz, 30 kHz BW.
Figure 4. ACPR vs. POUT
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 5. Power Gain and Return Loss vs. Frequency
-80
-70
-60
-50
-40
-30
-20
-10
0
0 5 10 15 2
0
P
OUT
(W)X
ACPR (dBc)X
A
CP+
A
CP-
A
CP1+
A
CP1-
FREQUENCY = 880 MHz
10
11
12
13
14
15
16
17
18
19
20
21
22
23
860 865 870 875 880 885 890 895 900
FREQUENCY (MHz)X
POWER GAIN (dB)X
-18.0
-16.0
-14.0
-12.0
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
INPUT RETURN LOSS (dB)X
POWER GAIN P
OUT
= 5 W
P
OUT
= 40 W
RETURN LOSS
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
AGR09030E
Typical Performance Characteristics (continued)
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 6. Power Gain vs. Power Out
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 7. Power Out and Drain Efficiency vs. Input Power
0
2
4
6
8
10
12
14
16
18
20
22
24
10 20 30 40 50 6
0
P
OUT
(W)X
POWER GAIN (P
G
) (dB)X
865 MHz
880 MHz
895 MHz
0
5
10
15
20
25
30
35
40
45
50
55
60
65
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7
P
IN
(W)X
POUT (W)X
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
DRAIN EFFICIENCY (%)X
P
OUT
EFFICIENCY
895 MHz
880 MHz
865 MHz
895 MHz
880 MHz
865 MHz
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Package Dimensions
All dimensions are in inches. Tolerances are ±0.005 in. unless specified.
AGR09030EU
AGR09030EF
PINS:
1. DRAIN
2. GATE
3. SOURCE
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
2
3
2
1
3
PEAK DEVICES
AGR09030EU
XXXX
1 1
2 2
33
PEAK DEVICES
AGR09030EF
XXXX
XXXX - 4 Digit Trace Code