LM48411
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LM48411 Ultra-Low EMI, Filterless, 2.5W, Stereo, Class D
Audio Power Amplifier with E
2
S
Check for Samples: LM48411
1FEATURES DESCRIPTION
The LM48411 is a single supply, high efficiency,
2 E2S System Reduces EMI Preserving Audio 2.5W/channel Class D audio amplifier. The LM48411
Quality and Efficiency features TI's Enhanced Emissions Suppression (E2S)
Output Short Circuit Protection system, that features a unique patent-pending ultra
Stereo Class D Operation low EMI, spread spectrum, PWM architecture, that
significantly reduces RF emissions while preserving
No Output Filter Required for Inductive Loads audio quality and efficiency. The E2S system
Logic Selectable Gain improves battery life, reduces external component
Independent Shutdown Control count, board area consumption, system cost, and
simplifying design.
Minimum External Components
"Click and Pop" Suppression Circuitry The LM48411 is designed to meet the demands of
mobile phones and other portable communication
Micro-Power Shutdown Mode devices. Operating on a single 5V supply, it is
Available in Space-Saving 0.5mm Pitch capable of delivering 2.5W/channel of continuous
DSBGA Package output power to a 4load with less than 10%
THD+N. Its flexible power supply requirements allow
APPLICATIONS operation from 2.4V to 5.5V. The wide band spread
spectrum architecture of the LM48411 reduces EMI-
Mobile Phones radiated emissions due to the modulator frequency.
PDAs The LM48411 features high efficiency compared to a
Portable Electronic Devices conventional Class AB amplifier. The E2S system
includes an advanced, patent-pending edge rate
KEY SPECIFICATIONS control (ERC) architecture that further reduce
emissions by minimizing the high frequency
Efficiency at 3.6V, 500mW into 8Speaker: component of the device output, while maintaining
87% (typ) high quality audio reproduction and high efficiency (η
Efficiency at 3.6V, 100mW into 8Speaker: = 87% at VDD = 3.6V, PO= 500mW). Four gain
80% (typ) options are pin selectable through GAIN0 and GAIN1
Efficiency at 5V, 1W into 8Speaker: pins.
88% (typ) The LM48411 features a low-power consumption
Quiescent Current, 3.6V Supply: 4.2mA (typ) shutdown mode. Shutdown may be enabled by
driving the Shutdown pin to a logic low (GND).
Power Output at VDD = 5V RL= 4, THD 10%:
2.5W (typ) Output short circuit protection prevents the device
Power Output at VDD = 5V RL= 8, THD 10%: from being damaged during fault conditions. Superior
1.5W (typ) click and pop suppression eliminates audible
transients on power up/down and during shutdown.
Total Shutdown Power Supply Current: Independent left/right shutdown control maximizes
0.01µA (typ) power savings in mixed mono/stereo applications.
Single Supply Range: 2.4V to 5.5V
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SDR
SDL
GAIN0
GAIN1
INR-
INL-
INR+
INL+
OUTRA
OUTRB
OUTLA
OUTLB
VDD PVDD
GND PGND
2.4V to 5.5V
H-BRIDGE
GAIN/
MODULATOR
H-BRIDGE
GAIN/
MODULATOR
OSCILLATOR
CS1 CS2
Ci
Ci
Ci
Ci
AUDIO
INPUT
AUDIO
INPUT
30.0 80.0
FREQUENCY (MHz)
10.0
15.0
20.0
25.0
35.0
40.0
45.0
50.0
AMPLITUDE (dBPV/m)
30.0
120.0160.0 200.0 240.0 280.0
FCC Class B Limit
LM48411TL Output Spectrum
LM48411
SNAS399G SEPTEMBER 2007REVISED MAY 2013
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LM48411 RF Emissions
Figure 1. RF Emissions 3in cable
Typical Application
Figure 2. Typical Audio Amplifier Application Circuit
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4
A
1
2
3
DCB
OUTRB
PGND
OUTLA
AGND
OUTRA INR+
INR-
INL-
INL+
G1
G0
PVDD
SDL SDR
AVDD
OUTLB
LM48411
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SNAS399G SEPTEMBER 2007REVISED MAY 2013
Connection Diagram
Figure 3. DSBGA - Top View
See YZR0016 Package
PIN DESCRIPTIONS
Bump Name Function
A1 OUTLB Left Channel output B
A2 SDL Left channel active low shutdown
A3 PGND Power GND
A4 OUTRB Right channel output B
B1 OUTLA Left channel output A
B2 SDR Right channel active low shutdown
B3 AGND Ground
B4 OUTRA Right channel output A
C1 PVDD Power VDD
C2 G1 Gain setting input 1
C3 G0 Gain setting input 0
C4 AVDD Power supply
D1 INL+ Non-inverting left channel input
D2 INL- Inverting left channel input
D3 INR- Inverting right channel input
D4 INR+ Non-inverting right channel input
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)(3)
Supply Voltage(1) 6.0V
Storage Temperature 65°C to +150°C
Voltage at Any Input Pin VDD + 0.3V VGND - 0.3V
Power Dissipation(4) Internally Limited
ESD Rating, all other pins(5) 2.0kV
ESD Rating(6) 200V
Junction Temperature (TJMAX) 150°C
Thermal Resistance θJA (DSBGA) 63.6°C/W
Soldering Information See SNVA009 "microSMD Wafers Level Chip Scale Package."
(1) Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Absolute Maximum
Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended
Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such
conditions. All voltages are measured with respect to the ground pin, unless otherwise specified
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LMxxxxx, see Power Derating curves for additional information.
(5) Human body model, applicable std. JESD22-A114C.
(6) Machine model, applicable std. JESD22-A115-A.
Operating Ratings(1)(2)
Temperature Range TMIN TATMAX 40°C TA85°C
Supply Voltage 2.4V VDD 5.5V
(1) Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Absolute Maximum
Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended
Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such
conditions. All voltages are measured with respect to the ground pin, unless otherwise specified
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
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Electrical Characteristics
The following specifications apply for AV= 6dB, RL= 15μH+8, f = 1kHz, unless otherwise specified. Limits apply for TA=
25°C. VDD = 3.6V. LM48411 Units
Symbol Parameter Conditions (Limits)
Typical(1) Limit(2)(3)
VI= 0V, AV= 2V/V,
|VOS| Differential Output Offset Voltage 5 mV
VDD = 2.4V to 5.0V
VIN = 0V, No Load, VDD = 5.0V 5.1 7.5 mA (max)
VIN = 0V, No Load, VDD = 3.6V 4.2 6.0 mA (max)
VIN = 0V, No Load, VDD = 2.4V 3.0 4.5 mA (max)
IDD Quiescent Power Supply Current VIN = 0V, RL= 8, VDD = 5.0V 5.2 mA
VIN = 0V, RL= 8, VDD = 3.6V 4.2 mA
VIN = 0V, RL= 8, VDD = 2.4V 3.0 mA
ISD Shutdown Current(3) VSDR = VSDL= GND 0.01 1.0 μA (max)
VSDIH Shutdown voltage input high For SDR, SDL 1.4 V (min)
VSDIL Shutdown voltage input low For SDR, SDL 0.4 V (max)
GAIN0, GAIN1 = GND 6 0.5 dB
RL=
GAIN0 = VDD, GAIN1 = GND 12 12±0.5 dB
RL=
AVGain GAIN0 = GND, GAIN1 = VDD 18 18±0.5 dB
RL=
GAIN0, GAIN1 = VDD 24 24±0.5 dB
RL=
AV= 6dB 56 k
AV= 12dB 37.5 k
RIN Input Resistance AV= 18dB 22.5 k
AV= 24dB 12.5 k
TWU Wake Up Time VSDR/SDL = 0.4V 4.2 ms
(1) Typical values represent most likely parametric norms at TA= +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not specified.
(2) Datasheet min/max specification limits are not specified by test or statistical analysis.
(3) Shutdown current is measured in a normal room environment. Exposure to direct sunlight will increase ISD by a maximum of 2µA. The
Shutdown pin should be driven as close as possible to GND for minimal shutdown current and to VDD for the best THD performance in
PLAY mode. See the Application Information section under SHUTDOWN FUNCTION for more information.
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Electrical Characteristics (continued)
The following specifications apply for AV= 6dB, RL= 15μH+8, f = 1kHz, unless otherwise specified. Limits apply for TA=
25°C. VDD = 3.6V. LM48411 Units
Symbol Parameter Conditions (Limits)
Typical(1) Limit(2)(3)
RL= 15μH + 4+ 15μH
THD = 10% (max)
f = 1kHz, 22kHz BW
VDD = 5V 2.5 W
VDD = 3.6V 1.2 W
VDD = 2.5V 530 mW
RL= 15μH + 4+ 15μH
THD = 1% (max)
f = 1kHz, 22kHz BW
VDD = 5V 2 W
VDD = 3.6V 1 W
VDD = 2.5V 430 mW
POOutput Power RL= 15μH + 8+ 15μH
THD = 10% (max)
f = 1kHz, 22kHz BW
VDD = 5V 1.5 W
VDD = 3.6V 760 mW
VDD = 2.5V 330 mW
RL= 15μH + 8+ 15μH
THD = 1% (max)
f = 1kHz, 22kHz BW
VDD = 5V 1.25 W
VDD = 3.6V 615 mW
VDD = 2.5V 270 mW
PO= 500mW, f = 1kHz, RL= 80.05 %
THD+N Total Harmonic Distortion + Noise PO= 300mW, f = 1kHz, RL= 80.03 %
VRipple = 200mVPP Sine,
fRipple = 217Hz, VDD = 3.6, 5V 78 dB
Inputs to AC GND, CI= 2μF
Power Supply Rejection Ratio
PSRR (Input Referred) VRipple = 200mVPP Sine,
fRipple = 1kHz, VDD = 3.6, 5V 77 dB
Inputs to AC GND, CI= 2μF
SNR Signal to Noise Ratio VDD = 5V, PO= 1WRMS 96 dB
Output Noise
εOUT VDD = 3.6V, A Weighted 22 μVRMS
(Input Referred)
Common Mode Rejection Ratio VDD = 3.6V, VRipple = 1VPP Sine
CMRR 64 dB
(Input Referred) fRipple = 217Hz
VDD = 5V, POUT = 1W
ηEfficiency 88 %
RL= 8
Xtalk Crosstalk PO= 500mW, f = kHz 84 dB
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0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
0.001
10
0.01
0.1
1
THD+N (%)
20 20k100 1k 10k
FREQUENCY (Hz)
LM48411
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SNAS399G SEPTEMBER 2007REVISED MAY 2013
Typical Performance Characteristics
The performance graphs were taken using the Audio Precision AUX-0025 Switching Amplifier measurement Filter in series
with the LC filter on the demo board.
THD+N vs Frequency THD+N vs Frequency
VDD = 2.5V, RL= 8, PO= 100mW/channel VDD = 3.6V, RL= 8, PO= 250mW/channel
AV= 6dB AV= 6dB
Figure 4. Figure 5.
THD+N vs Frequency THD+N vs Frequency
VDD = 5.0V, RL= 8, PO= 375mW/channel VDD = 2.5V, RL= 4, PO= 100mW/channel
AV= 6dB AV= 6dB
Figure 6. Figure 7.
THD+N vs Frequency THD+N vs Frequency
VDD = 3.6V, RL= 4, PO= 250mW/channel VDD = 5.0V, RL= 4, PO= 375mW/channel
AV= 6dB AV= 6dB
Figure 8. Figure 9.
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0.001
10
0.01
0.1
THD+N (%)
10m 2
100m 1
OUTPUT POWER (W)
0.001
10
0.01
0.1
THD+N (%)
10m 2
100m 1
OUTPUT POWER (W)
0.001
10
0.01
0.1
THD+N (%)
10m 100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
10m 100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
10m 100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
10m 100m 1
OUTPUT POWER (W)
1
LM48411
SNAS399G SEPTEMBER 2007REVISED MAY 2013
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Typical Performance Characteristics (continued)
The performance graphs were taken using the Audio Precision AUX-0025 Switching Amplifier measurement Filter in series
with the LC filter on the demo board.
THD+N vs Output Power THD+N vs Output Power
VDD = 2.5V, RL= 8, AV= 6dB VDD = 2.5V, RL= 8, AV= 24dB
Figure 10. Figure 11.
THD+N vs Output Power THD+N vs Output Power
VDD = 3.6V, RL= 8, AV= 6dB VDD = 3.6V, RL= 8, AV= 24dB
Figure 12. Figure 13.
THD+N vs Output Power THD+N vs Output Power
VDD = 5V, RL= 8, AV= 6dB VDD = 5V, RL= 8, AV= 24dB
Figure 14. Figure 15.
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0.001
10
0.01
0.1
THD+N (%)
10m 2100m 1
OUTPUT POWER (W)
1
3
0.001
10
0.01
0.1
THD+N (%)
10m 2100m 1
OUTPUT POWER (W)
1
3
0.001
10
0.01
0.1
THD+N (%)
10m 2
100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
10m 2
100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
10m 100m 1
OUTPUT POWER (W)
1
0.001
10
0.01
0.1
THD+N (%)
100m 1
OUTPUT POWER (W)
1
10m
LM48411
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SNAS399G SEPTEMBER 2007REVISED MAY 2013
Typical Performance Characteristics (continued)
The performance graphs were taken using the Audio Precision AUX-0025 Switching Amplifier measurement Filter in series
with the LC filter on the demo board.
THD+N vs Output Power THD+N vs Output Power
VDD = 2.5V, RL= 4, AV= 6dB VDD = 2.5V, RL= 4, AV= 24dB
Figure 16. Figure 17.
THD+N vs Output Power THD+N vs Output Power
VDD = 3.6V, RL= 4, AV= 6dB VDD = 3.6V, RL= 4, AV= 24dB
Figure 18. Figure 19.
THD+N vs Output Power THD+N vs Output Power
VDD = 5.0V, RL= 4, AV= 6dB VDD = 5.0V, RL= 4, AV= 24dB
Figure 20. Figure 21.
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0
500
1000
1500
2000
SUPPLY VOLTAGE (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
OUTPUT POWER (mW)
THD+N=10%
THD+N=1%
0
500
1000
2500
3000
SUPPLY VOLTAGE (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
OUTPUT POWER (mW)
THD+N=10%
THD+N=1%
1500
2000
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
QCURR (mA)
POWER SUPPLY (V)
0
1
2
3
4
5
6
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
FREQUENCY (Hz)
PSRR (dB)
20 100 1k 10k 20k
-100
0
-90
-80
-70
-60
-50
-40
-30
-20
-10
CMRR (dB)
20 20k100 200 1k 2k 10k
FREQUENCY (Hz)
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Typical Performance Characteristics (continued)
The performance graphs were taken using the Audio Precision AUX-0025 Switching Amplifier measurement Filter in series
with the LC filter on the demo board.
PSRR vs Frequency CMRR vs Frequency
VDD = 3.6V, RL= 8VDD = 3.6V, RL= 8
Figure 22. Figure 23.
Quiescent Current vs Power Supply Output Power vs Supply Voltage
RL=RL= 4, f = 1kHz
Figure 24. Figure 25.
Output Power vs Supply Voltage Efficiency vs Output Power
RL= 8, f = 1kHz RL= 4
Figure 26. Figure 27.
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0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
OUTPUT POWER (W)
POWER DISSIPATION (w)
VDD = 5.0V
VDD = 2.5V
VDD = 3.6V
0.00
0.10
0.25
0.30
0.35
0.40
0.45
0.50
0.0 1.0 2.0 3.0 5.0
4.0
OUTPUT POWER (W)
POWER DISSIPATION (W)
0.05
0.20
0.15
VDD = 5.0V
VDD = 3.6V
VDD = 2.5V
-100
0
-90
-80
-70
-60
-50
-40
-30
-20
-10
CROSSTALK (dB)
20 20k100 200 1k 2k 10k
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
0
OUTPUT POWER (W)
EFFCIENCY (%)
0.2 0.4 0.6 0.8 1.0 1.2
VDD = 5.0V
VDD = 3.6V
VDD = 2.5V
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Typical Performance Characteristics (continued)
The performance graphs were taken using the Audio Precision AUX-0025 Switching Amplifier measurement Filter in series
with the LC filter on the demo board.
Efficiency vs Output Power Crosstalk vs Frequency
RL= 8VDD = 3.6V, RL= 8
Figure 28. Figure 29.
Power Dissipation vs Output Power Power Dissipation vs Output Power
RL= 4RL= 8
Figure 30. Figure 31.
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External Components Description
(Figure 2)
Components Functional Description
1. CSSupply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
2. CIInput AC coupling capacitor which blocks the DC voltage at the amplifier's input terminals.
APPLICATION INFORMATION
GENERAL AMPLIFIER FUNCTION
The LM48411 features a filterless modulation scheme. The differential outputs of the device switch at 300kHz
from VDD to GND. When there is no input signal applied, the two outputs (VO1 and VO2) switch with a 50% duty
cycle, with both outputs in phase. Because the outputs of the LM48411 are differential, the two signals cancel
each other. This results in no net voltage across the speaker, thus there is no load current during an idle state,
conserving power.
With an input signal applied, the duty cycle (pulse width) of the LM48411 outputs changes. For increasing output
voltages, the duty cycle of VO1 increases, while the duty cycle of VO2 decreases. For decreasing output voltages,
the converse occurs, the duty cycle of VO2 increases while the duty cycle of VO1 decreases. The difference
between the two pulse widths yields the differential output voltage.
SPREAD SPECTRUM MODULATION
The LM48411 features a fitlerless spread spectrum modulation scheme that eliminates the need for output filters,
ferrite beads or chokes. The switching frequency varies by ±30% about a 300kHz center frequency, reducing the
wideband spectral contend, improving EMI emissions radiated by the speaker and associated cables and traces.
Where a fixed frequency class D exhibits large amounts of spectral energy at multiples of the switching
frequency, the spread spectrum architecture of the LM48411 spreads that energy over a larger bandwidth. The
cycle-to-cycle variation of the switching period does not affect the audio reproduction of efficiency.
ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S)
The LM48411 features TI’s patent-pending E2S system that reduces EMI, while maintaining high quality audio
reproduction and efficiency. The E2S system features a synchronizable oscillator with selectable spread
spectrum, and advanced edge rate control (ERC). The LM48411 ERC greatly reduces the high frequency
components of the output square waves by controlling the output rise and fall times, slowing the transitions to
reduce RF emissions, while maximizing THD+N and efficiency performance.
POWER DISSIPATION AND EFFICIENCY
In general terms, efficiency is considered to be the ratio of useful work output divided by the total energy required
to produce it with the difference being the power dissipated, typically, in the IC. The key here is “useful” work. For
audio systems, the energy delivered in the audible bands is considered useful including the distortion products of
the input signal. Sub-sonic (DC) and super-sonic components (>22kHz) are not useful. The difference between
the power flowing from the power supply and the audio band power being transduced is dissipated in the
LM48411 and in the transducer load. The amount of power dissipation in the LM48411 is very low. This is
because the ON resistance of the switches used to form the output waveforms is typically less than 0.25. This
leaves only the transducer load as a potential "sink" for the small excess of input power over audio band output
power. The LM48411 dissipates only a fraction of the excess power requiring no additional PCB area or copper
plane to act as a heat sink.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supply voltages continue to shrink, designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted voltage swing. The LM48411 is a fully differential
amplifier that features differential input and output stages. A differential amplifier amplifies the difference between
the two input signals. Traditional audio power amplifiers have typically offered only single-ended inputs resulting
in a 6dB reduction in signal to noise ratio relative to differential inputs. The LM48411 also offers the possibility of
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DC input coupling which eliminates the two external AC coupling, DC blocking capacitors. The LM48411 can be
used, however, as a single ended input amplifier while still retaining it's fully differential benefits. In fact,
completely unrelated signals may be placed on the input pins. The LM48411 simply amplifies the difference
between the signals. A major benefit of a differential amplifier is the improved common mode rejection ratio
(CMRR) over single input amplifiers. The common-mode rejection characteristic of the differential amplifier
reduces sensitivity to ground offset related noise injection, especially important in high noise applications.
PCB LAYOUT CONSIDERATIONS
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss on the traces between the LM48411 and the load results is
lower output power and decreased efficiency. Higher trace resistance between the supply and the LM48411 has
the same effect as a poorly regulated supply, increased ripple on the supply line also reducing the peak output
power. The effects of residual trace resistance increases as output current increases due to higher output power,
decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output
power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should
be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. While reducing trace resistance, the
use of power planes also creates parasite capacitors that help to filter the power supply line.
The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can
radiate or conduct to other components in the system and cause interference. It is essential to keep the power
and output traces short and well shielded if possible. Use of ground planes, beads, and micro-strip layout
techniques are all useful in preventing unwanted interference.
As the distance from the LM48411 and the speaker increase, the amount of EMI radiation will increase since the
output wires or traces acting as antenna become more efficient with length. What is acceptable EMI is highly
application specific. Ferrite chip inductors placed close to the LM48411 may be needed to reduce EMI radiation.
The value of the ferrite chip is very application specific.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM48411 contains shutdown circuitry that reduces
current draw to less than 0.01µA. The trigger point for shutdown is shown as a typical value in the Electrical
Characteristics Tables and in the Shutdown Hysteresis Voltage graphs found in the Typical Performance
Characteristics section. It is best to switch between ground and supply for minimum current usage while in the
shutdown state. While the LM48411 may be disabled with shutdown voltages in between ground and supply, the
idle current will be greater than the typical 0.01µA value.
The LM48411 has an internal resistor connected between GND and Shutdown pins. The purpose of this resistor
is to eliminate any unwanted state changes when the Shutdown pin is floating. The LM48411 will enter the
shutdown state when the Shutdown pin is left floating or if not floating, when the shutdown voltage has crossed
the threshold. To minimize the supply current while in the shutdown state, the Shutdown pin should be driven to
GND or left floating. If the Shutdown pin is not driven to GND, the amount of additional resistor current due to the
internal shutdown resistor can be found by Equation 1 below.
(VSD - GND) / 300k(1)
With only a 0.5V difference, an additional 1.7µA of current will be drawn while in the shutdown state.
AUDIO AMPLIFIER POWER SUPPLY BYPASSING FILTERING
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitor as close to the device as possible. Typical applications employ a voltage regulator with 10µF and 0.1µF
bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the
LM48411 supply pins. A 1µF capacitor is recommended.
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM48411
LM48411
SNAS399G SEPTEMBER 2007REVISED MAY 2013
www.ti.com
AUDIO AMPLIFIER INPUT CAPACITOR SELECTION
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM48411. The input capacitors create a high-pass filter with the
input resistance Ri. The -3dB point of the high pass filter is found using Equation 2 below.
f = 1 / 2πRiCi(2)
The values for Ri can be found in the EC table for each gain setting.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM48411 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217 Hz in a
GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
AUDIO AMPLIFIER GAIN SETTING
The LM48411 features four internally configured gain settings. The device gain is selected through the two logic
inputs, G0 and G1. The gain settings are as shown in the following table.
LOGIC INPUT GAIN
G1 G0 V/V dB
0026
0 1 4 12
1 0 8 18
1 1 16 24
Build of Materials
Designator Description Footprint Quantity
C1, C2 Ceramic Capacitor 0.1μF, 50V, 10% 805 2
C3 C6 Tantalum Capacitors 1μF 20V, 10%, Size A 1206 4
C11 Tantalum Capacitors 10μF 20V, 10% Size B 1411 1
JP1–5, JP8–11 Jumper Header Vertical Mount 2X1 0.100 9
JP6, JP7 Jumper Header Vertical Mount 3x1 0.100 2
14 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM48411
GAIN1
GAIN0
1
2
1
2
OUTRA
OUTRB
OUTLA
OUTLB
VDD PVDD
GND PGND
INR+
INR-
INL-
SDR
SDL
SDR
GAIN0
GAIN1
SDL
C1
1 PFC2
1 PFC11
10 PF
VDD
C3
1 PF
C5
1 PF
C6
1 PF
GAIN0
VDD
1
2
3
VDD
1
2
3
SDR
GAIN1
JP6
JP7
1
2SDL
JP5
JP9
JP8
1
2VDD
JP1
1
2
JP4
+
+
+
C4
1 PF
+
INL+
+
VDD
VDD
1
2
JP2
INR+
INR-
INL+
1
2
JP3
INL-
LM48411
www.ti.com
SNAS399G SEPTEMBER 2007REVISED MAY 2013
Demonstration Board Schematic
Demonstration Board Layout
Figure 32. Top Silkscreen Layer
Figure 33. Top Layer
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM48411
LM48411
SNAS399G SEPTEMBER 2007REVISED MAY 2013
www.ti.com
Figure 34. Mid 1 Layer
Figure 35. Mid 2 Layer
Figure 36. Bottom Layer
16 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM48411
LM48411
www.ti.com
SNAS399G SEPTEMBER 2007REVISED MAY 2013
REVISION HISTORY
Rev Date Description
1.0 09/21/07 Initial release.
1.1 10/01/07 Fixed few typos.
1.2 11/30/07 Added the demo boards and BOM.
1.3 12/19/07 Edited the 16–bump DSBGA package diagram and the Pin Description table.
1.4 01/08/08 Edited the 16–bump DSBGA package diagram.
1.5 06/27/08 Text edits.
1.6 07/03/08 Text edits (under SHUTDOWN FUNCTION).
Changes from Revision F (May 2013) to Revision G Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM48411
PACKAGE OPTION ADDENDUM
www.ti.com 2-May-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
LM48411TL/NOPB ACTIVE DSBGA YZR 16 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 GJ2
LM48411TLX/NOPB ACTIVE DSBGA YZR 16 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 GJ2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM48411TL/NOPB DSBGA YZR 16 250 178.0 8.4 2.18 2.18 0.76 4.0 8.0 Q1
LM48411TLX/NOPB DSBGA YZR 16 3000 178.0 8.4 2.18 2.18 0.76 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM48411TL/NOPB DSBGA YZR 16 250 210.0 185.0 35.0
LM48411TLX/NOPB DSBGA YZR 16 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2013
Pack Materials-Page 2
MECHANICAL DATA
YZR0016xxx
www.ti.com
TLA16XXX (Rev C)
0.600±0.075 D
E
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
4215051/A 12/12
D: Max =
E: Max =
2.063 mm, Min =
2.014 mm, Min =
2.003 mm
1.953 mm
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