C0603C224J9RAC78 - KEMET ELECTRONICS

One world. One KEMET

Benets

• -55°C to +125°C operating temperature range

• Lead (Pb)-Free, RoHS, and REACH Compliant

• Temperature stable dielectric

• EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,

and 2225 case sizes

• DC voltage ratings of 6.3 V, 10 V, 16 V, 25 V, 35 V, 50 V, 100 V,

200 V, and 250 V

• Capacitanceofferingsrangingfrom10pFto47μF

• Available capacitance tolerances of ±5%, ±10%, and ±20%

• Non-polar device, minimizing installation concerns

• 100%puremattetin-platedterminationnishallowingfor

excellent solderability

• SnPbterminationnishoptionavailableuponrequest

(5% minimum)

Applications

Typicalapplicationsincludedecoupling,bypass,lteringand

transient voltage suppression.

Overview

KEMET’s X7R dielectric features a 125°C maximum operating

temperatureandisconsidered“temperaturestable.”The

Electronics Components, Assemblies & Materials Association

(EIA)characterizesX7RdielectricasaClassIImaterial.

Componentsofthisclassicationarexed,ceramicdielectric

capacitors suited for bypass and decoupling applications or

forfrequencydiscriminatingcircuitswhereQandstabilityof

capacitancecharacteristicsarenotcritical.X7Rexhibitsa

predictablechangeincapacitancewithrespecttotimeand

voltageandboastsaminimalchangeincapacitancewith

referencetoambienttemperature.Capacitancechangeislimited

to ±15% from -55°C to +125°C.

SurfaceMountMultilayerCeramicChipCapacitors(SMDMLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Ordering Information

C1206 C106 M 4 R A CTU

Ceramic Case Size

(L" x W")

Specication/

Series1

Capacitance

Code (pF)

Capacitance

Tolerance Voltage Dielectric Failure Rate/

Design TerminationFinish2Packaging/Grade

(C-Spec)3

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

C = Standard 2signicant

digits + number

of zeros

J = ±5%

K = ±10%

M = ±20%

9 = 6.3 V

8 = 10 V

4 = 16 V

3 = 25 V

6 = 35 V

5 = 50 V

1 = 100 V

2 = 200 V

A = 250 V

R = X7R A = N/A C = 100% Matte Sn Blank = Bulk

TU = 7" Reel

Unmarked

TM = 7" Reel

Marked

1 Flexible termination option is available. Please see FT-CAP product bulletin C1013_X7R_FT-CAP_SMD.

2 Additional termination nish options may be available. Contact KEMET for details.

3 Additional reeling or packaging options may be available. Contact KEMET for details.

3 The terms "Marked" and "Unmarked" pertain to laser marking option of components.

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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Dimensions – Millimeters (Inches)

EIA Size

Code

Metric

Size

Code

Length

Width

Thickness

Bandwidth

Separation

Minimum

Mounting

Technique

0402 1005 1.00 (0.040) ±0.05 (0.002) 0.50 (0.020) ±0.05 (0.002)

See Table 2

forThickness

0.30 (0.012) ±0.10 (0.004) 0.30 (0.012)

SolderReow

Only

0603 1608 1.60 (0.063) ±0.15 (0.006) 0.80 (0.032) ±0.15 (0.006) 0.35 (0.014) ±0.15 (0.006) 0.70 (0.028)

Solder Wave or

SolderReow

0805 2012 2.00 (0.079) ±0.20 (0.008) 1.25 (0.049) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010) 0.75 (0.030)

1206 3216 3.20 (0.126) ±0.20 (0.008) 1.60 (0.063) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010)

N/A

121013225 3.20 (0.126) ±0.20 (0.008) 2.50 (0.098) ±0.20 (0.008) 0.50 (0.02) ±0.25 (0.010)

SolderReow

Only

1808 4520 4.70 (0.185) ±0.50 (0.020) 2.00 (0.079) ±0.20 (0.008) 0.60 (0.024) ±0.35 (0.014)

1812 4532 4.50 (0.177) ±0.30 (0.012) 3.20 (0.126) ±0.30 (0.012) 0.60 (0.024) ±0.35 (0.014)

1825 4564 4.50 (0.177) ±0.30 (0.012) 6.40 (0.252) ±0.40 (0.016) 0.60 (0.024) ±0.35 (0.014)

2220 5650 5.70 (0.224) ±0.40 (0.016) 5.00 (0.197) ±0.40 (0.016) 0.60 (0.024) ±0.35 (0.014)

2225 5664 5.60 (0.220) ±0.40 (0.016) 6.40 (0.248) ±0.40 (0.016) 0.60 (0.024) ±0.35 (0.014)

1 For capacitance values ≥ 4.7 µF add 0.02 (0.001) to the width tolerance dimension and 0.10 (0.004) to the length tolerance dimension.

Qualication/Certication

CommercialGradeproductsaresubjecttointernalqualication.Detailsregardingtestmethodsandconditionsarereferencedin

Table 4, Performance & Reliability.

Environmental Compliance

Lead(Pb)-Free,RoHS,andREACHcompliantwithoutexemptions(excludingSnPbterminationnishoption).

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Electrical Parameters/Characteristics

Item Parameters/Characteristics

Operating Temperature Range -55°C to +125°C

CapacitanceChangewithReferenceto+25°Cand0VDCApplied(TCC) ±15%

Aging Rate (Maximum % Capacitance Loss/Decade Hour) 3.0%

DielectricWithstandingVoltage(DWV)

250% of rated voltage

(5±1secondandcharge/dischargenotexceeding50mA)

Dissipation Factor (DF) Maximum Limit @ 25ºC See Dissipation Factor (DF) Limits Table

Insulation Resistance (IR) Limit @ 25°C

See Insulation Resistance Limit Table

(Rated voltage applied for 120 ±5 seconds @ 25°C)

Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specic

datasheet for referee time details.

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF

120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as

Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Insulation Resistance Limit Table (X7R Dielectric)

EIA Case Size

1,000 Megohm

Microfarads or 100 GΩ

500 Megohm

Microfarads or 10 GΩ

0201 N/A ALL

0402 < 0.012 µF ≥0.012µF

0603 < 0.047 µF ≥0.047µF

0805 < 0.15 µF ≥0.15µF

1206 < 0.47 µF ≥0.47µF

1210 < 0.39 µF ≥0.39µF

1808 ALL N/A

1812 < 2.2 µF ≥2.2µF

1825 ALL N/A

2220 < 10 µF ≥10µF

2225 ALL N/A

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Dissipation Factor (DF) Limits Table

EIA Case

Size

Rated DC

Voltage Capacitance

Dissipation

Factor

(Maximum %)

0402

< 16

All

5.0

16 / 25 3.5

> 25 2.5

0603

< 16

< 1.0 µF

5.0

16 / 25 3.5

> 25 2.5

< 16

≥1.0µF 10.0

16 / 25

0805

< 16

< 2.2 µF

5.0

16 / 25 3.5

> 25 < 1.0 µF 2.5

< 16

≥2.2µF

10.016 / 25

> 25 ≥1.0µF

1206

< 16

< 10 µF

5.0

16 / 25 3.5

> 25 2.5

35 / 50 ≥2.2µF 10.0

< 16

≥10µF 10.0

16 / 25

1210

< 16

< 22 µF

5.0

16 / 25 3.5

> 25 2.5

< 16

≥22µF 10.0

16 / 25

1808-2225

< 16

All

5.0

16 / 25 3.5

> 25 2.5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Dielectric Case Size Rated DC

Voltage

Capacitance

Value

Dissipation

Factor

(Maximum %)

Capacitance

Shift

Insulation

Resistance

X7R

0402

< 16

All

7.5

± 20% 10% of Initial

Limit

16 / 25 5.0

> 25 3.0

0603

< 16

< 1.0 µF

7.5

16 / 25 5.0

> 25 3.0

< 16

≥1.0µF 20.0

16 / 25

0805

< 16

< 2.2 µF

7.5

16 / 25 5.0

> 25 < 1.0 µF 3.0

< 16

≥2.2µF

20.016 / 25

> 25 ≥1.0µF

1206

< 16

< 10 µF

7.5

16 / 25 5.0

> 25 3.0

35 / 50 ≥2.2µF

20.0< 16

≥10µF

16 / 25

1210

< 16

< 22 µF

7.5

16 / 25 5.0

> 25 3.0

< 16

≥22µF 20.0

16 / 25

1808-2225

< 16

All

7.5

16 / 25 5.0

> 25 3.5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68 and 82)

xx1 Available only in K, M tolerance.

xx2 Available only in M tolerance.

Cap Cap

Code

Case Size/

Series C0402C C0603C C0805C C1206C

Voltage Code 9843 5 984351298436512A 9 8436512A

Rated Voltage

(VDC)

6.3

100

200

6.3

100

200

250

6.3

100

200

250

Cap Tolerance Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

10 – 20 pF* 100 – 200* J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB

22 pF 220 J K M BB BB BB BB BB CF CF CF CF CF CF CF DM DM DM DM DM DM DN DN EB EB EB EB EB EB EB EB

24 – 91 pF 240 – 910* J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB

100 – 150 pF** 101 – 151** J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB

180 – 820 pF** 181 – 821** J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB

1000 pF 102 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

1200 pF 122 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

1500 pF 152 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

1800 pF 182 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

2200 pF 222 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

2700 pF 272 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

3300 pF 332 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

3900 pF 392 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

4700 pF 472 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

5600 pF 562 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

6800 pF 682 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

8200 pF 822 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

10000 pF 103 J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

12000 pF 123 J K M BB BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

15000 pF 153 J K M BB BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

18000 pF 183 J K M BB BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

22000 pF 223 J K M BB BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

27000 pF 273 J K M BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DP DE EB EB EB EB EB EB EB EB EB

33000 pF 333 J K M BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DP DE EB EB EB EB EB EB EB EB EB

39000 pF 393 J K M BB BB BB BB CF CF CF CF CF CF DN DN DN DN DN DN DP DE EB EB EB EB EB EB EC EB EB

47000 pF 473 J K M BB BB BB BB CF CF CF CF CJ CF DO DO DO DO DO DO DE DG EB EB EB EB EB EB EC ED ED

56000 pF 563 J K M BB BB BB CF CF CF CF CF DP DP DP DP DP DP DE DG EB EB EB EB EB EB EB ED ED

68000 pF 683 J K M BB BB BB CF CF CF CF CF DP DP DP DP DP DP DE EB EB EB EB EB EB EB ED ED

82000 pF 823 J K M BB BB BB CF CF CF CF CF DP DP DP DP DP DP DE EB EB EB EB EB EB EB ED ED

0.1 µF 104 J K M BB BB BB CF CF CF CF CF DN DN DN DN DN DN DE EB EB EB EB EB EB EB EM EM

0.12 µF 124 J K M CF CF CF CF CF DN DN DN DN DP DP DG EC EC EC EC EC EC EC EG

0.15 µF 154 J K M CF CF CF CF CF DN DN DN DN DP DP DG EC EC EC EC EC EC EC EG

0.18 µF 184 J K M CF CF CF CF DN DN DN DN DG DG DG EC EC EC EC EC EC EC

0.22 µF 224 J K M CF CF CF CF DN DN DN DN DG DG DG EC EC EC EC EC EC EC

0.27 µF 274 J K M CF CF CF DP DP DP DP DP DP EB EB EB EB EC EC EM

0.33 µF 334 J K M CF CF CF DG DG DG DG DP DP EB EB EB EB EC EC EG

0.39 µF 394 J K M CF CF CF DG DG DG DG DE DE EB EB EB EB EC EC EG

0.47 µF 474 J K M CF CF CF DG DG DG DG DE DE EC EC EC EC EC EC EG

0.56 µF 564 J K M DP DP DP DG DH DH ED ED ED ED EC EC

0.68 µF 684 J K M DP DP DP DG DH DH EE EE EE EE ED ED

0.82 µF 824 J K M DP DP DP DG EF EF EF EF ED ED

1 µF 105 J K M CG¹ CG¹ CG¹ CD¹ DP DP DP DG DG¹ DG¹ EP EP EP EP ED ED EH¹

1.2 µF 125 J K M DE DE DE ED ED ED EG EH EH

1.5 µF 155 J K M DG DG DG ED ED ED EG EH EH

1.8 µF 185 J K M DG DG DG ED ED ED EF EH EH

2.2 µF 225 J K M CG¹ CG¹ DG DG DG DG¹ EH EH EH¹ EH¹ EH EH

2.7 µF 275 J K M EN EN EN EH

3.3 µF 335 J K M ED ED ED EH

3.9 µF 395 J K M EF EF EF EH

4.7 µF 475 J K M DG¹ DG¹ DG¹ EH EH EH EH¹ EH¹ EH¹

Cap Cap

Code

Rated Voltage

(VDC)

6.3

100

200

6.3

100

200

250

6.3

100

200

250

Voltage Code 9843 5 984351298436512A 9 8436512A

Case Size/

Series

C0402C C0603C C0805C C1206C

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Cap Cap

Code

Case Size/

Series C0402C C0603C C0805C C1206C

Voltage Code 9843 5 984351298436512A 9 8436512A

Rated Voltage

(VDC)

6.3

100

200

6.3

100

200

250

6.3

100

200

250

Cap Tolerance Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

5.6 µF 565 J K M EH EH EH

6.8 µF 685 J K M EH EH EH

8.2 µF 825 J K M EH EH EH

10 µF 106 J K M DG¹ DG¹ EH EH EH EH¹

22 µF 226 J K M EH² EH²

Cap Cap

Code

Rated Voltage

(VDC)

6.3

100

200

6.3

100

200

250

6.3

100

200

250

Voltage Code 9843 5 984351298436512A 9 8436512A

Case Size/

Series

C0402C C0603C C0805C C1206C

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes) cont'd

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes)

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68 and 82)

xx1 Available only in K, M tolerance.

xx2 Available only in M tolerance.

Cap Cap

Code

Case Size/

Series C1210C C1808C C1812C C1825C C2220C C2225C

Voltage Code 9843512A512 3 5 12A512A3 5 12A512A

Rated Voltage

(VDC)

6.3

100

200

250

100

200

100

200

250

100

200

250

100

200

250

100

200

250

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

10 – 91 pF* 100 – 910* J K M FB FB FB FB FB FB FB

100 – 270 pF** 101 – 271** J K M FB FB FB FB FB FB FB

330 pF 331 J K M FB FB FB FB FB FB FB LF LF LF

390 pF 391 J K M FB FB FB FB FB FB FB LF LF LF

470 – 1,200 pF** 471 – 122** J K M FB FB FB FB FB FB FB LF LF LF GB GB GB GB

1,500 pF 152 J K M FB FB FB FB FB FB FE LF LF LF GB GB GB GB

1,800 pF 182 J K M FB FB FB FB FB FB FE LF LF LF GB GB GB GB

2,200 pF 222 J K M FB FB FB FB FB FB FB FB LF LF LF GB GB GB GB

2,700 pF 272 J K M FB FB FB FB FB FB FB FB LF LF LF GB GB GB GB

3,300 pF 332 J K M FB FB FB FB FB FB FB FB LF LF GB GB GB GB

3,900 pF 392 J K M FB FB FB FB FB FB FB FB LF LF GB GB GB GB HB HB HB

4,700 pF 472 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GD HB HB HB KE KE KE

5,600 pF 562 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GH HB HB HB KE KE KE

6,800 pF 682 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HB JE JE JE KE KE KE

8,200 pF 822 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HB JE JE JE KE KE KE

10,000 pF 103 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HE JE JE JE KE KE KE

12,000 pF 123 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HE JE JE JE KE KE KE

15,000 pF 153 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB JE JE JE KE KE KE

18,000 pF 183 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HE JE JE JE KE KE

22,000 pF 223 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JE JE JE KE KE

27,000 pF 273 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JE JE JE KE KE

33,000 pF 333 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JB JB JB KE

39,000 pF 393 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JB JB JB

Cap Cap

Code

Rated Voltage

(VDC)

6.3

100

200

250

100

200

100

200

250

100

200

250

100

200

250

100

200

250

Voltage Code 9843512A512 3 5 12A512A3 5 12A512A

Case Size/

Series

C1210C C1808C C1812C C1825C C2220C C2225C

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) cont'd

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68 and 82)

xx1 Available only in K, M tolerance.

xx2 Available only in M tolerance.

Cap Cap

Code

Case Size/

Series C1210C C1808C C1812C C1825C C2220C C2225C

Voltage Code 9843512A512 3 5 12A512A3 5 12A512A

Rated Voltage

(VDC)

6.3

100

200

250

100

200

100

200

250

100

200

250

100

200

250

100

200

250

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

47,000 pF 473 J K M FB FB FB FB FB FB FC FC LD LD GB GB GB GB GB HB HB HB HB JB JB JB

56,000 pF 563 J K M FB FB FB FB FB FB FC FC LD LD GB GB GB GB GB HB HB HB HB JB JB JB

68,000 pF 683 J K M FB FB FB FB FB FB FC FC LD GB GB GB GB GB HB HB HB HB JB JB JB

82,000 pF 823 J K M FB FB FB FB FB FC FF FF LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC

0.10 µF 104 J K M FB FB FB FB FB FD FG FG LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC

0.12 µF 124 J K M FB FB FB FB FB FD LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC

0.15 µF 154 J K M FC FC FC FC FC FD LD GB GB GB GE GE HB HB HB HB JC JC JC JC JC KC KC KC KC

0.18 µF 184 J K M FC FC FC FC FC FD LD GB GB GB GG GG HB HB HB HB JC JC JC JC JC KC KC KC KC

0.22 µF 224 J K M FC FC FC FC FC FD FK FK GB GB GB GG GG HB HB HB HB JC JC JC JC JC KC KC KC KC

0.27 µF 274 J K M FC FC FC FC FC FD GB GB GG GG GG HB HB HB HB JC JC JC JC JC KB KC KC KC

0.33 µF 334 J K M FD FD FD FD FD FD GB GB GG GG GG HB HB HB HB JC JC JC JC JC KB KC KC KC

0.39 µF 394 J K M FD FD FD FD FD FD GB GB GG GG GG HB HB HD HD JC JC JC JC JC KB KC KC KC

0.47 µF 474 J K M FD FD FD FD FD FD GB GB GG GJ GJ HB HB HD HD JC JC JC JC JC KB KC KD KD

0.56 µF 564 J K M FD FD FD FD FD FF GC GC GG HB HD HD HD JC JC JC JD JD KB KC KD KD

0.68 µF 684 J K M FD FD FD FD FD FG GC GC GG HB HD HD HD JC JC JD JD JD KB KC KD KD

0.82 µF 824 J K M FF FF FF FF FF FL GE GE GG HB HF HF HF JC JC JF JF JF KB KC KE KE

1.0 µF 105 J K M FH FH FH FH FH FM GE GE GG HB HF HF HF JC JC JF JF JF KB KD KE KE

1.2 µF 125 J K M FH FH FH FH FG HB JC JC KB KE KE KE

1.5 µF 155 J K M FH FH FH FH FG HC JC JC KC

1.8 µF 185 J K M FH FH FH FH FG HD JD JD KD

2.2 µF 225 J K M FJ FJ FJ FJ FG FT¹ GO GO GO¹ HF JF JF KD

2.7 µF 275 J K M FE FE FE FG FH

3.3 µF 335 J K M FF FF FF FM FM

3.9 µF 395 J K M FG FG FG FG FK

4.7 µF 475 J K M FC FC FC FG FS GK GK JF JF

5.6 µF 565 J K M FF FF FF FH

6.8 µF 685 J K M FG FG FG FM

8.2 µF 825 J K M FH FH FH FK

10 µF 106 J K M FY FY FY FS FS¹ GK JF JO

12 µF 126 J K M

15 µF 156 J K M FM FM JO JO

18 µF 186 J K M

22 µF 226 J K M FS FS FS¹ FS² JO

47 µF 476 J K M FS²

Cap Cap

Code

Rated Voltage

(VDC)

6.3

100

200

250

100

200

100

200

250

100

200

250

100

200

250

100

200

250

Voltage Code 9843512A512 3 5 12A512A3 5 12A512A

Case Size/

Series

C1210C C1808C C1812C C1825C C2220C C2225C

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 2 – Chip Thickness/Packaging Quantities

Package quantity based on nished chip thickness specications.

Thickness

Code

Case

Size

Thickness ±

Range (mm)

Paper Quantity Plastic Quantity

7" Reel 13" Reel 7" Reel 13" Reel

0402

0.50 ± 0.05

10,000

50,000

0603

0.80 ± 0.07*

4,000

15,000

0603

0.80 ± 0.10*

4,000

15,000

0603

0.80 ± 0.15

4,000

10,000

0603

0.80 ± 0.15*

4,000

15,000

0805

0.70 ± 0.20*

4,000

15,000

0805

0.78 ± 0.10*

4,000

15,000

0805

0.80 ± 0.10*

4,000

15,000

0805

0.90 ± 0.10*

4,000

15,000

0805

1.00 ± 0.10

2,500

10,000

0805

1.25 ± 0.15

2,500

10,000

0805

1.25 ± 0.20

2,500

10,000

1206

0.78 ± 0.10

4,000

10,000

4,000

10,000

1206

0.90 ± 0.10

4,000

10,000

1206

0.95 ± 0.10

4,000

10,000

1206

1.00 ± 0.10

2,500

10,000

1206

1.10 ± 0.10

2,500

10,000

1206

1.20 ± 0.15

2,500

10,000

1206

1.20 ± 0.20

2,500

10,000

1206

1.25 ± 0.15

2,500

10,000

1206

1.60 ± 0.15

2,000

8,000

1206

1.60 ± 0.20

2,000

8,000

1210

0.78 ± 0.10

4,000

10,000

1210

0.90 ± 0.10

4,000

10,000

1210

0.95 ± 0.10

4,000

10,000

1210

1.00 ± 0.10

2,500

10,000

1210

1.10 ± 0.10

2,500

10,000

1210

1.25 ± 0.15

2,500

10,000

1210

1.40 ± 0.15

2,000

8,000

1210

1.55 ± 0.15

2,000

8,000

1210

1.70 ± 0.20

2,000

8,000

1210

1.85 ± 0.20

2,000

8,000

1210

1.90 ± 0.20

1,500

4,000

1210

2.00 ± 0.20

2,000

8,000

1210

2.10 ± 0.20

2,000

8,000

1210

2.50 ± 0.30

1,000

4,000

1706

0.90 ± 0.10

4,000

10,000

1706

1.00 ± 0.15

4,000

10,000

1808

0.90 ± 0.10

2,500

10,000

1808

1.00 ± 0.15

2,500

10,000

1812

1.00 ± 0.10

1,000

4,000

1812

1.10 ± 0.10

1,000

4,000

1812

1.25 ± 0.15

1,000

4,000

1812

1.30 ± 0.10

1,000

4,000

1812

1.40 ± 0.15

1,000

4,000

1812

1.55 ± 0.10

1,000

4,000

1812

1.60 ± 0.20

1,000

4,000

1812

1.70 ± 0.15

1,000

4,000

1812

2.50 ± 0.20

500

2,000

1825

1.10 ± 0.15

1,000

4,000

1825

1.15 ± 0.15

1,000

4,000

1825

1.30 ± 0.15

1,000

4,000

1825

1.40 ± 0.15

1,000

4,000

Thickness

Code

Case

Size

Thickness ±

Range (mm)

7" Reel 13" Reel 7" Reel 13" Reel

Paper Quantity Plastic Quantity

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 2 – Chip Thickness/Packaging Quantities cont'd

Package quantity based on nished chip thickness specications.

Thickness

Code

Case

Size

Thickness ±

Range (mm)

Paper Quantity Plastic Quantity

7" Reel 13" Reel 7" Reel 13" Reel

1825

1.50 ± 0.15

1,000

4,000

2220

1.00 ± 0.15

1,000

4,000

2220

1.10 ± 0.15

1,000

4,000

2220

1.30 ± 0.15

1,000

4,000

2220

1.40 ± 0.15

1,000

4,000

2220

1.50 ± 0.15

1,000

4,000

2220

2.40 ± 0.15

500

2,000

2225

1.00 ± 0.15

1,000

4,000

2225

1.10 ± 0.15

1,000

4,000

2225

1.30 ± 0.15

1,000

4,000

2225

1.40 ± 0.15

1,000

4,000

Thickness

Code

Case

Size

Thickness ±

Range (mm)

7" Reel 13" Reel 7" Reel 13" Reel

Paper Quantity Plastic Quantity

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351

EIA

Size

Code

Metric

Size

Code

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80

0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20

0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70

1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00

1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90

121013225 1.50 1.60 2.90 5.60 3.90 1.40 1.40 2.80 4.70 3.30 1.30 1.20 2.70 4.00 3.00

1808 4520 2.30 1.75 2.30 7.40 3.30 2.20 1.55 2.20 6.50 2.70 2.10 1.35 2.10 5.80 2.40

1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70

1825 4564 2.15 1.60 6.90 6.90 7.90 2.05 1.40 6.80 6.00 7.30 1.95 1.20 6.70 5.30 7.00

2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60

2225 5664 2.70 1.70 6.90 8.10 7.90 2.60 1.50 6.80 7.20 7.3 0 2.50 1.30 6.70 6.50 7.0 0

1 Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow solder

processes. KEMET only recommends wave soldering of EIA 0603, 0805, and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualication

testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

C C

X X

Grid Placement Courtyard

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Soldering Process

Recommended Soldering Technique:

 •SolderwaveorsolderreowforEIAcasesizes0603,0805and1206

 •AllotherEIAcasesizesarelimitedtosolderreowonly

Recommended Reow Soldering Prole:

KEMET’sfamiliesofsurfacemountmultilayerceramiccapacitors(SMDMLCCs)arecompatiblewithwave(singleordual),convection,

IRorvaporphasereowtechniques.Preheatingofthesecomponentsisrecommendedtoavoidextremethermalstress.KEMET’s

recommendedproleconditionsforconvectionandIRreowreecttheproleconditionsoftheIPC/J-STD-020standardformoisture

sensitivitytesting.Thesedevicescansafelywithstandamaximumofthreereowpassesattheseconditions.

Prole Feature Termination Finish

SnPb 100% Matte Sn

Preheat/Soak

Temperature Minimum (TSmin)

100°C

150°C

Temperature Maximum (T

Smax

)150°C 200°C

Time (tS) from TSmin to TSmax

60 – 120 seconds

Ramp-Up Rate (TL to TP)3°C/second maximum 3°C/second maximum

LiquidousTemperature(TL)183°C 217°C

TimeAboveLiquidous(tL) 60 – 150 seconds 60 – 150 seconds

Peak Temperature (TP)235°C 260°C

TimeWithin5°CofMaximum

Peak Temperature (tP)20 seconds maximum 30 seconds maximum

Ramp-Down Rate (TP to TL)6°C/second maximum 6°C/second maximum

Time 25°C to Peak

Temperature 6 minutes maximum 8 minutes maximum

Note 1: All temperatures refer to the center of the package, measured on the

capacitor body surface that is facing up during assembly reow.

Time

Temperature

Tsmin

25°C to Peak

Tsmax

TPMaximum Ramp Up Rate = 3°C/sec

Maximum Ramp Down Rate = 6°C/sec

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Stress

Reference

Test or Inspection Method

TerminalStrength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds.

Board Flex JIS–C–6429

Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G.

Flexible termination system – 3.0 mm (minimum).

Solderability J–STD–002

Magnication50X.Conditions:

a)MethodB,4hours@155°C,dryheat@235°C

b)MethodB@215°Ccategory3

c)MethodD,category3@260°C

Temperature Cycling JESD22MethodJA–104 1,000Cycles(-55°Cto+125°C).Measurementat24hours+/-2hoursaftertestconclusion.

Biased Humidity MIL–STD–202Method103

LoadHumidity:1,000hours85°C/85%RHandratedvoltage.Add100Kohmresistor.

Measurementat24hours+/-2hoursaftertestconclusion.

LowVoltHumidity:1,000hours85°C/85%RHand1.5V.Add100Kohmresistor.

Measurementat24hours+/-2hoursaftertestconclusion.

Moisture Resistance MIL–STD–202Method106

t=24hours/cycle.Steps7aand7bnotrequired.Unpowered.

Measurementat24hours+/-2hoursaftertestconclusion.

ThermalShock MIL–STD–202Method107

-55°C/+125°C.Note:Numberofcyclesrequired–300.Maximumtransfertime–20seconds.

Dwell time – 15 minutes. Air – Air.

HighTemperatureLife MIL–STD–202Method108

/EIA–198

1,000hoursat125°Cwith2Xratedvoltageappliedexcludingthefollowing:

Case Size Capacitance Applied Voltage

0603 & 0805 ≥1.0µF 1.5 X

1206 & 1210 ≥10µF

Storage Life MIL–STD–202Method108 150°C,0VDCfor1,000hours.

Vibration MIL–STD–202Method204

5g'sfor20minutes,12cycleseachof3orientations.Note:Use8"X5"PCB0.031"thick7secure

pointsononelongsideand2securepointsatcornersofoppositesides.Partsmountedwithin2"

from any secure point. Test from 10 – 2,000 Hz

MechanicalShock MIL–STD–202Method213 Figure1ofMethod213,ConditionF.

Resistance to Solvents MIL–STD–202Method215 Addaqueouswashchemical,OKEMCleanorequivalent.

Storage & Handling

Ceramicchipcapacitorsshouldbestoredinnormalworkingenvironments.Whilethechipsthemselvesarequiterobustinother

environments,solderabilitywillbedegradedbyexposuretohightemperatures,highhumidity,corrosiveatmospheres,andlongterm

storage.Inaddition,packagingmaterialswillbedegradedbyhightemperature–reelsmaysoftenorwarpandtapepeelforcemay

increase.KEMETrecommendsthatmaximumstoragetemperaturenotexceed40ºCandmaximumstoragehumiditynotexceed70%

relativehumidity.Temperatureuctuationsshouldbeminimizedtoavoidcondensationonthepartsandatmospheresshouldbefreeof

chlorineandsulfurbearingcompounds.Foroptimizedsolderabilitychipstockshouldbeusedpromptly,preferablywithin1.5yearsof

receipt.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Construction (Typical)

Dielectric Material

(BaTiO3)

Detailed Cross Section

Barrier Layer

(Ni)

Base Metal

(Cu)

Inner Electrodes

(Ni)

Termination Finish

(100% Matte Sn)

Barrier Layer

(Ni)

Base Metal

(Cu)

Termination Finish

(100% Matte Sn)

Inner Electrodes

(Ni)

Dielectric Material

(BaTiO3)

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Capacitor Marking (Optional):

Thesesurfacemountmultilayerceramiccapacitorsare

normallysuppliedunmarked.Ifrequired,theycanbemarked

as an extra cost option. Marking is available on most KEMET

devicesbutmustberequestedusingthecorrectordering

codeidentier(s).Ifthisoptionisrequested,twosidesofthe

ceramicbodywillbelasermarkedwitha“K”toidentifyKEMET,

followedbytwocharacters(perEIA–198-seetablebelow)to

identifythecapacitancevalue.EIA0603casesizedevicesare

limitedtothe“K”characteronly.

Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices

• EIA 0402 case size devices

• EIA0603casesizedeviceswithFlexibleTerminationoption.

• KPS Commercial and Automotive Grade stacked devices.

• X7R dielectric products in capacitance values outlined below

Marking appears in legible contrast. Illustrated below is an

exampleofanMLCCwithlasermarkingof“KA8”,which

designatesaKEMETdevicewithratedcapacitanceof100µF.

Orientation of marking is vendor optional.

EIA Case Size Metric Size Code Capacitance

0603

1608

≤170pF

0805

2012

≤150pF

1206

3216

≤910pF

1210

3225

≤2,000pF

1808

4520

≤3,900pF

1812

4532

≤6,700pF

1825

4564

≤0.018µF

2220

5650

≤0.027µF

2225

5664

≤0.033µF

KEMET

2-Digit

Capacitance

Code

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Capacitor Marking (Optional) cont’d

Capacitance (pF) For Various Alpha/Numeral Identi ers

Alpha

Character

Numeral

Capacitance (pF)

0.1

1 0

100

1,000

10,000

100,000

1,000,000

10,000,000

100,000,000

0.11

1.1

110

1,10 0

11,000

110,000

1,100,000

11,000,000

110,000,000

0.12

1 2

120

1,200

12,000

120,000

1,200,000

12,000,000

120,000,000

0.13

1 3

130

1,300

13,000

130,000

1,300,000

13,000,000

130,000,000

0.15

1 5

150

1,500

15,000

150,000

1,500,000

15,000,000

150,000,000

0.16

1 6

160

1,600

16,000

160,000

1,600,000

16,000,000

160,000,000

0.18

1 8

180

1,800

18,000

180,000

1,800,000

18,000,000

180,000,000

0.2

2 0

200

2,000

20,000

200,000

2,000,000

20,000,000

200,000,000

0.22

2 2

220

2,200

22,000

220,000

2,200,000

22,000,000

220,000,000

0.24

2.4

240

2,400

24,000

240,000

2,400,000

24,000,000

240,000,000

0.27

2.7

270

2,700

27,000

270,000

2,700,000

27,000,000

270,000,000

0.3

3 0

300

3,000

30,000

300,000

3,000,000

30,000,000

300,000,000

0.33

3 3

330

3,300

33,000

330,000

3,300,000

33,000,000

330,000,000

0.36

3 6

360

3,600

36,000

360,000

3,600,000

36,000,000

360,000,000

Q

0.39

3 9

390

3,900

39,000

390,000

3,900,000

39,000,000

390,000,000

0.43

4 3

430

4,300

43,000

430,000

4,300,000

43,000,000

430,000,000

0.47

4.7

470

4,700

47,000

470,000

4,700,000

47,000,000

470,000,000

0.51

5.1

510

5,100

51,000

510,000

5,100,000

51,000,000

510,000,000

0.56

5 6

560

5,600

56,000

560,000

5,600,000

56,000,000

560,000,000

0.62

6 2

620

6,200

62,000

620,000

6,200,000

62,000,000

620,000,000

0.68

6 8

680

6,800

68,000

680,000

6,800,000

68,000,000

680,000,000

0.75

7 5

750

7,500

75,000

750,000

7,500,000

75,000,000

750,000,000

0.82

8 2

820

8,200

82,000

820,000

8,200,000

82,000,000

820,000,000

0.91

9.1

910

9,100

91,000

910,000

9,100,000

91,000,000

910,000,000

0.25

2 5

250

2,500

25,000

250,000

2,500,000

25,000,000

250,000,000

0.35

3 5

350

3,500

35,000

350,000

3,500,000

35,000,000

350,000,000

0.4

4 0

400

4,000

40,000

400,000

4,000,000

40,000,000

400,000,000

0.45

4 5

450

4,500

45,000

450,000

4,500,000

45,000,000

450,000,000

0.5

5 0

500

5,000

50,000

500,000

5,000,000

50,000,000

500,000,000

0.6

6 0

600

6,000

60,000

600,000

6,000,000

60,000,000

600,000,000

0.7

7 0

700

7,000

70,000

700,000

7,000,000

70,000,000

700,000,000

0.8

8 0

800

8,000

80,000

800,000

8,000,000

80,000,000

800,000,000

0.9

9 0

900

9,000

90,000

900,000

9,000,000

90,000,000

900,000,000

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Tape & Reel Packaging Information

KEMEToffersmultilayerceramicchipcapacitorspackagedin8,12and16mmtapeon7"and13"reelsinaccordancewithEIA

Standard481.Thispackagingsystemiscompatiblewithalltape-fedautomaticpickandplacesystems.SeeTable2fordetailson

reelingquantitiesforcommercialchips.

8 mm, 12 mm

or 16 mm Carrier Tape

178 mm (7.00")

330 mm (13.00")

Anti-Static Reel

Embossed Plastic* or

Punched Paper Carrier.

Embossment or Punched Cavity

Anti-Static Cover Tape

(.10 mm (.004") Maximum Thickness)

Chip and KPS Orientation in Pocket

(except 1825 Commercial, and 1825 and 2225 Military)

*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.

KEMET

Bar Code Label

Sprocket Holes

Table 5 – Carrier Tape Con guration, Embossed Plastic & Punched Paper (mm)

EIA Case Size Tape size (W)*

Embossed Plastic

Punched Paper

7" Reel 13" Reel 7" Reel 13" Reel

Pitch(P1)* Pitch(P1)*

01005 – 0402 8 2 2

0603 8 4 4

0805 8 4444

1206 – 1210 8 4444

1805 – 1808 12 4 4

≥1812 12 8 8

KPS 1210 12 8 8

KPS 1812 & 2220 16 12 12

Array 0508 & 0612 8 4 4

*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.

*Refer to Tables 6 & 7 for tolerance speci cations.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

Center Lines of Cavity

User Direction of Unreeling

Cover Tape

is for tape feeder reference only,

including draft concentric about B

ØD

ØDo

Embossment

For cavity size,

see Note 1 Table 4

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size D0

Minimum

Note 1

E1P0 P2

R Reference

Note 2

Minimum

Note 3

Maximum

8 mm

1.5 +0.10/-0.0

(0.059 +0.004/-0.0)

1.0

(0.039)

1.75 ±0.10

(0.069 ±0.004)

4.0 ±0.10

(0.157 ±0.004)

2.0 ±0.05

(0.079 ±0.002)

25.0

(0.984)

0.600

(0.024)

0.600

(0.024)

0.100

(0.004)

12 mm 1.5

(0.059)

(1.181)

16 mm

Variable Dimensions — Millimeters (Inches)

Tape Size Pitch

Maximum

Note 4

Minimum

F P1

Maximum

A0,B0 & K0

8 mm Single (4 mm)

4.35

(0.171)

6.25

(0.246)

3.5 ±0.05

(0.138 ±0.002)

4.0 ±0.10

(0.157 ±0.004)

2.5

(0.098)

8.3

(0.327)

Note 512 mm

Single (4 mm) &

Double (8 mm)

8.2

(0.323)

10.25

(0.404)

5.5 ±0.05

(0.217 ±0.002)

8.0 ±0.10

(0.315 ±0.004)

4.6

(0.181)

12.3

(0.484)

16 mm Triple (12 mm)

12.1

(0.476)

14.25

(0.561)

7.5 ±0.05

(0.138 ±0.002)

12.0 ±0.10

(0.157 ±0.004)

4.6

(0.181)

16.3

(0.642)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and

hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 6).

3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B1 dimension is a reference dimension for tape feeder clearance only.

5. The cavity de ned by A0, B0 and K0 shall surround the component with suf cient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).

(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 2 – Punched (Paper) Carrier Tape Dimensions

User Direction of Unreeling

Top Cover Tape

Center Lines of Cavity

ØDo Po

Cavity Size,

See

Note 1, Table 7

Bottom Cover Tape

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

Table 7 – Punched (Paper) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size D0E1P0P2T1 Maximum G Minimum

R Reference

Note 2

8 mm 1.5 +0.10 -0.0

(0.059 +0.004 -0.0)

1.75 ±0.10

(0.069 ±0.004)

4.0 ±0.10

(0.157 ±0.004)

2.0 ±0.05

(0.079 ±0.002)

0.10

(0.004) Maximum

0.75

(0.030)

(0.984)

Variable Dimensions — Millimeters (Inches)

Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0

8 mm Half (2 mm) 6.25

(0.246)

3.5 ±0.05

(0.138 ±0.002)

2.0 ±0.05

(0.079 ±0.002)

1.1

(0.098)

8.3

(0.327)

Note 1

8 mm Single (4 mm)

4.0 ±0.10

(0.157 ±0.004)

8.3

(0.327)

1. The cavity de ned by A0, B0 and T shall surround the component with suf cient clearance that:

a) the component does not protrude beyond either surface of the carrier tape.

b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

c) rotation of the component is limited to 20° maximum (see Figure 3).

d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).

e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

2. The tape with or without components shall pass around R without damage (see Figure 6).

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force: 1.0 Kg minimum.

2. Cover Tape Peel Strength: Thetotalpeelstrengthofthecovertapefromthecarriertapeshallbe:

Tape Width Peel Strength

8 mm 0.1 to 1.0 Newton (10 to 100 gf)

12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf)

Thedirectionofthepullshallbeoppositethedirectionofthecarriertapetravel.Thepullangleofthecarriertapeshallbe165°to180°

fromtheplaneofthecarriertape.Duringpeeling,thecarrierand/orcovertapeshallbepulledatavelocityof300±10mm/minute.

3. Labeling:Barcodelabeling(standardorcustom)shallbeonthesideofthereeloppositethesprocketholes.Refer to EIA

Standards 556 and 624.

Figure 3 – Maximum Component Rotation

Maximum Component Rotation

Top View

Maximum Component Rotation

Side View

Tape Maximum

Width (mm) Rotation (°

8,12 20

16 – 200 10 Tape Maximum

Width (mm) Rotation ( °

8,12 20

16 – 56 10

72 – 200 5

Typical Pocket Centerline

Typical Component Centerline

Figure 4 – Maximum Lateral Movement

0.5 mm maximum

8 mm & 12 mm Tape

1.0 mm maximum

16 mm Tape

Figure 5 – Bending Radius

Bending

Radius

Embossed

Carrier

Punched

Carrier

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 6 – Reel Dimensions

AD(See Note)

Full Radius,

See Note

B(see Note)

Access Hole at

Slot Location

(Ø 40 mm minimum)

If present,

tape slot in core

for tape start:

2.5 mm minimum width x

10.0 mm minimum depth

W3(Includes

flange distortion

at outer edge)

W2(Measured at hub)

W1(Measured at hub)

(Arbor hole

diameter)

Note: Drive spokes optional; if used, dimensions B and D shall apply.

Table 8 – Reel Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size A B Minimum CD Minimum

8 mm 178 ±0.20

(7.008 ±0.008)

330 ±0.20

(13.000 ±0.008)

1.5

(0.059)

13.0 +0.5/-0.2

(0.521 +0.02/-0.008)

20.2

(0.795)

12 mm

16 mm

Variable Dimensions — Millimeters (Inches)

Tape Size N Minimum W1 W2 Maximum W3

8 mm

(1.969)

8.4 +1.5/-0.0

(0.331 +0.059/-0.0)

14.4

(0.567)

Shallaccommodatetapewidth

withoutinterference

12 mm

12.4 +2.0/-0.0

(0.488 +0.078/-0.0)

18.4

(0.724)

16 mm

16.4 +2.0/-0.0

(0.646 +0.078/-0.0)

22.4

(0.882)

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 7 – Tape Leader & Trailer Dimensions

Trailer

160 mm Minimum

Carrier Tape

END START

Round Sprocket Holes

Elongated Sprocket Holes

(32 mm tape and wider)

Top Cover Tape

Punched Carrier

8 mm & 12 mm only

Embossed Carrier

Components

100 mm

Minimum Leader

400 mm Minimum

Figure 8 – Maximum Camber

Carrier Tape

Round Sprocket Holes

1 mm Maximum, either direction

Straight Edge

250 mm

Elongated sprocket holes

(32 mm & wider tapes)

Bulk Cassette Packaging (Ceramic Chips Only)

MeetsDimensionalRequirementsIEC–286andEIAJ7201

Unit mm *Reference

110 ± 0.7

31.5 ± 0

0.2

36 ± 0

0.2

19.0*

5 0*

10*

53 3*

68 ± 0.1

88 ± 0.1

12.0 ± 0.1

3.0 ± 0

0.2

2.0 ± 0.1

1.5 ± 0

0.1

Capacitor Dimensions for Bulk Cassette

Cassette Packaging – Millimeters

EIA Size

Code

Metric Size

Code

L Length W Width B Bandwidth

S Separation

Minimum

T Thickness

Number of

Pieces/Cassette

0402 1005 1.0 ±0.05 0.5 ±0.05 0.2 to 0.4 0.3 0.5 ±0.05 50,000

0603 1608 1.6 ±0.07 0.8 ±0.07 0.2 to 0.5 0.7 0.8 ±0.07 15,000

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

KEMET Corporation

World Headquarters

2835 KEMET Way

Simpsonville, SC 29681

Mailing Address:

P.O. Box 5928

Greenville, SC 29606

www.kemet.com

Tel: 864-963-6300

Fax: 864-963-6521

Corporate Of ces

Fort Lauderdale, FL

Tel: 954-766-2800

North America

Southeast

Lake Mary, FL

Tel: 407-855-8886

Northeast

Wilmington, MA

Tel: 978-658-1663

Central

Novi, MI

Tel: 248-306-9353

West

Milpitas, CA

Tel: 408-433-9950

Mexico

Guadalajara, Jalisco

Tel: 52-33-3123-2141

Europe

Southern Europe

Paris, France

Tel: 33-1-4646-1006

Sasso Marconi, Italy

Tel: 39-051-939111

Central Europe

Landsberg, Germany

Tel: 49-8191-3350800

Kamen, Germany

Tel: 49-2307-438110

Northern Europe

Bishop’sStortford,UnitedKingdom

Tel: 44-1279-460122

Espoo, Finland

Tel: 358-9-5406-5000

Asia

Northeast Asia

Hong Kong

Tel: 852-2305-1168

Shenzhen,China

Tel: 86-755-2518-1306

Beijing,China

Tel: 86-10-5829-1711

Shanghai,China

Tel: 86-21-6447-0707

Taipei, Taiwan

Tel: 886-2-27528585

Southeast Asia

Singapore

Tel: 65-6586-1900

Penang, Malaysia

Tel: 60-4-6430200

Bangalore, India

Tel: 91-806-53-76817

Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not

assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of

KEMET Electronics Corporation.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Disclaimer

Allproductspecications,statements,informationanddata(collectively,the“Information”)inthisdatasheetaresubjecttochange.Thecustomerisresponsibleforcheckingand

verifyingtheextenttowhichtheInformationcontainedinthispublicationisapplicabletoanorderatthetimetheorderisplaced.

AllInformationgivenhereinisbelievedtobeaccurateandreliable,butitispresentedwithoutguarantee,warranty,orresponsibilityofanykind,expressedorimplied.

StatementsofsuitabilityforcertainapplicationsarebasedonKEMETElectronicsCorporation’s(“KEMET”)knowledgeoftypicaloperatingconditionsforsuchapplications,butare

notintendedtoconstitute–andKEMETspecicallydisclaims–anywarrantyconcerningsuitabilityforaspeciccustomerapplicationoruse.TheInformationisintendedforuseonly

bycustomerswhohavetherequisiteexperienceandcapabilitytodeterminethecorrectproductsfortheirapplication.AnytechnicaladviceinferredfromthisInformationorotherwise

providedbyKEMETwithreferencetotheuseofKEMET’sproductsisgivengratis,andKEMETassumesnoobligationorliabilityfortheadvicegivenorresultsobtained.

AlthoughKEMETdesignsandmanufacturesitsproductstothemoststringentqualityandsafetystandards,giventhecurrentstateoftheart,isolatedcomponentfailuresmaystill

occur.Accordingly,customerapplicationswhichrequireahighdegreeofreliabilityorsafetyshouldemploysuitabledesignsorothersafeguards(suchasinstallationofprotective

circuitryorredundancies)inordertoensurethatthefailureofanelectricalcomponentdoesnotresultinariskofpersonalinjuryorpropertydamage.

Althoughallproduct–relatedwarnings,cautionsandnotesmustbeobserved,thecustomershouldnotassumethatallsafetymeasuresareindictedorthatothermeasuresmaynot

berequired.