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www.fairchildsemi.com
REV. 1.0.4 3/15/04
Features
Fixed 1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V, 3.3V, 3.5V, 3.6V,
3.8V and Adjustable Output
•Power Good Indicator with Open Drain Output
180mA Output Current
100µA Ground Current
•C
bypass
for Low Noise Operation
•Fast Enable for CDMA Applications
High Ripple Rejection
Current Limit
Thermal Shutdown
Excellent Line and Load Regulation
Requires Only 1µF Output Capacitor
Stable with 0 to 300m
ESR
TTL-level Compatible Enable Input
Active Output Discharge
Applications
Processor Power-up sequencing
•PDAs, Cell Phones
Portable Electronic Equipment
PCMCIA Vcc and Vpp regulation/switching
General Description
The FAN2558/9 low voltage CMOS LDOs feature xed or
adjustable output voltage, 180mA load current, delayed
power good output (open drain) and 1% output accuracy
with excellent line and load regulation. An external bypass
capacitor provides ultra-low noise operation.
The FAN2558/9 low voltage LDOs incorporate both thermal
shutdown and short circuit protection. Output is stable with a
1µF, low ESR capacitor. The FAN2558/9 family is available
in 5-Lead SOT-23, 6-Lead SOT-23 and 2x2mm MLP-6
packages.
FAN2558:
Fixed Output LDO with Power Good output
FAN2558ADJ:
Adjustable Output LDO with Power Good
output
FAN2559:
Fixed Output LDO with Power Good output,
Low Noise
Available standard output voltages are 1.0, 1.2V, 1.3V, 1.5V,
1.8V, 2.5V, 3.3V, 3.5V, 3.6V, and 3.8V. Custom output volt-
age options are also available.
FAN2558/FAN2559
180mA Low Voltage CMOS LDO
Typical Application
C
OUT
FB
SHDN
CAP+
CAP-
GND
V
IN
R
1
R
2
ADJ
V
OUT
EN PG
FAN2558ADJ
FB
SHDN
CAP+
CAP-
GND
V
IN
R
PG
R
PG
R
PG
V
OUT
C
OUT
EN PG
FAN2558
FB
SHDN
CAP+
CAP-
GND
V
IN
C
BYP
V
OUT
C
OUT
C
BYP
EN PG
FAN2559
47K47K47K
2
REV. 1.0.4 3/15/04
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
Pin Assignments
Pin Descriptions
Pin no.
Pin Name
FAN2558 FAN2558ADJ FAN2559
5SOT-23 2x2mm MLP-6 6SOT-23 2x2mm MLP-6 6SOT-23 2x2mm MLP-6
1V
IN
V
OUT
V
IN
V
OUT
V
IN
V
OUT
2 GND. NC GND. ADJ GND. BYP
3EN PG EN PGENPG
4PG EN PG ENPGEN
5V
OUT
GND ADJ GND BYP GND
6V
IN
V
OUT
V
IN
V
OUT
V
IN
Symbol Pin Function Description
V
IN
Power Supply Input
V
OUT
Regulated Voltage Output
GND Ground Connection
PG Power Good Output, Open Drain
ADJ Ratio of potential divider from V
out
to ADJ determines output voltage
BYP Reference Noise Bypass
EN Chip Enable Input. The regulator is fully enabled when TTL “H” is applied to this input. The regulator
enters into shutdown mode when TTL “L” is applied to this input.
FAN2558
5-Lead SOT-23 PACKAGE
GND
V
IN
EN PG
VOUT
1
2
34
5
FAN2558/FAN2558ADJ/FAN2559
2x2mm MLP-6 PACKAGE
V
OUT
PG
NC/ADJ/BYP GND
V
IN
EN
FAN2558ADJ/FAN2559
6-Lead SOT-23 PACKAGE
GND
V
IN
EN
ADJ/BYP
PG
VOUT
1
2
34
5
6
TOP-VIEW
1
2
3
6
5
4
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04
3
Absolute Maximum Ratings
Recommended Operating Conditions
Notes:
1. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model)
2. Junction to ambient thermal resistance,
Θ
JC
, is a strong function of PCB material, board thickness, thickness and number of
copper plains, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics.
Parameter Min. Max. Units
V
IN
to GND 6V
Voltage on any other pin to GND -0.3 V
IN
+ 0.3 V
Junction Temperature (T
J
) -55 150 °C
Storage Temperature -65 150 °C
Lead Soldering Temperature, 10 seconds 300 °C
Power Dissipation (P
D
) Internally
Limited
W
Electrostatic Discharge (ESD) Protection (Note1) HBM 4 kV
CDM 1
Parameter Min. Typ. Max. Units
Supply Voltage Range, V
IN
for V
OUT
< 2.0V 2.7 5.5 V
Supply Voltage Range, V
IN
for V
OUT
2.0V V
OUT
+ V
DROPOUT
5.5 V
Load Current 180 mA
Enable Input Voltage V
EN
0V
IN
V
Power Good Output Voltage Range V
PG
0V
IN
V
Junction Temperature -40 125 °C
Thermal Resistance-Junction to Ambient SOT-23 (Note 2) 235
°C/W
Thermal Resistance-Junction to Case, 2mm x 2mm
6-lead MLP
75
4
REV. 1.0.4 3/15/04
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
Electrical Characteristics
Note:
3. Guaranteed ±1% output voltage accuracy parts are available on customer request.
4. Measured at constant junction temperature using low duty cycle pulse testing.
5. V
IN
min = 2.7V or (V
OUT
+ 1V), whichever is greater.
V
IN
= V
IN
min (note 5) to 5.5V, V
EN
= V
IN
, I
LOAD
= 100
µ
A, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at 25°C.
Symbol Parameter Conditions Min. Typ. Max. Units
V
OUT
Output Voltage Accuracy
(Note 3)
I
LOAD
= 100
µ
A-212%
V
OUT(ADJ)
Output Voltage Range
(Adjustable)
I
LOAD
= 100
µ
A1 V
IN
V
V
OUT_LNR
Line Regulation V
IN
min < V
IN
< 5.5V -0.3 0.3 %/V
V
OUT_LDR
Load Regulation (Note 4) I
LOAD
= 0.1mA to 150mA 2.5 4 %
I
SD
Supply Current in Shutdown
Mode
V
EN
< 0.4V
PG = No Connection
0.1
µ
A
I
GND
Ground Pin Current (Note 4) I
LOAD
= 0mA, V
IN
= 5.5V 90 150
µ
A
I
LOAD
= 150mA, V
IN
= 5.5V 110 150
I
LIM
Current Limit V
OUT
= 0V 260 350 500 mA
T
SD
Thermal Shutdown
Temperature
150 °C
Thermal Shutdown Hysteresis 10 °C
V
ENL
Enable Input Low V
IN
= 5.5V, Shutdown 0.4 V
V
ENH
Enable Input High V
IN
= 5.5V, Enabled 1.6 V
I
E
Enable Input Current V
ENL
0.4V, V
IN
= 5.5V 0.01
µ
A
V
ENH
1.6V, V
IN
= 5.5V 0.01
V
PG
Low Threshold % of V
OUT
PG ON 89 %
High Threshold % of V
OUT
PG OFF 97 %
V
PGL
PG Output Low Voltage I
PG_SINK
= 100
µ
A,
Fault Condition
0.02 0.1 V
I
PG
PG Leakage Current PG off, V
PG
=5.5V 0.01
µ
A
T
EN
Enable Response Time C
OUT
= 1µF
CBYPASS = 10nF
30 300 µS
TON Power "ON" Delay Time COUT = 1µF
CBYPASS = 10nF
VENL 1.6V,
VIN = 0V to VOUT + 1V
300 500 µS
DPG PG Delay time 1 5 mS
VDROP-OUT Dropout Voltage
(For Adjustable Output
Version)
VOUT > 2.7V and
ILOAD = 180mA
400 mV
VFB_ADJ Feedback Voltage
(For Adjustable Output
Version)
0.59 V
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04 5
DC Electrical Characteristics (Continued)
VIN = VIN min (note 5) to 5.5V, VEN = VIN, ILOAD = 100µA, TA = -40°C to +85°C, unless otherwise noted. Typical
values are at 25°C.
Symbol Parameter Conditions Min. Typ. Max. Units
PSRR Power Supply Rejection Ratio DC to 100kHz
COUT =1µF
CBYPASS= 10nF
ILOAD = 0 to 150mA
VOUT 1.8V
50 dB
eNOutput Noise BW: 300Hz to 50kHz
COUT =1µF
CBYPASS= 10nF
ILOAD = 0 to 150mA
30 µVRMS
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
6REV. 1.0.4 3/15/04
Functional Description
Utilizing BiCMOS technology, the FAN2525/FAN2559
product family is optimized for use in compact battery pow-
ered systems. These LDOs offer a unique combination of
high ripple rejection, low noise, low power consumption,
high tolerance for a variety of output capacitors, and less
than 1µA “OFF” current. In the circuit, a differential current
sense amplier controls a series-pass P-Channel MOSFET to
achieve high ripple rejection. A separate error amplier com-
pares the load voltage at the output with an onboard trimmed
low voltage bandgap reference for output regulation.
Thermal shutdown and current limit circuits protect the
device under extreme conditions. When the device tempera-
ture reaches 150°C, the output is disabled. When the device
cools down by 10°C, it is re-enabled. The user can shut down
the device using the Enable control pin at any time. The cur-
rent limit circuit is trimmed, which leads to consistent power
on /enable delays, and provides safe short circuit current
densities even in narrow traces of the PCB.
A carefully optimized control loop accommodates a wide
range of ESR values in the output bypass capacitor, allowing
the user to optimize space, cost, and performance require-
ments.
An Enable pin shuts down the regulator output to conserve
power, reducing supply current to less than 1µA.
The xed-voltage FAN2559 has a noise bypass pin. Power
Good is available as a diagnostic function to indicate that the
output voltage has reduced within 5% of the nominal value.
The six pin adjustable-voltage version utilizes pin 5 to con-
nect to an external voltage divider which feeds back to the
regulator error amplier, thus setting the output voltage to
the desired value.
Applications Information
External Capacitors – Selection
The FAN2558/FAN2559 gives the user the exibility to uti-
lize a wide variety of capacitors compared to other LDOs.
An innovative design approach offers signicantly reduced
sensitivity to ESR, which degrades regulator loop stability in
older designs. While the improvements featured in the
FAN2558/FAN2559 family greatly simplify the design task,
capacitor quality still must be considered if the designer is to
achieve optimal circuit performance. In general, ceramic
capacitors offer superior ESR performance, and a smaller
case size than tantalum capacitors.
Input Capacitor
An input capacitor of 2.2µF (nominal value) or greater,
connected between the Input pin and Ground, placed in close
proximity to the device, will improve transient response and
ripple rejection. Higher values will further improve ripple
rejection and transient response. An input capacitor is rec-
ommended when the input source, either a battery or a regu-
lated AC voltage, is located far from the device. Any good
quality ceramic, tantalum, or metal lm capacitor will give
acceptable performance; however, in extreme cases capacitor
surge current ratings may have to be considered.
Output Capacitor
An output capacitor is required to maintain regulator loop
stability.
Stable operation will be achieved with a wide vari-
ety of capacitors with ESR values ranging from 0m up to
400m. Multilayer ceramic, tantalum or aluminum electro-
lytic capacitors may be used. A nominal value of at least 1µF
is recommended. Note that the choice of output capacitor
affects load transient response, ripple rejection, and it has a
slight effect on noise performance as well.
An internal resistor of approximately 100 is connected
between VOUT and GND in shutdown mode, to discharge the
output capacitor at a faster rate.
Bypass Capacitor (FAN2559 Only)
In the xed-voltage conguration, connecting a capacitor
between the bypass pin and ground can signicantly reduce
output noise. Values ranging from 0pF to 47nF can be used,
depending on the sensitivity to output noise in the applica-
tion.
At the high-impedance Bypass pin, care must be taken in the
PCB layout to minimize noise pickup, and capacitors must
be selected to minimize current loading (leakage). Noise
pickup from external sources can be considerable. Leakage
currents into the Bypass pin will directly affect regulator
accuracy and should be kept as low as possible; thus, high-
quality ceramic and lm types are recommended for their
low leakage characteristics. Cost-sensitive applications not
concerned with noise can omit this capacitor.
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04 7
Control Functions
Enable Pin
Connecting 2V or greater to the Enable pin will enable the
output, while 0.4V or less will disable it while reducing the
quiescent current consumption to less than 1µA. If this shut-
down function is not needed, the pin can simply be con-
nected permanently to the VIN pin. Allowing this pin to oat
will cause erratic operation.
Error Flag (Power Good)
Fault conditions such as input voltage dropout (low VIN),
overheating, or overloading (excessive output current), will
set an error ag. The PG pin which is an open-drain output,
will go LOW when VOUT is less than 95% or the specied
output voltage. When the voltage at VOUT is greater than
95% of the specied output voltage, the PG pin is HIGH. A
logic pull-up resistor of 47K is recommended at this out-
put. The pin can be left disconnected if unused.
Thermal Protection
The FAN2558/FAN2559 is designed to supply high peak
output currents for brief periods, however sustained exces-
sive output load at high input - output voltage difference will
increase the device’s temperature and exceed maximum rat-
ings due to power dissipation. During output overload condi-
tions, when the die temperature exceeds the shutdown limit
temperature of 150°C, an onboard thermal protection will
disable the output until the temperature drops approximately
10°C below the limit, at which point the output is re-enabled.
During a thermal shutdown, the user may assert the power-
down function at the Enable pin, reducing power consump-
tion to a minimum.
Thermal Characteristics
The FAN2558/FAN2559 is designed to supply 180mA at the
specied output voltage with an operating die (junction)
temperature of up to 125°C. Once the power dissipation and
thermal resistance is known, the maximum junction tempera-
ture of the device can be calculated. While the power dissipa-
tion is calculated from known electrical parameters, the
actual thermal resistance depends on the thermal characteris-
tics of the SOT23-5 surface-mount package and the sur-
rounding PC board copper to which it is mounted.
The power dissipation is equal to the product of the input-to-
output voltage differential and the output current plus the
ground current multiplied by the input voltage,
or:
The ground pin current IGND can be found in the charts
provided in the Electrical Characteristics section.
The relationship describing the thermal behavior of the
package is:
where TJ(max) is the maximum allowable junction tempera-
ture of the die, which is 125°C, and TA is the ambient operat-
ing temperature. θJA is dependent on the surrounding PC
board layout and can be empirically obtained. While the θJC
(junction-to-case) of the SOT23-5 package is specied at
130°C /W, the θJA of the minimum PWB footprint will be at
least 235°C /W. This can be improved by providing a heat
sink of surrounding copper ground on the PWB. Depending
on the size of the copper area, the resulting θJA can range
from approximately 180°C /W for one square inch to nearly
130°C /W for 4 square inches. The addition of backside cop-
per with through-holes, stiffeners, and other enhancements
can also aid in reducing thermal resistance. The heat contrib-
uted by the dissipation of other devices located nearby must
be included in the design considerations. Once the limiting
parameters in these two relationships have been determined,
the design can be modied to ensure that the device remains
within specied operating conditions. If overload conditions
are not considered, it is possible for the device to enter a
thermal cycling loop, in which the circuit enters a shutdown
condition, cools, re-enables, and then again overheats and
shuts down repeatedly due to an unmanaged fault condition.
Adjustable Version
The FAN2558ADJ includes an input pin ADJ which allows
the user to select an output voltage ranging from 1V to near
VIN, using an external resistor divider. The voltage VADJ pre-
sented to the ADJ pin is fed to the onboard error amplier
which adjusts the output voltage until VADJ is equal to the
onboard bandgap reference voltage of 1.00V(typ). The equa-
tion is:
Since the bandgap reference voltage is trimmed, 1% initial
accuracy can be achieved. The total value of the resistor
chain should not exceed 250KOhm total to keep the error
amplier biased during no-load conditions. Programming
output voltages very near VIN need to allow for the magni-
tude and variation of the dropout voltage VDO over load, sup-
ply, and temperature variations. Note that the low-leakage
FET input to the CMOS error amplier induces no bias
current error to the calculation.
PDVIN VOUT
()IOUT VIN IGND
×+×=
PDmax()
TJmax()
TA
θJA
-------------------------------



=
VOUT 0.59V 1
R1
R2
------+×=
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
8REV. 1.0.4 3/15/04
General PCB Layout Considerations
For optimum device performance, careful circuit layout and
grounding techniques must be used. Establishing a small
local ground, to which the GND pin, and the output and
bypass capacitors are connected, is recommended. The input
capacitor should be grounded to the main ground plane. The
quiet local ground is then routed back to the main ground
plane using feed through via. In general, the high-frequency
compensation components (input, bypass, and output capaci-
tors) should be located as close to the device as possible.
Close proximity of the output capacitor is especially impor-
tant to achieve optimum performance, especially during high
load conditions. A large copper area in the local ground
serves as heat sink (as discussed above) when high power
dissipation signicantly increases device temperature. Com-
ponent-side copper provides signicantly better thermal per-
formance. Added feed through connecting the device side
ground plane to the back plane further reduces thermal resis-
tance.
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04 9
Block Diagram (Note 6)
Note:
6. Fixed output voltage version. BYPASS pin is available for FAN2559 only.
Precharge/Fast Enable
Over-Current
Dropout
Detection
Out of Regulation
Detection
Bandgap
p
n
n
Shutdown
Control
Load Current
Sense
Shutdown
Error Amplifier
Delay
GND
GND
PG
VOUT
VIN
EN
BYPASS
Thermal
Shutdown
10 REV. 1.0.4 3/15/04
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
Typical Performance Characteristics
Unless otherwise specified, CIN = COUT = 1µF, R PG = 47kΩ, TA = 25°C, EN = VIN
Output Voltage vs. Temperature
Output Voltage vs. Temperature
VIN = 5.5V
ILOAD = 0mA
VIN = 5.5V
Output Voltage (V)
Output Voltage (V)
Junction Temperature (°C)
Junction Temperature (°C)
Ground Current (µA)
Junction Temperature (°C)
ILOAD = 0mA VIN = 5.5V
VIN = 2.7V
Ground Current (µA)
Junction Temperature (°C)
Ground Current vs. Temperature
VIN = 2.7V
VIN = 5.5V
ILOAD = 180mA
Junction Temperature (°C)
Enable Delay (µS)
Enable Response Time vs. Temperature Power On Response Time vs. Temperature
Junction Temperature (°C))
Power On Delay (µS)
ILOAD = 180mA
Ground Current vs. Temperature
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04 11
Power Good Delay vs. Input Voltage
Power Good Delay (mS)
Input Voltage (V)
Output Voltage vs. Input Voltage
Input Voltage (V)
Output Voltage (V)
ILOAD =180mA
Output Voltage vs. Load Current
Output Voltage (V)
Load Current (mA)
COUT =1µF
VIN =2.7V
Output Voltage vs. Enable Voltage
Output Voltage (V)
Enable Voltage (V)
COUT =1µF
ILOAD =100µA
ILOAD =100µA
Ripple Rejection vs. Frequency
ILOAD =0mA
COUT =1µF
CBYP = 10nF
Ripple Rejection (dB)
Ripple Rejection (dB)
Ripple Rejection vs. Frequency
COUT =1µF
ILOAD =180mA
CBYP = 10nF
ILOAD = 100µA
Typical Performance Characteristics (Continued)
Unless otherwise specified, CIN = COUT = 1µF, R PG = 47kΩ, TA = 25°C, EN = VIN
VOUT 1.8V
VOUT 1.8V
12 REV. 1.0.4 3/15/04
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
0.0 0.5 1.0 1.5 2.0
0
5
10
15
20
25
Typical Performance Characteristics (Continued)
Unless otherwise specified, CIN = COUT = 1µF, R PG = 47kΩ, TA = 25°C, EN = VIN
ILOAD = 180mA
COUT =1µF
CBYP = 10nF
Output Spectral Noise Density
Output Voltage
Time (20µS/div)
(500mV/div)
Enable Voltage
(2V/div)
ILOAD =0mA
COUT =1µF
CBYP =10nF
VOUT =1.2V
Enable Delay = 27.6µS
VIN =2.7V
Power Good Delay
VIN =3V
VOUT =1V
COUT =1µF
Power Good Delay = 2mSec
Noise (nVrms/rtHz)
Power Good in Fail Condition
Power Good Current (mA)
Power Good Voltage (V)
VIN = 4V
VIN = 5V
VIN = 3V
Time (1mS/div)
Output Voltage
Power Good
(2V/div) (1V/div)
Time (200µS/div)
Output Voltage
(100mV/div)
Output Current
(50mA/div)
Load Transient Response
VIN = 2.7V
VOUT =1.8V
COUT = 4.7µF
ILOAD =100mA
ILOAD = 0mA
PRODUCT SPECIFICATIONS FAN2558/FAN2559
REV. 1.0.4 3/15/04 13
Mechanical Dimensions
2x2mm 6-Lead MLP
14 REV. 1.0.4 3/15/04
FAN2558/FAN2559 PRODUCT SPECIFICATIONS
Mechanical Dimensions
6-Lead SOT-23 Package
Notes:
7. Package outline exclusive of mold ash & metal burr.
8. Packageoutline exclusive of solder plating.
9. EIAJ Ref Number SC_74A
Symbol Inches Millimeters Notes
Min Max Min Max
A .035 .057 .90 1.45
A1 .000 .006 .00 .15
B .008 .020 .20 .50
c .003 .010 .08 .25
D .106 .122 2.70 3.10
E .059 .071 1.50 1.80
e .037 BSC .95 BSC
e1 .075 BSC 1.90 BSC
H .087 .126 2.20 3.20
L .004 .024 .10 .60
α 10° 10°
D
e1
e
B
EH
A
A1
α
L
c
D
e1
e
B
EH
A
A1
α
L
c
5-Lead SOT-23 Package
PRODUCT SPECIFICATIONS FAN2558/FAN2559
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
REV. 1.0.4 3/15/04
2004 Fairchild Semiconductor Corporation
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
Ordering Information
TA= -40°C to 85°C
Part Number Output Voltage Package Marking Package Order Code
FAN2558 1.0V 58T 5-Lead SOT-23 FAN2558S10X
1.2V 58U FAN2558S12X
1.3V 58X FAN2558S13X
1.5V 58V FAN2558S15X
1.8V 58O FAN2558S18X
2.5V 58J FAN2558S25X
3.3V 58K FAN2558S33X
3.5V 58P FAN2558S35X
3.6V 58Q FAN2558S36X
3.8V 58I FAN2558S38X
1.0V 58T 2mm x 2mm 6-Lead MLP FAN2558MP10X
1.2V 58U FAN2558MP12X
1.3V 58X FAN2558MP13X
1.5V 58V FAN2558MP15X
1.8V 58O FAN2558MP18X
Adjustable 58R 6-Lead SOT-23 FAN2558SX
58R 2mm x 2mm 6-Lead MLP FAN2558MPX
FAN2559 1.0V 59T 6-Lead SOT-23 FAN2559S10X
1.2V 59U FAN2559S12X
1.3V 59X FAN2559S13X
1.5V 59V FAN2559S15X
1.8V 59O FAN2559S18X
1.0V 59T 2mm x 2mm 6-Lead MLP FAN2559MP10X
1.2V 59U FAN2559MP12X
1.3V 59X FAN2559MP13X
1.5V 59V FAN2559MP15X
1.8V 59O FAN2559MP18X
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