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September 1983

Revised May 2005

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

MM74HC574

3-STATE Octal D-Type Edge-Triggered Flip-Flop

General Descript ion

The MM74HC574 high speed octal D-type flip-flops utilize

advanced silicon-gate P-well CMOS technology. They pos-

sess the hi gh noise immun ity and l ow power consu mption

of standard CMOS integrated circuits, as well as the ability

to drive 15 LS-TTL loads. Due to the large output drive

capability and t he 3-STAT E featu re, th ese de vices are ide-

ally suited for interfacing with bus lines in a bus organized

system.

These devices are positive edge triggered flip-flops. Data

at the D inputs, meeting the set-up and hold time require-

ments, are transferred to the Q outputs on positive going

transitions of the CLOCK (CK) input. When a high logic

level is applied to the OUTPUT CONTROL (OC) input, all

outputs go to a high impedance state, regardless of what

signals are present at th e other inputs and the state of the

storage elements.

The 74H C logic f amily is sp eed, functio n, and pi nout com -

patible with the standard 74LS logic family. All inputs are

protect ed from damage due to static di scharge by in ternal

diode clamps to VCC and ground.

Features

■Typical propagation delay: 18 ns

■Wide operat i ng voltage range: 2V–6V

■Low input current: 1

A maximum

■Low quiescent current: 80

A maximum

■Compatible with bus-oriented systems

■Output drive capability: 15 LS-TTL loads

Ordering Code:

Devices also available in Tape and R eel. Sp ec if y by appending the suffix lett er “X” to th e ordering co de.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSO P

Top View

Truth Table

HIGH Level

LOW Le vel

Don't Care

Transition f rom LOW-to- H IG H

High Impedance State

The level of the output before steady state input conditions were

established

Order Number Package Number Package Description

MM74HC574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

MM74HC574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Output Clock Data Output

Control

LLXQ

HXXZ

www.fairchildsemi.com 2

MM74HC574

Absolute Maximum Ratings(No t e 1)

(Note 2) Recommended Operating

Conditions

Note 1: Maximum Ratings are those values beyond which damage to the

device may occur.

Note 2: Unless ot herwise sp ec ified all vo ltages ar e referenc ed to ground.

Note 3: Power Dis sipation temp erature de rating — plastic “N” package:



12 mW/

C from 65

C to 85

DC Electrical Characteristics (Note 4)

Note 4: For a power supply of 5V

10% the worst-case output voltages (VOH, and VOL) occur for HC a t 4.5V. T hus the 4.5V v alues sho uld be used wh en

designing with this supply. Worst-case VIH and VIL occur at VCC

5.5V and 4.5V respectively. (The VIH value at 5.5V is 3. 85V.) The wo rs t -c as e leakage c ur-

rent (IIN, I CC, and IOZ) occ ur for CMOS at th e higher voltage and so the 6.0 V v alues should be used.

Supply Voltage (VCC)



0.5 to



7.0V

DC Input Voltage (VIN)



1.5 to VCC



1.5V

DC Output Voltage (VOUT)



0.5 to VCC



0.5V

Clamp Diode Current (IIK, IOK)

20 mA

DC Output Current, per pin (IOUT)

35 mA

DC VCC or GND Current, per pin (ICC)

70 mA

Storage Temperature Range (TSTG)



C to



150

Power Dissipation (PD)

(Note 3) 600 mW

S.O. Package only 500 mW

Lead Temperature (TL)

(Soldering 10 seconds) 260

Min Max Units

Supply Voltage (VCC)26V

DC Input or Output Voltage 0 VCC V

(VIN,VOUT)

Operating Temperature Range (TA)





Input Rise or Fall Times

(tr, tf) V

2.0V 1000 ns

VCC

4.5V 500 ns

VCC

6.0V 400 ns

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guar ant eed Lim i ts

VIH Minimum HIGH Level Input 2.0V 1.5 1.5 1.5 VVoltage 4.5V 3.15 3.15 3.15

6.0V 4.2 4.2 4.2

VIL Maximum LOW Level Input 2.0V 0.5 0.5 0.5 VVoltage 4.5V 1.35 1.35 1.35

6.0V 1.8 1.8 1.8

VOH Minimum HIGH Level Output VIN

VIH or VIL

Voltage |IOUT|

A 2.0V 2.0 1.9 1.9 1.9 V4.5V 4.5 4.4 4.4 4.4

6.0V 6.0 5.9 5.9 5.9

VIN

VIH or VIL

|IOUT|

6.0 mA 4.5V 4.2 3.98 3.84 3.7 V

|IOUT|

7.8 mA 6.0V 5.7 5.48 5.34 5.2

VOL Maximum LOW Level Output VIN

VIH or VIL

Voltage |IOUT|

A 2.0V 0 0.1 0.1 0.1 V4.5V 0 0.1 0.1 0.1

6.0V 0 0.1 0.1 0.1

VIN

VIH or VIL

|IOUT|

6.0 mA 4.5V 0.2 0.26 0.33 0.4 V

|IOUT|

7.8 mA 6.0V 0.2 0.26 0.33 0.4

IIN Maximum Input Current VIN

VCC or GND 6.0V

0.1

1.0

IOZ Maxim um 3-STATE VOUT

VCC or GND

Output Leakage Current OC

VIH 6.0V

0.5

5.0

ICC Maximum Quiescent Supply VIN

VCC or GND

Current IOUT

A 6.0V 8.0 80 160

ICC Quiescent Supply Current V CC

5.5V OE 1.0 1.5 1.8 2.0 mAper Input Pin VIN

2.4V CLK 0.6 0.8 1.0 1.1

or 0.4V (Note 4) DATA 0.4 0.5 0.6 0.7

3 www.fairchildsemi.com

MM74HC574

AC Electrical Characteristics

VCC

5V, TA

C, tr

6 ns

AC Electrical Characteristics

VCC

2.0



6.0V, CL

50 pF, tr

6 ns (unless otherwise specified)

Symbol Parameter Conditions Typ Guaranteed Units

Limit

fMAX Maximum Operating Frequency 60 33 MHz

tPHL, tPLH Maximum Propagation Delay, Clock to Q CL

45 pF 17 27 ns

tPZH, tPZL Maximum Output Enable Time RL

1 k

19 28 ns

45 pF

tPHZ, tPLZ Maximum Output Disable Time RL

1 k

14 25 ns

5 pF

tSMinimum Setup Time, Data to Clock 10 12 ns

tHMinimum Hold Time , Clock to Data



35ns

tWMinimum Pulse Clock Width 8 15 n s

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guaranteed Limits

fMAX Maximum Operating Frequency CL

50 pF 2.0V 33 28 23 MHz4.5V 30 24 20

6.0V 35 28 23

tPHL, tPLH Maximum Propagation CL

50 pF 2.0V 18 30 38 45 ns

Delay, Clock to Q CL

150 pF 2.0V 51 155 194 233

50 pF 4.5V 13 23 29 35 ns

150 pF 4.5V 19 31 47 47

50 pF 6.0V 12 20 25 30 ns

150 pF 6.0V 18 27 34 41

tPZH, tPZL Maximum Output Enable RL

1 k

Time CL

50 pF 2.0V 22 30 38 45 ns

150 pF 2.0V 59 180 225 270

50 pF 4.5V 14 28 35 42 ns

150 pF 4.5V 20 36 45 54

50 pF 6.0V 12 24 30 36 ns

150 pF 6.0V 18 31 39 47

tPHZ, tPLZ Maximum Output Disable Time RL

1 k

2.0V 15 30 38 45 nsCL

50 pF 4.5V 12 25 31 38

6.0V 10 21 27 32

tSMinimum Setup Time 2.0V 6 12 15 18 nsData to Clock 4.5V 20 25 30

6.0V 17 21 25

tHMinimum Hold Time 2.0V



15 6 8 nsClock to Data 4.5V 0 0 0

6.0V 0 0 0

tTHL, tTLH Maximum Output Rise CL

50 pF 2.0V 6 12 15 18 nsand Fall Time 4.5V 7 12 15 18

6.0V 6 10 13 15

tWMinimum Clock Pulse Width 2.0V 30 15 20 24 ns4.5V 9 16 20 24

6.0V 8 14 18 20

tr,tfMaximum Clock Input Rise 2.0V 1000 1000 1000 nsand Fall Time 4.5V 500 500 500

6.0V 400 400 400

CPD Power Dissipation Capacitance OC

VCC 5pF

(Note 5) (per latch) OC

GND 58

CIN Maximum Input Capacitance 5 10 10 10 pF

www.fairchildsemi.com 4

MM74HC574

AC Electrical Characteristics (Continued)

Note 5: CPD determines the no load dy namic powe r c onsumptio n, PD

CPD VCC2 f



ICC VCC, and th e no load dyn am ic c urrent cons um ption,

CPD VCC f



ICC.

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guaranteed Limits

COUT Maximum Output 15 20 20 20 pF

Capacitance

5 www.fairchildsemi.com

MM74HC574

Physical Dim ensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

www.fairchildsemi.com 6

MM74HC574

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP ), EIAJ TYPE II, 5.3mm W ide

Package Number M20D

7 www.fairchildsemi.com

MM74HC574

Physical Dim ensions inches (millimeters) unless otherwise noted (Continued)

20-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP), JED EC MO-1 53, 4.4mm Wide

Package Number MTC20

www.fairchildsemi.com 8

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N20A

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent in any componen t of a life support

device or system whose failure to perform can be rea-

sonabl y ex pect ed to cause the fa ilu re of the lif e su pp ort

device or system, or to affect it s safety or effectiveness.

www.fairchildsemi.com

www.onsemi.com

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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