Low Power, 3.6 MHz, Low Noise, Rail-to-
Rail Output, Operational Amplifiers
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2009–2010 Analog Devices, Inc. All rights reserved.
FEATURES
Low power: 180 μA typical
Very low input bias currents: 0.5 pA typical
Low noise: 16 nV/√Hz typical
3.6 MHz bandwidth
Offset voltage: 500 μV typical
Low offset voltage drift: 4 μV/°C maximum
Low distortion: 0.003% THD + N
2.7 V to 5 V single supply or ±1.35 V to ±2.5 V dual supply
Available in very small 2 mm × 2 mm LFCSP packages
APPLICATIONS
Photodiode amplifiers
Sensor amplifiers
Portable medical and instrumentation
Portable audio: MP3s, PDAs, and smartphones
Communications
Low-side current sense
ADC drivers
Active filters
Sample-and-hold
GENERAL DESCRIPTION
The ADA4691-2/ADA4692-2 are dual and the ADA4691-4/
ADA4692-4 are the quad rail-to-rail output, single-supply
amplifiers featuring low power, wide bandwidth, and low noise.
The ADA4691-2 has two independent shutdown pins, allowing
further reduction in supply current. The ADA4691-4 is a quad
with dual shutdown pins each controlling a pair of amplifiers
and is available in the 16-lead LFCSP. The ADA4692-4 is a quad
version without shutdown.
These amplifiers are ideal for a wide variety of applications.
Audio, filters, photodiode amplifiers, and charge amplifiers, all
benefit from this combination of performance and features.
Additional applications for these amplifiers include portable
consumer audio players with low noise and low distortion that
provide high gain and slew rate response over the audio band at
low power. Industrial applications with high impedance sensors,
such as pyroelectric and IR sensors, benefit from the high
impedance and low 0.5 pA input bias, low offset drift, and
enough bandwidth and response for low gain applications.
The ADA4691/ADA4692 family is fully specified over the extended
industrial temperature range (−40°C to +125°C). e ADA4691-2
is available in a 10-lead LFCSP and a 9-ball WLCSP. The ADA4692-2
is available in an 8-lead SOIC and 8-lead LFCSP. The ADA4691-4 is
available in a 16-lead LFCSP. The ADA4692-4 is available in a 14-lead
TSSOP. For pin configurations, see the Pin Configurations section.
1
0.1
0.01
0.00110 100 1k 10k 20k
THD + N (%)
FREQUENCY ( Hz)
ADA4692-2
V
SY
= ±2.5V
A
V
= –1
T
A
= 25°C
07950-142
R
L
= 600Ω
R
L
= 2kΩ
Figure 1. THD + Noise vs. Frequency
–
80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k
CHANNEL SEPARAT ION ( dB)
FREQUENCY (Hz)
07950-141
ADA4692-2
V
SY
= ±2.5V
V
IN
= 2. 8V p - p
A
V
= +1
T
A
= 25°C
Figure 2. Channel Separation vs. Frequency
Table 1.
Micropower Low Power Low Power with Shutdown Standard Op Amp With Shutdown High Bandwidth
Single AD8613 AD8591 AD8691
Dual AD8617 ADA4692-2 ADA4691-2 AD8592 AD8692
Quad AD8619 ADA4692-4 ADA4691-4 AD8594 AD8694
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—2.7 V Operation ............................ 3
Electrical Characteristics—5 V Operation................................ 4
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution...................................................................................6
Pin Configurations............................................................................7
Typical Performance Characteristics ..............................................8
Shutdown Operation...................................................................... 16
Input Pin Characteristics........................................................... 16
Input Threshold.......................................................................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 20
REVISION HISTORY
11/10—Rev. C to Rev. D
Changed 5 V to 6 V in Endnote 2, Table 4.................................... 6
12/09—Rev. B to Rev. C
Added ADA4691-4, 16-Lead LFCSP .......................... Throughout
Added Figure 1, Figure 2, and Table 1; Renumbered
Sequentially ....................................................................................... 1
Changes to Applications Section and General Description
Section................................................................................................ 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 4............................................................................ 6
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 20
9/09—Rev. A to Rev. B
Added ADA4691-2, 9-Ball WLCSP; ADA4692-2, 8-Lead
LFCSP; and ADA4692-4, 14-Lead TSSOP................. Throughout
Changes to General Description .................................................... 1
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide .......................................................... 17
6/09—Rev. 0 to Rev. A
Added ADA4691-2, 10 Lead LFCSP........................... Throughout
Changes to Table 1.............................................................................3
Changes to Table 2.............................................................................4
Changes to Captions for Figure 40, Figure 41, Figure 43, and
Figure 44 .......................................................................................... 13
Added Shutdown Operations Section ......................................... 15
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide.......................................................... 16
3/09—Revision 0: Initial Version
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—2.7 V OPERATION
VSY = 2.7 V, VCM = VSY/2, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
CM = −0.3 V to +1.6 V 0.5 2.5 mV
Dual (ADA469x-2) VCM = −0.1 V to +1.6 V; −40°C < TA < +125°C 3.5 mV
Quad (ADA469x-4) VCM = −0.1 V to +1.6 V; −40°C < TA < +125°C 4.0 mV
Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 1 4 μV/°C
Input Bias Current IB 0.5 5 pA
−40°C < TA < +125°C 360 pA
Input Offset Current IOS 1 8 pA
−40°C < TA < +125°C 225 pA
Input Voltage Range −40°C < TA < +125°C −0.3 +1.6 V
Common-Mode Rejection Ratio CMRR VCM = −0.3 V to +1.6 V 70 90 dB
V
CM = −0.1 V to +1.6 V; −40°C < TA < +125°C 62 dB
Large Signal Voltage Gain AVO R
L = 2 kΩ, VOUT = 0.5 V to 2.2 V 90 100 dB
−40°C < TA < +85°C 80 dB
−40°C < TA < +125°C 63 dB
R
L = 600 Ω, VOUT = 0.5 V to 2.2 V 85 95 dB
Input Capacitance CIN
Differential Mode CINDM 2.5 pF
Common Mode CINCM 7 pF
Logic High Voltage (Enabled) VIH −40°C < TA < +125°C 1.6 V
Logic Low Voltage (Power-Down) VIL −40°C < TA < +125°C 0.5 V
Logic Input Current (Per Pin) IIN −40°C < TA < +125°C, 0 V ≤ VSD ≤ 2.7 V 1 μA
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
L = 2 kΩ to GND 2.65 2.67 V
−40°C < TA < +125°C 2.6 V
R
L = 600 Ω to GND 2.55 2.59 V
−40°C < TA < +125°C 2.5 V
Output Voltage Low VOL R
L = 2 kΩ to VSY 24 30 mV
−40°C < TA < +125°C 40 mV
R
L = 600 Ω to VSY 78 95 mV
−40°C < TA < +125°C 130 mV
Short-Circuit Current ISC V
OUT = VSY or GND ±15 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = −100 372 Ω
Output Pin Leakage Current −40°C < TA < +125°C, shutdown active, VSD = VSS 10 nA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 80 90 dB
−40°C < TA < +125°C 75 dB
Supply Current Per Amplifier ISY V
OUT = VSY/2 165 200 μA
−40°C < TA < +125°C 240 μA
Supply Current Shutdown Mode ISD All amplifiers shut down, VSD = VSS 10 nA
−40°C < TA < +125°C 2 μA
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 4 of 20
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
Slew Rate SR RL = 600 Ω, CL = 20 pF, AV = +1 1.1 V/μs
R
L = 2 kΩ, CL = 20 pF, AV = +1 1.4 V/μs
Settling Time to 0.1% tS Step = 0.5 V, RL = 2 kΩ, 600 Ω 1 μs
Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = +1 3.6 MHz
Phase Margin ΦM R
L = 1 MΩ, CL = 35 pF, AV = +1 49 Degrees
Turn-On/Turn-Off Time RL = 600 Ω 1 μs
NOISE PERFORMANCE
Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.009 %
AV = −1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.15 V rms 0.01 %
A
V = +1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.006 %
AV = +1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.15 V rms 0.009 %
Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3.1 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
f = 10 kHz 13 nV/√Hz
ELECTRICAL CHARACTERISTICS—5 V OPERATION
VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise specified.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
CM = −0.3 V to +3.9 V 0.5 2.5 mV
Dual (ADA469x-2) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 3.5 mV
Quad (ADA469x-4) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 4.0 mV
Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 1 4 μV/°C
Input Bias Current IB 0.5 5 pA
−40°C < TA < +125°C 360 pA
Input Offset Current IOS 1 8 pA
−40°C < TA < +125°C 260 pA
Input Voltage Range −40°C < TA < +125°C −0.3 +3.9 V
Common-Mode Rejection Ratio CMRR VCM = −0.3 V to +3.9 V 75 98 dB
V
CM = −0.1 V to +3.9 V; −40°C < TA < +125°C 68 dB
Large Signal Voltage Gain AVO R
L = 2 kΩ, VO = 0.5 V to 4.5 V, VCM = 0 V 95 110 dB
−40°C < TA < +85°C 80 dB
−40°C < TA < +125°C 70 dB
R
L = 600 Ω, VO = 0.5 V to 4.5 V, VCM = 0 V 90 100 dB
Input Capacitance
Differential Mode CINDM 2.5 pF
Common Mode CINCM 7 pF
Logic High Voltage (Enabled) VIH −40°C < TA < +125°C 2.0 V
Logic Low Voltage (Power-Down) VIL −40°C < TA < +125°C 0.8 V
Logic Input Current (Per Pin) IIN −40°C < TA < +125°C, 0 V ≤ VSD ≤ 2.7 V 1 μA
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 5 of 20
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
L = 2 kΩ 4.95 4.97 V
−40°C ≤ TA ≤ +125°C 4.90 V
R
L = 600 Ω to GND 4.85 4.88 V
−40°C ≤ TA ≤ +125°C 4.80 V
Output Voltage Low VOL R
L = 2 kΩ 30 35 mV
−40°C ≤ TA ≤ +125°C 50 mV
R
L = 600 Ω 100 110 mV
−40°C ≤ TA ≤ +125°C 155 mV
Short-Circuit Limit ISC V
OUT = VSY or GND ±55 mA
Closed-Loop Output Impedance ZOUT ADA4691-2, f = 1 MHz, AV = −100 364 Ω
ADA4691-2, f = 1 MHz, AV = −100 246 Ω
Output Pin Leakage Current −40°C < TA < +125°C, shutdown active, VSD = VSS 10 nA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 2.7 V to 5.5 V 80 90 dB
−40°C ≤ TA ≤ +125°C 75 dB
Supply Current Per Amplifier ISY V
OUT = VSY/2 180 225 μA
−40°C ≤ TA ≤ +125°C 275 μA
Supply Current Shutdown Mode ISD All amplifiers shut down, VSD = VSS 10 nA
−40°C ≤ TA ≤ +125°C 2 μA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ, 600 Ω, CL = 20 pF, AV = +1 1.3 V/μs
Settling Time to 0.1% tS V
IN = 2 V step, RL = 2 kΩ or 600 Ω 1.5 μs
Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = +1 3.6 MHz
Phase Margin ΦM R
L = 1 MΩ, CL = 35 pF, AV = +1 52 Degrees
Turn-On/Turn-Off Time RL = 600 Ω 1 μs
NOISE PERFORMANCE
Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.8 V rms 0.006 %
AV = −1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.8 V rms 0.008 %
AV = +1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.8 V rms 0.001 %
AV = +1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.8 V rms 0.003 %
Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3.2 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
e
n f = 10 kHz 13 nV/√Hz
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage 6 V
Input Voltage VSS − 0.3 V to VDD + 0.3 V
Input Current1 ±10 mA
Shutdown Pin Rise/Fall Times 50 μs maximum
Differential Input Voltage2 ±VSY
Output Short-Circuit Duration to GND Indefinite
Temperature
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
1 Input pins have clamp diodes to the supply pins. Limit the input current to
10 mA or less whenever the input signal exceeds the power supply rail by 0.3 V.
2 Differential input voltage is limited to 6 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages and
measured using a standard 4-layer board, unless otherwise
specified.
Table 5. Thermal Resistance
Package Type θJA θ
JC Unit
8-Lead SOIC_N (R-8) 120 45 °C/W
8-Lead LFCSP (CP-8-6) 125 40 °C/W
9-Ball WLCSP (CB-9-3) 77 N/A1 °C/W
10-Lead LFCSP (CP-10-11) 115 40 °C/W
16-Lead LFCSP (CP-16-22) 75 12 °C/W
14-Lead TSSOP (RU-14) 112 35 °C/W
1 N/A = not applicable.
ESD CAUTION
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 7 of 20
PIN CONFIGURATIONS
ADA4691-2
TOP VIEW
(BAL L SI DE DOW N)
Not t o Scale
07950-058
BALL A1
CORNER
A1
OUT B V+ OU T A
–IN B SD A/B –IN A
+IN B V– +IN A
B1
C1
A2
B2
C2
A3
B3
C3
Figure 3. 9-Ball Wafer Level Chip Scale WLCSP (CB-9-3)
07950-002
6
7
2
1
3
+IN
A
–IN A
V–
8
+IN B
–IN B
OUT B
5
SD B
4
SD A
TOP VIEW
(No t t o S cale)
ADA4691-2
10
9
OUT
A
V+
Figure 4. 10-Lead, 2 mm × 2 mm LFCSP (CP-10-11)
07950-060
12
11
10
1
3
4
+IN D
V–
+IN C
9–IN C
+IN A
+IN B
2
V+
–IN B
6
SD A/B
5
OUT B
7
SD C/D
8
OUT C
16 –IN A
15 OUT A
14 OUT D
13 –IN D
ADA4691-4
TOP VIEW
(No t t o S cale)
NOTES
1. IT IS RECOMMENDED THAT THE EXPOSED
PAD BE CONNCECT E D TO V–.
Figure 5. 16-Lead, 3 mm × 3 mm LFCSP (CP-16-22)
TOP V IEW
(No t to Scal e)
ADA4692-2
3+IN A
4V–
1OUT A
2–IN A
6 –IN B
5 +IN B
8V+
7OUT B
07950-016
Figure 6. 8-Lead, 2 mm × 2 mm LFCSP (CP-8-6)
OUT A
1
–IN
2
+IN
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4692-2
TOP VIEW
(Not to Scal e)
07950-001
Figure 7. 8-Lead SOIC_N (R-8)
07950-059
1
2
3
4
5
6
7
ADA4692-4
–IN A
+IN A
V+
OUT B
–IN B
+IN B
OUT A
14
13
12
11
10
9
8
–IN D
+IN D
V–
OUT C
–IN C
+IN C
OUT D
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
TOP VIEW
(Not to Scale)
Figure 8. 14-Lead TSSOP (RU-14)
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
350
300
250
200
150
100
50
0–2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0
NUMBER OF AMPLIFIERS
VOS (mV)
ADA4692-2
VSY = 2.7V
TA = 25° C
–0.3V ≤ VCM ≤ +1.6V
SIGNIFIES CENTER
OF BIN
07950-003
Figure 9. Input Offset Voltage Distribution
30
25
20
15
10
5
00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
NUMBER OF AMP LIFIE RS
TCV
OS
(µV/ ° C)
ADA4692-2
V
SY
= ±1. 35V
–40°C < T
A
< +125°C
SIGNIFIE S CENT ER
OF BIN
07950-004
Figure 10. Input Offset Voltage Drift Distribution
2.0
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
–0.5 2.52.01.51.00.50
V
OS
(mV)
V
CM
(V)
ADA4692-2
V
SY
= 2.7V
T
A
= 25°C
07950-005
Figure 11. Input Offset Voltage vs. Common-Mode Voltage
700
600
500
400
300
200
100
0–2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0
NUMBER OF AMPLIFIERS
V
OS
(mV)
ADA4692-2
V
SY
= 5V
T
A
= 25° C
–0.3V ≤ V
CM
≤ +3.9V
SIGNIFIES CENTER
OF BIN
07950-006
Figure 12. Input Offset Voltage Distribution
30
25
20
15
10
5
00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
NUMBER OF AMP LIFIE RS
TCV
OS
(µV/ ° C)
ADA4692-2
V
SY
= ±2.5V
–40°C < T
A
< +125°C
SIGNIFIE S CENT ER
OF BIN
07950-007
Figure 13. Input Offset Voltage Drift Distribution
2.0
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
–0.5 5.02.02.53.03.54.04.51.51.00.50
V
OS
(mV)
V
CM
(V)
ADA4692-2
V
SY
= 5V
T
A
= 25°C
07950-008
Figure 14. Input Offset Voltage vs. Common-Mode Voltage
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 9 of 20
1k
0.01
0.1
1
10
100
25 12511510595857565554535
I
B
(pA)
TEMPERAT URE (°C)
ADA4692-2
V
SY
= ±1.35V
T
A
= 25° C
AVERAG E 20 CHANNE LS
07950-009
Figure 15. Input Bias Current vs. Temperature
1k
0.001
0.01
0.1
1
10
100
02.72.42.11.81.51.20.90.60.3
IB (pA)
VCM (V)
ADA4692-2
VSY = 2.7V
AVERAGE 20 CHANNEL S
TA = 125° C
TA = 85°C
TA = 25°C
07950-010
Figure 16. Input Bias Current vs. Common-Mode Voltage
10k
0.01
0.1
1
10
100
1k
0.001 1001010.10.01
OUTPUT SATURATION V OLTAGE (mV)
ILOAD (mA)
ADA4692-2
VSY = ±1.35V
VOH = (V+) – VOUT
(SOURCING)
07950-011
TA = +125 °C
TA = +85°C
TA = +25°C
TA = –40°C
Figure 17. Output Voltage (VOH) to Supply Rail vs. Load Current
1k
0.01
0.1
1
10
100
25 12511510595857565554535
IB (pA)
TEMPERAT URE (°C)
ADA4692-2
VSY = ±2.5V
TA = 25° C
AVERAG E 20 CHANNE LS
07950-012
Figure 18. Input Bias Current vs. Temperature
1k
0.01
0.1
1
10
100
054.54.03.53.02.52.01.51.00.5
IB (pA)
VCM (V) .0
ADA4692-2
VSY = 5V
AVERAG E 20 CHANNEL S
TA = 125°C
TA = 85°C
TA = 25°C
07950-013
Figure 19. Input Bias Current vs. Common-Mode Voltage
10k
0.01
0.1
1
10
100
1k
0.001 1001010.10.01
OUTPUT SATURATION V OLTAGE (mV)
ILOAD (mA)
ADA4692-2
VSY = ±2.5V
VOH = (V+) – VOUT
(SOURCING)
07950-014
TA = +125°C
TA = –40°C
TA = +25°C
TA = +85°C
Figure 20. Output Voltage (VOH) to Supply Rail vs. Load Current
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 10 of 20
10k
0.01
0.1
1
10
100
1k
0.001 1001010.10.01
OUT P UT SAT URAT IO N V OLTAGE ( mV )
ILOAD (mA)
ADA4692-2
VSY = ±1.35V
VOL = VOUT – (V–)
(SINKING)
07950-015
TA = +125°C
TA = +85°C
TA = +25°C
TA = –40°C
Figure 21. Output Voltage (VOL) to Supply Rail vs. Load Current
120
100
80
60
40
20
0
–20
–40
–60
120
100
80
60
40
20
0
–20
–40
–60
1k 10M1M100k10k
GAIN (dB)
PHASE ( Degrees)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
A
V
= –1
C
L
= 20pF
C
L
= 200pF
07950-021
Figure 22. Open-Loop Gain and Phase vs. Frequency
50
–30
–20
–10
0
10
20
30
40
10 100 1k 10k 100k 1M 10M
GAIN (dB)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
R
L
= 600Ω
A
V
= +100
A
V
= +10
A
V
= +1
07950-022
Figure 23. Closed-Loop Gain vs. Frequency
10k
0.01
0.1
1
10
100
1k
0.001 1001010.10.01
OUT P UT SAT URAT IO N V OLTAGE ( mV )
I
LOAD
(mA)
ADA4692-2
V
SY
= ±2.5V
V
OL
= V
OUT
– (V–)
(SINKING)
07950-018
T
A
= +125°C
T
A
= –40°C
T
A
= +25°C
T
A
= +85°C
Figure 24. Output Voltage (VOL) to Supply Rail vs. Load Current
120
100
80
60
40
20
0
–20
–40
–60
120
100
80
60
40
20
0
–20
–40
–60
1k 10M1M100k10k
GAIN (dB)
PHASE ( Degrees)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
A
V
= –1
C
L
= 20pF
C
L
= 200pF
07950-024
Figure 25. Open-Loop Gain and Phase vs. Frequency
50
–30
–20
–10
0
10
20
30
40
10 100 1k 10k 100k 1M 10M
GAIN (dB)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
R
L
= 600Ω
A
V
= +100
A
V
= +10
A
V
= +1
07950-025
Figure 26. Closed-Loop Gain vs. Frequency
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 11 of 20
1k
0.01
0.1
1
10
100
100 1k 10k 100k 1M 10M
Z
OUT
(Ω)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
A
V
= –100
A
V
= –10
A
V
= –1
07950-023
Figure 27. Output Impedance vs. Frequency
120
100
80
60
40
20
0
100 1k 10k 100k 1M 10M
CMRR (d B)
FREQUENCY (Hz)
07950-027
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
Figure 28. CMRR vs. Frequency
100
80
60
40
20
–20
0
100 1k 10k 100k 1M 10M
PSRR (dB)
FREQUENCY (Hz)
PSRR+
PSRR–
07950-028
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
Figure 29. PSRR vs. Frequency
1k
0.01
0.1
1
10
100
100 1k 10k 100k 1M 10M
Z
OUT
(Ω)
FREQUENCY (Hz)
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
A
V
= –100
A
V
= –10
A
V
= –1
07950-026
Figure 30. Output Impedance vs. Frequency
120
100
80
60
40
20
0
100 1k 10k 100k 1M 10M
CMRR (d B)
FREQUENCY (Hz)
07950-030
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
Figure 31. CMRR vs. Frequency
100
80
60
40
20
–20
0
100 1k 10k 100k 1M 10M
PSRR (dB)
FREQUENCY (Hz)
PSRR–
PSRR+
07950-031
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
Figure 32. PSRR vs. Frequency
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 12 of 20
1k
100
100.1 1 10 100 1k 10k
VOLTAGE NO ISE DENS IT Y (nV / Hz)
FREQUENCY ( Hz)
ADA4692-2
V
SY
= ±1.35V
T
A
= 25°C
07950-029
Figure 33. Voltage Noise Density vs. Frequency
50
0
5
10
15
20
25
30
35
40
45
10 100 1k
OVERSHOOT (%)
CAPACITANCE (pF)
ADA4692-2
V
SY
= ±1.35V
V
IN
= 100mV p-p
A
V
= +1
R
L
= 2kΩ
T
A
= 25°C
OVERSHOOT+
OVERSHOOT–
07950-033
Figure 34. Small Signal Overshoot vs. Load Capacitance
TIME (2µs/DIV)
OUTPUT (500mV/DIV)
ADA4692-2
VSY = ± 1.35V
GAIN = +1
RL = 2kΩ
CL = 300pF
TA = 25°C
07950-034
Figure 35. Large Signal Transient Response
1k
100
100.1 1 10 100 1k 10k
VOLTAGE NO ISE DENS IT Y (nV / Hz)
FREQUENCY ( Hz)
07950-032
ADA4692-2
V
SY
= ±2.5V
T
A
= 25°C
Figure 36. Voltage Noise Density vs. Frequency
45
0
5
10
15
20
25
30
35
40
10 100 1k
OVERSHOOT (%)
CAPACITANCE (pF)
ADA4692-2
V
SY
= ±2.5V
V
IN
= 100mV p-p
A
V
= +1
R
L
= 2kΩ
T
A
= 25°C
OVERSHOOT+
OVERSHOOT–
07950-036
Figure 37. Small Signal Overshoot vs. Load Capacitance
ADA4692-2
VSY = ±2.5V
GAIN = +1
RL = 2kΩ,
CL = 300p F
TA = 25°C
07950-037
TIME (2µs/DIV)
OUTPUT (500mV/DIV)
Figure 38. Large Signal Transient Response
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 13 of 20
ADA4692-2
V
SY
= ±1.35V
GAIN = +1
R
L
= 2kΩ
C
L
= 200pF
T
A
= 25°C
07950-035
TIME (2µs/DIV)
OUT P UT (20mV /DIV )
Figure 39. Small Signal Transient Response
ADA4692-2
V
SY
= ±1.35V
GAIN = +1M
T
A
= 25°C
0
7950-040
TI ME ( 1s/DIV)
OUTPUT (1µV/DIV)
Figure 40. 0.1 Hz to 10 Hz Noise
250
200
150
100
50
005.04.54.03.53.02.52.01.51.00.5
I
SY
/CHANNEL (µ A)
V
SY
(V)
ADA4692-2
07950-135
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
Figure 41. Supply Current per Amplifier vs. Supply Voltage
T
ADA4692-2
V
SY
= ±2.5V
GAIN = +1
R
L
= 2kΩ
C
L
= 200pF
T
A
= 25°C
07950-038
TIME (2µs/DIV)
OUT P UT (20mV/DI V )
Figure 42. Small Signal Transient Response
ADA4692-2
V
SY
= ±2.5V
GAIN = +1M
T
A
= 25°C
07950-043
TI M E (1s/DIV)
OUTPUT (1µV/DIV)
Figure 43. 0.1 Hz to 10 Hz Noise
250
225
200
175
150
125
–40 1251109580655035205–10–25
I
SY
/AMPLIFIER (µA)
TEMPERATURE (°C)
ADA4692-2
V
SY
= ±2.5V
V
SY
= ±1.35V
07950-138
Figure 44. Supply Current per Channel vs. Temperature
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 14 of 20
1
0.1
0.01
0.00110 100 1k 10k 20k
THD + N ( %)
FREQUENCY ( Hz)
ADA4692-2
V
SY
= ±1.35V
A
V
= –1
T
A
= 25°C
07950-042
R
L
= 600Ω
R
L
= 2kΩ
Figure 45. THD + Noise vs. Frequency
ADA4692-2
VSY = ± 1.35V
TA = 25°C
07950-050
TIME (4µs/DIV)
50mV/DIV
1V/DIV
Figure 46. Positive Overload Recovery
ADA4692-2
VSY = ±1.35V
TA = 25°C
07950-052
TIME (4µs/DIV)
50mV/DIV
1V/DIV
Figure 47. Negative Overload Recovery
1
0.1
0.01
0.00110 100 1k 10k 20k
THD + N ( %)
FREQUENCY ( Hz)
ADA4692-2
VSY = ±2.5V
AV = –1
TA = 25°C
07950-045
RL = 600Ω
RL = 2kΩ
Figure 48. THD + Noise vs. Frequency
ADA4692-2
VSY = ±2.5V
AV = –100
TA = 25°C
07950-051
TIME (4µs/DIV)
50mV/DIV
1V/DIV
Figure 49. Positive Overload Recovery
ADA4692-2
VSY = ±2.5V
AV = –100
TA = 25°C
07950-053
TIME (4µs/DIV)
50mV/DIV
1V/DIV
Figure 50. Negative Overload Recovery
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 15 of 20
ADA4692-2
VSY = ±1.35V
RL = 2kΩ
TA = 25°C
07950-054
TIME (1µs/DIV)
200mV/DIV
10mV/DIV
ERROR BAND
Figure 51. Positive Settling Time to 0.1%
07950-056
TIME (1µs/DIV)
200mV/DIV
10mV/DIV
ERROR BAND
ADA4692-2
VSY = ±1.35V
RL = 2kΩ
TA = 25°C
Figure 52. Negative Settling Time to 0.1%
–
80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k
CHANNEL SEPARAT ION ( dB)
FREQUENCY (Hz)
07950-140
ADA4692-2
VSY = ±2.5V
VIN = 2.8V p-p
AV = +1
TA = 25°C
V–
V+
V–
V+
U2 R2
1kΩ
R1
100kΩ
6
7
5
V+
V–
V+
V–
000
0
+
–
V
IN
R3
600Ω
U1
2
3
CS ( d B) = 2 0 log (V
OUT
/100 = V
IN
)
Figure 53. Channel Separation (CS) vs. Frequency
07950-055
TIME (1µs/DIV)
1V/DIV
20mV/DIV
ERROR BAND
ADA4692-2
VSY = ±2.5V
RL = 2kΩ
TA = 25°C
Figure 54. Positive Settling Time to 0.1%
07950-057
TIME (1µs/DIV)
1V/DIV
20mV/DIV
ERROR BAND
ADA4692-2
VSY = ±2.5V
RL = 2kΩ
TA = 25°C
Figure 55. Negative Settling Time to 0.1%
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 16 of 20
SHUTDOWN OPERATION
INPUT PIN CHARACTERISTICS
The ADA4691-2 has a classic CMOS logic inverter input for each
shutdown pin, as shown in Figure 56.
0
7950-149
V
DD
P-CHANNEL
N-CHANNEL
INPUT
OUTPUT
Figure 56. CMOS Inverter
With slowly changing inputs, the top transistor and bottom
transistor may be slightly on at the same time, increasing the
supply current. This can be avoided by driving the input with
a digital logic output having fast rise and fall times. Figure 57
through Figure 59 show the supply current for both sections
switching simultaneously with rise times of 1 μs, 10 μs, and 1 ms.
Clearly, the rise and fall times should be faster than 10 μs.
Using an RC time constant to enable/disable shutdown is not
recommended.
07950-150
TI M E ( 400µ s/ DIV)
I
SY
= 196mV /1k = 196µA
SD A, SD B
DUT OUTP UT
Figure 57. Shutdown Pin Rise Time = 1 μs
07950-151
TI M E ( 400µ s/ DIV)
I
SY
= 192mV /1k = 196µA
SD A, SD B
DUT OUTP UT
Figure 58. Shutdown Pin Rise Time = 10 μs
07950-152
TI M E ( 400µ s/ DIV)
I
SY
= 724mV/1k = 724µA
SD A, SD B
DUT OUTPUT
Figure 59. Shutdown Pin Rise Time = 1 ms
INPUT THRESHOLD
The input threshold is approximately 1.2 V above the V− pin when
operating on ground and 5 V and 0.9 V when operating on 2.7 V
(see Figure 60 and Figure 61). The threshold is relatively stable
over temperature. For operation on split supplies, the logic swing
may have to be level shifted.
500
450
400
350
300
250
200
150
100
50
0054.54.03.53.02.52.01.51.00.5
I
SY
(µA)
SD VOLTAGE (V) .0
ADA4691-2
T
A
= 25°C
V
SY
= 5V
07950-155
T
A
= +125°C
T
A
= +25°C
T
A
= –40°C
T
A
= +85°C
Figure 60. Supply Current vs. Temperature, VSY = 5 V
300
250
200
150
100
50
0022.42.11.81.51.20.90.60.3
I
SY
(µA)
SD VOLTAGE (V) .7
ADA4691-2
V
SY
= 2.7V
07950-156
T
A
= +125°C
T
A
= –40°C
T
A
= +85°C
T
A
= +25°C
Figure 61. Supply Current vs. Temperature, VSY = 2.7 V
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 17 of 20
OUTLINE DIMENSIONS
3.10
3.00 SQ
2.90
0.30
0.23
0.18
1.75
1.60 SQ
1.45
08-16-2010-E
1
0.50
BSC
BOTTOM VIEWTOP VIEW
16
5
8
9
1213
4
EXPOSED
PAD
PIN1
INDICATOR
0.50
0.40
0.30
SEATING
PLANE
0.05 MAX
0.02 NOM
0.20 REF
0.25 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.80
0.75
0.70
COMPLIANT
TO
JEDEC STANDARDS MO-220-WEED-6.
Figure 62. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
3 mm × 3 mm Body, Very Very Thin Quad
(CP-16-22)
Dimensions shown in millimeters
0
91709-A
1.250
1.210
1.170
0.645
0.600
0.555
BOTTOM VIEW
(BALL SIDE UP)
TOP VIEW
(BALL SIDE DOWN)
A
123
B
C
0.230
0.200
0.170
0.287
0.267
0.247
SEATING
PLANE
0.415
0.400
0.385
BALL A1
IDENTIFIER 1.260
1.220
1.180
0.05 NOM
COPLANARITY
0.40
BSC
Figure 63. 9-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-9-3)
Dimensions shown in millimeters
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 18 of 20
081308-D
TOP VI EW
1091
3
4
5
6
8
0.30
0.25
0.18
BOTTOM VIEW
PIN 1 INDEX
AREA
2.00
BSC SQ
SEATING
PLANE
0.60
0.55
0.50
0.20 REF
0.05 M A X
0.02 NOM
0.50
0.45
0.40
0.50
BSC
PIN 1
INDICATOR
COPLANARITY
0.05
Figure 64. 10-Lead Lead Frame Chip Scale Package [LFCSP_UQ]
2 mm × 2 mm Body, Ultra Thin Quad
(CP-10-11)
Dimensions shown in millimeters
062409-A
TOP VIEW
8
1
5
4
0.30
0.25
0.18
BOTTOM VIEW
PIN 1 INDEX
AREA
2.00
BSC SQ
SEATING
PLANE
0.60
0.55
0.50
0.20 REF
0.05 MAX
0.02 NOM
0.65
0.60
0.55
0.50 BSC
PIN1
INDICATOR
Figure 65. 8-Lead Lead Frame Chip Scale Package [LFCSP_UD]
2 mm × 2 mm Body, Ultra Thin, Dual Lead
(CP-8-6)
Dimensions shown in millimeters
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 19 of 20
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 66. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
COMP LI ANT TO JEDE C S TANDARDS MO -153-AB-1
061908-A
8°
0°
4.50
4.40
4.30
14 8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65 BS C
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09 0.75
0.60
0.45
COPLANARITY
0.10
SEATING
PLANE
Figure 67. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4
Rev. D | Page 20 of 20
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADA4691-2ACBZ-R7 −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C
ADA4691-2ACBZ-RL −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C
ADA4691-2ACPZ-R7 −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2
ADA4691-2ACPZ-RL −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2
ADA4691-4ACPZ-R2 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4691-4ACPZ-R7 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4691-4ACPZ-RL −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4692-2ACPZ-R7 −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3
ADA4692-2ACPZ-RL −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3
ADA4692-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
ADA4692-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP RU-14
1 Z = RoHS Compliant Part.
©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07950-0-11/10(D)
