DMN1250UFEL-7 - Diodes Incorporated Texas Instruments Sanken Sanken Diodes Incorporated Rohm Semiconductor

DMN1250UFEL

N-CHANNEL ENHANCEMENT MODE MOSFET

Features

• Low Gate Charge

• RDS(ON): 280mΩ @ VGS = 4.5V (Single MOSFET)

• 8 N-Channel MOSFET in One Package

• Common Source

• Small Footprint 1.5mm × 1.5mm

• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

• Halogen and Antimony Free. “Green” Device (Note 3)

• Qualified to AEC-Q101 Standards for High Reliability

Mechanical Data

• Case: U-QFN1515-12

• Case Material—Molded Plasti c, “Green” Molding

Compound. UL Flammabilit y Classification Rating 94V-0

• Moisture Sensitivi t y: Level 1 per J-STD-020

• Terminals: Finish—Matte Tin Annealed over Copper Leadframe.

Solderable per MIL-STD-202, Method 208

• Terminal Connecti ons: See Diagram

• Wei ght : 0.004 gram s (Approximate)

Ordering Information (Note 4)

Part Number

Case

Packaging

DMN1250UFEL-7

U-QFN1515-12

3000/Tape & Reel

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.

2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and

Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and

<1000ppm antimony compounds.

4. For packaging details, go to our website at http://www.diodes.com/products/packages.html.

Marking Information

Date Code Key

Year

2014

2015

2016

2017

2018

2019

2020

2021

Code

B

C

D

E

F

G

H

I

Month

Jan

Feb

Mar

Apr

May

Jun

Jul

Aug

Sep

Oct

Nov

Dec

Code

1

2

3

4

5

6

7

8

9

O

N

D

U-QFN1515-12

Bottom View

Equivalent Circui t

A1 = Product Type Marking Code

YM = Date Code Marking

Y = Year (ex:

B = 2014)

M = Month (ex:

8 = August)

S

D3

D8

S

D4

D7

D6

D5

D2

D1

S

G

U-QFN1515-12

DMN1250UFEL

Document number: DS37787 Rev. 4 - 2 1 of 7

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DMN1250UFEL

Maximum Ratings (@TA = +25°C, unless otherwise specifi ed. )

Characteristic

Symbol

Value

Unit

Drain-Source V olt age

VDSS

12 V

Gate-Source Voltage

VGSS

±

8

V

Drain Current (Note 6) Continuous TA = +25°C

T

A

= +70°C

ID 2.0

1.6 A

Pulsed Drain Current (Note 7)

I

DM

10

A

Thermal Characteristics

Characteristic

Symbol

Value

Unit

Total Power Dissipation (Note 5) P

D

0.66 W

Total Power Dissipation (Note 6)

P

D

1.25

W

Thermal Resistance, Junction to Ambient (Note 5)

RϴJA

177

°C/W

Thermal Resistance, Junction to Ambient (Note 6)

RϴJA

100 °C/W

Operating and Storage Tem perature Range

TJ, TSTG

-55 to +150 °C

Notes: 5. Devi ce mounted on 1" × 1", FR-4 PC board with minimum recommended pad layout, and t es t with single MOS FE T.

6. Device mounted on 1" × 1" , FR -4 PC board with 2 oz. copper, and test with s ingle MOSFET .

7. Repetitive Rating, pulse width limited by junction temperature, and test wit h singl e MOSFE T .

Electrical Characteristics (@TA = +25°C, unless otherwise s pecified.)

Characteristic

Symbol

Min

Typ

Max

Unit

Test Condition

STATIC CH AR ACTERIS TI CS

Drain-Source Breakdown Voltage

BVDSS

12

—

V

ID = 250µA, V GS = 0V

Zero Gate Voltage Drain Current

IDSS

—

1 µA

VDS = 12V, VGS = 0V

Gate-Body Leakage Current

IGSS

—

±100 nA

VDS = 0V, VGS = ±8V

Gate Threshold Voltage

VGS(TH)

0.4

—

1

V

VDS = VGS, ID = 250µA

Static Drain-Source On-Resistance (Note 8) RDS(ON)

—

280

450

mΩ

V

GS

= 4 .5V, I

D

= 0.2A

— 360 550 mΩ V

GS

= 2.5V, I

D

= 0.1A

Forward Transfer Admittance |YFS|

—

1 — S VDS = 6V, ID = 0.2A

Diode Forward Voltage (Note 8)

VSD

—

0.8

1.0

V

IS = 0.2A, VGS = 0V

DYNAMIC CH ARACTERISTICS (Note 9)

Input Capacitance

Ciss

—

146

190

pF

VDS = 6V, VGS = 0V

f = 1.0MHz

Output Capacit ance C

oss

— 10 15 pF

Reverse Transfer Capaci t ance C

rss

— 8 13 pF

Gate Resistance RG

—

2.4 — Ω VGS = 0V, VDS = 0V, f = 1 MHz

SWITCHING CHARACTERISTICS (Note 9)

Total Gate Charge

Qg

—

1.3 1.9 nC VGS = 4.5V , VDS = 6V, ID =0.2A

Gate-Source Charge Q

gs

— 0.3 — nC

Gate-Drain Charge Q

gd

— 0.1 — nC

Turn-On Delay Time

tD(ON)

—

1.9

2.7

nS

VDD = 6V, VGS = 4.5V,

RL = 22Ω, RG = 6Ω

Turn-On Rise Time

tR

—

1.3

—

nS

Turn-Off Delay Time

tD(OFF)

—

7.5

11

nS

Turn-Off Fall Time

tF

—

1.0

—

nS

Notes: 8. Test pulse width t = 300ms, test with single MOSFET .

9. Guaranteed by design with single MOSFET, not subject to production testing.

DMN1250UFEL

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DMN1250UFEL

0.0

0.5

1.0

1.5

2.0

2.5

3.0

00.2 0.4 0.6 0.8 11.2 1.4 1.6 1.8 2

ID, DRAIN CURRENT (A)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 1. Typical Output Characteristic

VGS=1.5V

VGS=1.2V

VGS=2.0V

VGS=2.5V

VGS=3.0V

VGS=4.0V

VGS=4.5V

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

00.5 11.5 22.5

ID, DRAIN CURRENT (A)

VGS, GATE-SOURCE VOL TAGE (V)

Figure 2. Typical Transfer Characteristic

VDS= 5V

-55℃

25℃

85℃

150℃

125℃

0

0.3

0.6

0.9

1.2

1.5

0246810 12

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

VGS, GATE-SOURCE VOL TAGE (V)

Figure 4. Typical Transfer Characteristic

ID=200mA

ID=100mA

0

0.1

0.2

0.3

0.4

0.5

0.6

00.2 0.4 0.6 0.8 1

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

ID, DRAIN-SOURCE CURRENT (A)

Figure 3. Typical On-Resistance vs. Drain Current

and Gate Voltage

VGS=2.5V

VGS=4.5V

0.4

0.6

0.8

1

1.2

1.4

1.6

-50 -25 025 50 75 100 125 150

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(NORMALIZED)

TJ, JUNCTION TEMPERATURE (℃)

Figure 6. On-Resistance Variation with Temperature

VGS=4.5V, ID=200mA

VGS=2.5V, ID=100mA

0

0.1

0.2

0.3

0.4

0.5

0.6

00.5 11.5 22.5 3

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

ID, DRAIN CURRENT (A)

Figure 5. Typical On-Res i s tance vs. Drain Current and

Junction Temperature

VGS= 4.5V

-55℃

25℃

85℃

125℃

150℃

DMN1250UFEL

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DMN1250UFEL

0

0.2

0.4

0.6

-50 -25 025 50 75 100 125 150

RDS(ON), DRAIN-SOURCE ON-RESISTANCE

(Ω)

TJ, JUNCTION TEMPERATURE (

℃

)

Figure 7. On-Resistance Variation with Temperature

VGS=2.5V, ID=100mA

VGS=4.5V, ID=200mA

0.4

0.6

0.8

1

1.2

-50 -25 025 50 75 100 125 150

VGS(TH), GATE THRESHO LD VOLTAG E (V)

TJ, JUNCTION TEMPERATURE (℃)

Figure 8. Gate Threshold Variation vs. Junction

Temperature

ID=250μA

ID=1mA

1

10

100

1000

0246810 12

CT, JUNCTION CAPACITANCE (pF)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 10. Typical Junction Capacitance

f=1MHz

Ciss

Coss

Crss

0

0.5

1

1.5

2

2.5

3

00.3 0.6 0.9 1.2 1.5

IS, SOURCE CURRENT (A)

VSD, SOURCE-DRAIN VOLTAGE (V)

Figure 9. Diode Forward Voltage vs. Current

VGS=0V,

TJ=-55℃

VGS=0V,

TJ=25℃

VGS=0V, TJ=85℃

VGS=0V, TJ=125℃

VGS=0V, TJ=150℃

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

00.3 0.6 0.9 1.2 1.5

VGS (V)

Qg (nC)

Figure 11. Gate Charge

VDS=6V, ID=200mA

0.01

0.1

1

10

0.1 110 100

ID, DRAIN CURRENT (A)

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 12. SOA, Safe Operation Area

TJ(MAX)=150℃

TA=25℃

Single Pulse

DUT on 1*MRP board

VGS=4.5V

R

DS(ON)

Limited

DC

PW=10s

PW=1s

PW=100ms

PW=10ms

PW=1ms

PW=100μs

DMN1250UFEL

Document number: DS37787 Rev. 4 - 2 4 of 7

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DMN1250UFEL

0.001

0.01

0.1

1

1E-06 1E-05 0.0001 0.001 0.01 0.1 110 100 1000

r(t), TRANSIEN T THERM AL RESISTANC E

t1, PULSE DURATION TIME (sec)

Figure 13. Transient Thermal Resistance

RθJA(t)=r(t) * RθJA

RθJA=177 ℃/W

Duty Cycle, D=t1 / t2

D=Single Pulse

D=0.005

D=0.01

D=0.02

D=0.05

D=0.1

D=0.3

D=0.5

D=0.7

D=0.9

DMN1250UFEL

Document number: DS37787 Rev. 4 - 2 5 of 7

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DMN1250UFEL

Package Ou t lin e Dim en sio ns

Please see http://www.diodes.com/package-outlines.html for the latest version.

U-QFN1515-12

Dim Min Max Typ

A

0.57

0.63

0.60

A1

0.00

0.05

0.02

A3

0.152 BSC

b

0.15

0.25

0.20

D

1.45

1.55

1.50

D2

0.60

0.80

0.70

E

1.45

1.55

1.50

E2

0.60

0.80

0.70

e

0.40 BSC

L

0.15

0.25

0.20

k

—

0.25

z

—

0.050

All Dimensions in mm

Suggested Pad Layout

Please see http://www.diodes.com/package-outlines.html for the latest version.

U-QFN1515-12

Dimensions

Value

(in mm)

C

0.400

G

0.175

X

0.400

X1

0.700

X2

1.800

Y

0.250

Y1

0.700

Y2

1.450

Y3

1.800

A1 A3

Pin1 ID

Seating Plane

D

E

b

D2

E2

L

e

k

z

A

X

Y1

Y

X1

G

X2

Y3 Y2

C

DMN1250UFEL

Document number: DS37787 Rev. 4 - 2 6 of 7

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DMN1250UFEL

IMPORTANT NOTICE

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,

INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTIO N).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes

without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the

application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or

trademark ri ghts, nor the rights of others. Any Customer or user of this document or products descri bed herein in s uch applicat ions shall assume

all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated

website, harml ess against all damages.

Diodes Incorporated does not warrant or acc ept any li ability whatsoever in respect of any products purchased through unauthor ized sales channel.

Should Customers purchase or use Diodes Incorporat ed products for any unintended or unauthorized application, Customers shall indemnify and

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indirect l y, any claim of personal injury or death associat ed with such unintended or unauthorized appl i cat i on.

Products desc ribed herein may be covered by one or more United S tates, international or f oreign patents pending. Product names an d ma rkings

noted herein may also be covered by one or more United States, international or f orei gn trademarks.

This document is written in English but may be translated into multiple languages for reference. Only the English version of this document i s the

final and determinative f orm at released by Diodes I ncorporat ed.

LIFE SU PP O R T

Diodes Inc orporated products are specifically not authorized for use as critical components in life support devices or systems without the express

written approval of the Chief Executive Off icer of Diodes I ncorporat ed. As us ed herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perf orm when properly used in accordance with inst ruct i ons for use provided in the

labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or to aff ect its safety or effectiveness.

Customers repres ent that they have all necessary expertise i n the safety and regulatory ramif ications of their life support devices or systems, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safet y-relat ed requirements concerning their products and any

use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related

information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its

representati ves against any dam ages arising out of the use of Diodes Incorporat ed products i n such safety-cri tical, life support devices or systems.

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DMN1250UFEL

Document number: DS37787 Rev. 4 - 2 7 of 7

www.diodes.com August 2018