INTEGRATED CIRCUITS DIVISION
IX9908
R02 www.ixysic.com 7
2.2 Soft-Start
Once VCC reaches VVCC_on (typically 18V), t he device
will initiate a soft-st art sequence. This is intended to
minimize the electrical stresses on Q1, D OUT, DVCC,
and the transformer . The soft-start operates as sho wn
in Figure 3. The duration of this soft -start is 12mS
nominal and steps VCS, the current sense voltage, to
four values, as shown.
Figure 3. Soft-Start
2.3 Normal Ope r at io n
Because the IX9908 employs quasi-resonant
operation, its PWM switch-on is set by the z er o
crossing of the auxiliary winding voltage , and the
switch-off is set by the current sense voltage.
2.3.1 Zer o Cro ssing & Switch-On Determination
As the application schematic on Page 1 shows, the
v oltage from the auxiliary winding is connected to the
zero crossing pin, ZCV, through an RC network. This
network provides a dela y so that switch-on can occur
at voltage valley t hus enha ncing eff iciency. The
required time delay, t, should be approximately
one-fourth of the oscillation period (determined by
transformer primary inductor and drain-source
capacitance of Q1) minus the pr opagation delay from
zero-cross detect to Q1 switch-on, tdelay .
This time delay, t, should be matched by adjusting
the RC network.
After Q1 is turned off, its VDS wi ll s h ow some
oscillation. This will also show on the ZCV input. To
avoid a mis-triggered Q1 turn-on, a ringing
suppression circuit is implemented. The suppression
time has two values that depend on t he voltage at
ZCV. If VZCV is greater than 0.7V, then the time is
2.5S nominal. If VZCV is less than 0.7V, then the ti me
is 42S nominal. Turn-on of Q1 can not occur during
the suppression time, but does occur after a
zero-crossing is det ected. I n the case of a missed
zero-crossing, a maximum off-t ime is implemented.
After Q1 has been off for 42S nominal (toffMax), it is
turned back on.
2.3.2 Switch-Off Determination
In the application circuit, the primary current is sensed
by RCS. The voltage across this resistor, VCS, is
applied to the CS input of the device . It is processed
internally, and compared to the voltage at t he VR pin,
which is a scaled version of the rectified line voltage .
When the f ollo wing relation is true, the pow er switch,
Q1, is turned off.
Leading-edge bl anking is used to prevent a false
trigger caused by the voltage spike across RCS at the
moment of Q1 turn-on. This blanking t ime, tBLKCS , is
nominally 330nS. To prevent transf ormer saturatio n, a
maximum on-time circuit is implemented. Max on-time
for Q1 (GD=H) is 30S nominal.
Time (ms)
0123456789 101112131415
VCS_SST (V)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
Maximum Current (Sense Voltage)
During Soft-Start
tRC = CZCV (RZCV1 // RZCV2)