2SJ552(L)/(S) - Hitachi Semiconductor

2SJ552(L),2SJ552(S)

Silicon P Channel MOS FET

High Speed Power Switching

ADE-208-651B (Z)

3rd. Edition

Jun 1998

Features

• Low on-resistance

RDS(on) = 0.042 Ω typ.

• Low drive current.

• 4V gate drive devices.

• High speed switching.

Outline

1. Gate

2. Drain

3. Source

4. Drain

123

LDPAK

2SJ552(L),2SJ552(S)

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Ratings Unit

Drain to source voltage VDSS –60 V

Gate to source voltage VGSS ±20 V

Drain current ID–20 A

Drain peak current ID(pulse)Note1 –80 A

Body-drain diode reverse drain current I DR –20 A

Avalanche current I AP Note3 –20 A

Avalanche energy EAR Note3 34 mJ

Channel dissipation Pch Note2 75 W

Channel temperature Tch 150 °C

Storage temperature Tstg –55 to +150 °C

Note: 1. PW ≤ 10µs, duty cycle ≤ 1 %

2. Value at Tc = 25°C

3. Value at Tch = 25°C, Rg ≥ 50 Ω

Electrical Characteristics (Ta = 25°C)

Item Symbol Min Typ Max Unit Test Conditions

Drain to source breakdown voltage V(BR)DSS –60 — — V ID = –10mA, VGS = 0

Gate to source breakdown voltage V(BR)GSS ±20——V I

G = ±100µA, VDS = 0

Zero gate voltege drain current IDSS — — –10 µAV

DS = –60 V, VGS = 0

Gate to source leak current IGSS ——±10 µAV

GS = ±16V, VDS = 0

Gate to source cutoff voltage VGS(off) –1.0 — –2.0 V ID = –1mA, VDS = –10V

Static drain to source on state RDS(on) — 0.042 0.055 ΩID = –10A, VGS = –10V Note4

resistance RDS(on) — 0.065 0.095 ΩID = –10A, VGS = –4V Note4

Forward transfer admittance |yfs| 1016—S I

D = –10A, VDS = –10V Note4

Input capacitance Ciss — 1750 — pF VDS = –10V

Output capacitance Coss — 800 — pF VGS = 0

Reverse transfer capacitance Crss — 180 — pF f = 1MHz

Turn-on delay time td(on) — 16 — ns VGS = –10V, I D = –10A

Rise time t r— 100 — ns RL = 3Ω

Turn-off delay time td(off) — 230 — ns

Fall time tf— 140 — ns

Body –drain diode forward voltage VDF — –1.0 — V IF = –20A, VGS = 0

Body –drain diode reverse

recovery time trr — 100 — ns IF = –20A, VGS = 0

diF/ dt =50A/ µs

Note: 4. Pulse test

2SJ552(L),2SJ552(S)

Main Characteristics

050 100 150 200

–100

–30

–10

–3

–1

–0.3

–0.1

–0.1 –0.3 –1 –3 –10

–50

–40

–30

–20

–10

0–2 –4 –6 –8 –10

–6 V

–4 V

0 –1–2–3–4–5

–30 –100

–1000

–300

–10 V –4.5 V

–3 V

–50

–40

–30

–20

–10

10 µs

1 ms

Ta = 25 °C

–3.5 V

25 °C

V = –10 V

Pulse Test

Operation in

this area is

limited by R

DS(on)

100 µs

PW = 10 ms (1 shot)

–8 V –5 V

Tc = –25 °C

Channel Dissipation Pch (W)

Case Temperature Tc (°C)

Power vs. Temperature Derating

Drain to Source Voltage V (V)

Drain Current I (A)

Maximum Safe Operation Area

Drain to Source Voltage V (V)

Drain Current I (A)

Typical Output Characteristics

Gate to Source Voltage V (V)

Drain Current I (A)

Typical Transfer Characteristics

Pulse Test

V = –2.5 V

75 °C

DC Operation

(Tc = 25 °C)

2SJ552(L),2SJ552(S)

–2.0

–1.6

–1.2

–0.8

–0.4

0–4 –8 –12 –16 –20

0.2

0.16

0.12

0.08

0.04

–40 0 40 80 120 160

0–10 V

V = –4 V

0.5

0.05

0.02

0.01

–1 –2 –10 –20 –100

–50

–5 A

0.2

0.1

Pulse Test

–0.1 –1 –10 –100

–0.3 –3 –30

100

0.1

0.3

25 °C

Tc = –25 °C

75 °C

V = –10 V

Pulse Test

Gate to Source Voltage V (V)

Drain to Source Saturation Voltage vs.

Gate to Source Voltage

V (V)

DS(on)

Drain to Source Saturation Voltage

Drain Current I (A)

Drain to Source On State Resistance

R ( )Ω

DS(on)

Static Drain to Source on State Resistance

vs. Drain Current

Case Temperature Tc (°C)

R ( )

DS(on)

Static Drain to Source on State Resistance

Ω

Static Drain to Source on State Resistance

vs. Temperature

Drain Current I (A)

Forward Transfer Admittance |y | (S)

Forward Transfer Admittance vs.

Drain Current

–2 A

I = –20 A

–10 A

–5

–5 A

I = –20 A

–5, –10 A –20 A

–10 A

–10 V

V = –4 V

Pulse Test

2SJ552(L),2SJ552(S)

0 –10 –20 –30 –40 –50

10000

3000

1000

300

100

–20

–40

–60

–80

–4

–8

–12

–16

–20–100 16 32 48 64 80

1000

200

500

100

–0.1 –0.3 –1 –10 –30 –100

V = –10 V

–25 V

–50 V

V = 0

f = 1 MHz

Ciss

Coss

Crss

V = –10 V

–25 V

–50 V

–0.1 –0.3 –1 –3 –10 –30 –100

1000

500

200

100

di / dt = 50 A / µs

V = 0, Ta = 25 °C

Capacitance C (pF)

Drain to Source Voltage V (V)

Typical Capacitance vs.

Drain to Source Voltage

Gate Charge Qg (nc)

Drain to Source Voltage V (V)

Gate to Source Voltage V (V)

Dynamic Input Characteristics

Drain Current I (A)

Switching Time t (ns)

Switching Characteristics

Reverse Drain Current I (A)

Reverse Recovery Time trr (ns)

Body–Drain Diode Reverse

Recovery Time

I = –20 A –3

td(on)

td(off)

V = –10 V, V = –30 V

PW = 10 µs, duty < 1 %

GS DD

Pulse Test

2SJ552(L),2SJ552(S)

D. U. T

Monitor

50Ω

Vin

–15 V

(BR)DSS

E = • L • I •

V – V

AR AP DSS

DSS DD

25 50 75 100 125 150

–50

–40

–30

–20

–10

0–0.4 –0.8 –1.2 –1.6 –2.0

V = 0, 5 V

–10 V

–5 V

Pulse Test

I = –20 A

V = –25 V

duty < 0.1 %

Rg > 50

Ω

Repetitive Avalanche Energy E (mJ)

Maximum Avalanche Energy vs.

Channel Temperature Derating

Avalanche Test Circuit Avalanche Waveform

Reverse Drain Current I (A)

Reverse Drain Current vs.

Source to Drain Voltage

Channel Temperature Tch (°C)

Source to Drain Voltage V (V)

2SJ552(L),2SJ552(S)

Vin Monitor

D.U.T.

Vin

–10 V

= –30 V

td(on)

Vin

90% 90%

10%

Vout

td(off)

Vout

Monitor

50Ω

90%

10%

0.3

0.1

0.03

0.01

10 µ 100 µ 1 m 10 m 100 m 1 10

D = PW

ch – c(t) = s (t) • ch – c

ch – c = 1.67 °C/W, Tc = 25 °C

θ γ θ

Tc = 25°C

D = 1

0.5

0.2

0.1

0.05

0.02

0.01

1shot pulse

Switching Time Test Circuit Waveform

Pulse Width PW (S)

Normalized Transient Thermal Impedance

s (t)

Normalized Transient Thermal Impedance vs. Pulse Width

2SJ552(L),2SJ552(S)

Package Dimensions

Unit: mm

10.2 ± 0.3

(1.4)

8.6 ± 0.3

1.27 ± 0.2

1.2 ± 0.2

2.54 ± 0.5

11.3 ± 0.5

(1.5)

0.86+0.2

–0.1

3.0 +0.3

–0.5

0.76 ± 0.1

10.0+0.3

–0.5

2.54 ± 0.5

4.44 ± 0.2 1.3 ± 0.2

2.59 ± 0.2

0.4 ± 0.1

11.0 ± 0.5

10.2 ± 0.3

(1.4)

8.6 ± 0.3

1.27 ± 0.2

2.54 ± 0.5

(1.5)

0.86+0.2

–0.1

10.0+0.3

–0.5

2.54 ± 0.5

4.44 ± 0.21.3 ± 0.2

2.59 ± 0.2

0.4 ± 0.1

1.2 ± 0.2

(1.5)

0.1+0.2

–0.1

L type S type

Hitachi Code

EIAJ

JEDEC

LDPAK

—

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