© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 5 1Publication Order Number:
NTMFS4C09N/D
NTMFS4C09N
Power MOSFET
30 V, 52 A, Single N−Channel, SO−8 FL
Features
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
CPU Power Delivery
DC−DC Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 30 V
Gate−to−Source Voltage VGS ±20 V
Continuous Drain
Current RqJA
(Note 1)
Steady
State
TA = 25°CID16.4 A
TA = 80°C 12.3
Power Dissipation
RqJA (Note 1) TA = 25°C PD2.51 W
Continuous Drain
Current RqJA 10 s
(Note 1)
TA = 25°CID25.3 A
TA = 80°C 19.0
Power Dissipation
RqJA 10 s (Note 1) TA = 25°C PD6.0 W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°CID9.0 A
TA = 80°C 6.8
Power Dissipation
RqJA (Note 2) TA = 25°C PD0.76 W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°CID52 A
TC =80°C 39
Power Dissipation
RqJC (Note 1) TC = 25°C PD25.5 W
Pulsed Drain
Current TA = 25°C, tp = 10 msIDM 146 A
Current Limited by Package TA = 25°C IDmax 80 A
Operating Junction and Storage
Temperature TJ,
TSTG −55 to
+150 °C
Source Current (Body Diode) IS23 A
Drain to Source dV/dt dV/dt7.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL = 29 Apk,
L = 0.1 mH, RGS = 25 W) (Note 3)
EAS 42 mJ
Lead Temperature for Soldering Purposes
(1/8 from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. Parts are 100% tested at TJ = 25°C, VGS = 10 V, IL = 20 Apk, EAS = 20 mJ.
MARKING
DIAGRAMS
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V(BR)DSS RDS(ON) MAX ID MAX
30 V 5.8 mW @ 10 V 52 A
8.5 mW @ 4.5 V
N−CHANNEL MOSFET
G (4)
S (1,2,3)
D (5−8)
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceabililty
4C09N
AYWZZ
1
Device Package Shipping
ORDERING INFORMATION
NTMFS4C09NT1G SO−8 FL
(Pb−Free) 1500 /
Tape & Reel
NTMFS4C09NT3G SO−8 FL
(Pb−Free) 5000 /
Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer t o our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
S
S
S
G
D
D
D
D
NTMFS4C09N
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2
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case (Drain) RqJC 4.9
°C/W
Junction−to−Ambient – Steady State (Note 4) RqJA 49.8
Junction−to−Ambient – Steady State (Note 5) RqJA 164.6
Junction−to−Ambient – (t 10 s) (Note 4) RqJA 21.0
4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
5. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA30 V
Drain−to−Source Breakdown Voltage
(transient) V(BR)DSSt VGS = 0 V, ID(aval) = 8.4 A,
Tcase = 25°C, ttransient = 100 ns 34 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/
TJ14.4 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 24 V TJ = 25°C 1.0 mA
TJ = 125°C 10
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.3 2.1 V
Negative Threshold Temperature Coefficient VGS(TH)/TJ4.8 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 30 A 4.6 5.8 mW
VGS = 4.5 V ID = 18 A 6.8 8.5
Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 50 S
Gate Resistance RGTA = 25°C 0.3 1.0 2.0 W
CHARGES AND CAPACITANCES
Input Capacitance CISS
VGS = 0 V, f = 1 MHz, VDS = 15 V
1252
pF
Output Capacitance COSS 610
Reverse Transfer Capacitance CRSS 126
Capacitance Ratio CRSS/CISS VGS = 0 V, VDS = 15 V, f = 1 MHz 0.101
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 15 V; ID = 30 A
10.9
nC
Threshold Gate Charge QG(TH) 1.9
Gate−to−Source Charge QGS 3.4
Gate−to−Drain Charge QGD 5.4
Gate Plateau Voltage VGP 3.1 V
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A 22.2 nC
SWITCHING CHARACTERISTICS (Note 7)
T urn−On Delay Time td(ON)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
10
ns
Rise Time tr32
T urn−Off Delay Time td(OFF) 16
Fall Time tf6.0
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter UnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS (Note 7)
T urn−On Delay Time td(ON)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
7.0
ns
Rise Time tr28
T urn−Off Delay Time td(OFF) 20
Fall Time tf4.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 10 A TJ = 25°C 0.79 1.1 V
TJ = 125°C 0.65
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
31
ns
Charge Time ta15
Discharge Time tb16
Reverse Recovery Charge QRR 15 nC
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
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4
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
543210
0
10
30
60
70
100
4.03.53.02.01.51.00.50
0
10
20
30
40
60
70
100
Figure 3. On−Resistance vs. Gate−to−Source
Voltage Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)
109876543
0.002
0.004
0.006
0.010
0.012
0.014
0.016
0.026
70605040302010
0.003
0.004
0.005
0.007
0.008
0.009
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
2.8 V
3.0 V
3.2 V
3.4 V
3.6 V
VGS = 2.6 V
3.8 V
4.5 V to 10 V TJ = 25°C
20
40
50
80
90 4.0 V
2.5 4.5
50
VDS = 5 V
TJ = 25°CTJ = −55°C
TJ = 125°C
0.008
0.018
ID = 30 A
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = 25°C
VGS = 10 V
VGS = 4.5 V
0.006
5.0 5.5
80
90
0.020
0.022
0.024
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
1251007550250−25−50
0.7
0.8
0.9
1.1
1.3
1.4
1.5
1.7
Figure 6. Capacitance Variation
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
302520151050
0
200
600
800
1200
1400
RDS(on), NORMALIZED DRAIN−TO
SOURCE RESISTANCE (W)
C, CAPACITANCE (pF)
150
1.0
1.2
1.6 VGS = 10 V
ID = 30 A
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
400
1000
1600
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5
TYPICAL CHARACTERISTICS
QT
Figure 7. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
QG, TOTAL GATE CHARGE (nC)
2220161210420
0
2
4
6
8
10
Figure 8. Resistive Switching Time Variation
vs. Gate Resistance
Figure 9. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
1
10
100
1000
1.00.90.80.70.60.50.4
0
2
6
8
12
14
18
20
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
VGS = 10 V
VDD = 15 V
ID = 30 A
TJ = 25°C
QGS QGD
6 8 14 18 24
VGS = 10 V
VDD = 15 V
ID = 15 A td(off)
td(on)
tf
tr
TJ = 25°C
VGS = 0 V
TJ = 125°C
4
10
16
Figure 10. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1001010.10.01
0.01
0.1
1
10
100
1000
ID, DRAIN CURRENT (A)
0 V < VGS < 10 V
RDS(on) Limit
Thermal Limit
Package Limit
10 ms
100 ms
1 ms
10 ms
dc
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
TJ, STARTING JUNCTION TEMPERATURE (°C)
150125100755025
0
2
6
8
10
16
18
20
Figure 12. GFS vs. ID
ID (A)
252015 301050
0
10
40
50
70
EAS, SINGLE PULSE DRAIN−TO
SOURCE AVALANCHE ENERGY (mJ)
GFS (S)
ID = 20 A
4
12
50454035
20
30
60
80
14
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6
TYPICAL CHARACTERISTICS
Figure 13. Avalanche Characteristics
PULSE WIDTH (sec)
1.E−08
1
10
100
Figure 14. Thermal Response
PULSE TIME (sec)
0.010.0010.00010.000010.000001
0.01
0.1
1
10
100
ID, DRAIN CURRENT (A)
R(t) (°C/W)
0.1 1 10 100 1000
Single Pulse
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
1.E−07 1.E−06 1.E−05 1.E−04 1.E−03
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7
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.270
2X
0.750
1.000
0.905
4.530
1.530
4.5600.495
3.200
1.330
0.965
2X
2X
4X
4X
PITCH
DIMENSIONS: MILLIMETERS
1
RECOMMENDED
M3.00 3.40
q0 −−−
_
3.80
12
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
1234
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 q
D
E
2
2
B
A
0.20 C
0.20 C
2 X
2 X
DIM MIN NOM
MILLIMETERS
A0.90 1.00
A1 0.00 −−
b0.33 0.41
c0.23 0.28
D5.15
D1 4.70 4.90
D2 3.80 4.00
E6.15
E1 5.70 5.90
E2 3.45 3.65
e1.27 BSC
G0.51 0.575
K1.20 1.35
L0.51 0.575
L1 0.125 REF
A
0.10 C
0.10 C
DETAIL A
14
L1
e/2
8X
D2
G
E2
K
b
A0.10 B
C
0.05 c L
DETAIL A
A1
c
4 X
C
SEATING
PLANE
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
M
PIN 5
(EXPOSED PAD)
5.00 5.30
6.00 6.30
e
P
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NTMFS4C09N/D
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