The H11AV1,A and H11AV2,A devices consist of a gallium arsenide infrared
emitting diode optically coupled to a monolithic silicon phototransistor detector.
•Guaranteed 70 Volt V(BR)CEO Minimum
•‘A’ Suffix = 0.400″ Wide Spaced Leadform (Same as ‘T’ Suffix.)
•
To order devices that are tested and marked per VDE 0884 requirements, the
suffix ”V” must be included at end of part number. VDE 0884 is a test option.
Applications
•General Purpose Switching Circuits
•Interfacing and coupling systems of different potentials and impedances
•Monitor and Detection Circuits
•Regulation and Feedback Circuits
•Solid State Relays
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol Value Unit
INPUT LED
Reverse Voltage VR6 Volts
Forward Current — Continuous IF60 mA
LED Power Dissipation @ TA = 25°C
with Negligible Power in Output Detector
Derate above 25°C
PD120
1.41
mW
mW/°C
OUTPUT TRANSISTOR
Collector–Emitter Voltage VCEO 70 Volts
Emitter–Base Voltage VEBO 7 Volts
Collector–Base Voltage VCBO 70 Volts
Collector Current — Continuous IC150 mA
Detector Power Dissipation @ TA = 25°C
with Negligible Power in Input LED
Derate above 25°C
PD150
1.76
mW
mW/°C
TOTAL DEVICE
Isolation Surge Voltage(1)
(Peak ac Voltage, 60 Hz, 1 sec Duration) VISO 7500 Vac(pk)
Total Device Power Dissipation @ TA = 25°C
Derate above 25°CPD250
2.94 mW
mW/°C
Ambient Operating Temperature RangeTA–55 to +100 °C
Storage Temperature RangeTstg –55 to +150 °C
Soldering Temperature (10 sec, 1/16″ from case) TL260 °C
1. Isolation surge voltage is an internal device dielectric breakdown rating.
1. For this test, Pins 1 and 2 are common, and Pins 4, 5 and 6 are common.
GlobalOptoisolator
SCHEMATIC
STANDARD THRU HOLE
PIN 1. LED ANODE
2. LED CATHODE
3. N.C.
4. EMITTER
5. COLLECTOR
6. BASE
1
2
3
6
5
4
61
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)(1)
Characteristic Symbol Min Typ(1) Max Unit
INPUT LED
Forward Voltage (IF = 10 mA) TA = 25°C
TA = –55°C
TA = 100°C
VF0.8
0.9
0.7
1.15
1.3
1.05
1.5
1.7
1.4
Volts
Reverse Leakage Current (VR = 6 V) IR— — 10 µA
Capacitance (V = 0 V, f = 1 MHz) CJ— 18 — pF
OUTPUT TRANSISTOR
Collector–Emitter Dark Current (VCE = 10 V) ICEO — 5 50 nA
Collector–Base Dark Current (VCB = 10 V) ICBO — 0.5 — nA
Collector–Emitter Breakdown Voltage (IC = 1 mA) V(BR)CEO 70 100 — Volts
Collector–Base Breakdown Voltage (IC = 100 µA) V(BR)CBO 70 100 — Volts
Emitter–Collector Breakdown Voltage (IE = 100 µA) V(BR)ECO 7 8 — Volts
DC Current Gain (IC = 2 mA, VCE = 10 V) (Typical Value) hFE — 500 — —
Collector–Emitter Capacitance (f = 1 MHz, VCE = 10 V) CCE — 4.5 — pF
COUPLED
Output Collector Current (IF = 10 mA, VCE = 10 V)
H11AV1, H11AV1A
H11AV2, H11AV2A
IC (CTR)(2) 10 (100)
5 (50) 15 (150)
10 (100) 30 (300)
—
mA (%)
Collector–Emitter Saturation Voltage (IC = 2 mA, IF = 20 mA) VCE(sat) — 0.15 0.4 Volts
Turn–On Time (IC = 2 mA, VCC = 10 V, RL = 100 Ω)(3) ton — 5 15 µs
Turn–Off Time (IC = 2 mA, VCC = 10 V, RL = 100 Ω)(3) toff — 4 15 µs
Isolation Voltage (f = 60 Hz, t = 1 sec)(4) VISO 7500 — — Vac(pk)
Isolation Resistance (V = 500 V)(4) RISO 1011 — — Ω
Isolation Capacitance (V = 0 V, f = 1 MHz)(4) CISO — 0.2 0.5 pF
1. Always design to the specified minimum/maximum electrical limits (where applicable).
2. Current Transfer Ratio (CTR) = IC/IF x 100%.
3. For test circuit setup and waveforms, refer to Figure 11.
4. For this test, Pins 1 and 2 are common, and Pins 4, 5 and 6 are common.
IC, OUTPUT COLLECTOR CURRENT (NORMALIZED)
TYPICAL CHARACTERISTICS
Figure 1. LED Forward Voltage versus Forward Current
2
1.8
1.6
1.4
1.2
11 10 100 1000
10
1
0.1
0.01 0.5 1
IF, LED FORWARD CURRENT (mA) 2 5 10 20 50
IF, LED INPUT CURRENT (mA)
VF, FORWARD VOLTAGE (VOLTS)
25
°
C
100
°
C
TA = –55
°
C
NORMALIZED TO:
IF = 10 mA
Figure 2. Output Current versus Input Current
PULSE ONLY
PULSE OR DC
0.20.1 100
H11AV1,A H11AV2,A
t , TURN–OFF TIME ( s)
off
µ
t , TURN–ON TIME ( s)
on
µ
10
2
0
Figure 3. Collector Current versus
Collector–Emitter Voltage
0
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
4
6
8
10
12
14
1 2 3 4 5 6 7 8 9 10
5 mA
2 mA
1 mA
7
5
2
1
0.7
0.5
0.2
0.1 –60
Figure 4. Output Current versus
Ambient Temperature
–40 –20
C, OUTPUT COLLECTOR CURRENT (NORMALIZED)
0 20 40 60 80 100
TA, AMBIENT TEMPERATURE (
°
C)
I
IF = 10 mA
0
Figure 5. Dark Current versus
Ambient Temperature
10–1
TA, AMBIENT TEMPERATURE (
°
C)
I
102
103
20 40 60 80 100
10 V
CEO, COLLECTOR–EMITTER DARK CURRENT (NORMALIZED)
101
100
VCE = 70 V
t, TIME ( s)
100
50
20
10
5
2
1
0.1 0.2 0.5 1 2 5 10 20 50 100
IF, LED INPUT CURRENT (mA)
µ
tf
tr
tr
tf
Figure 6. Rise and Fall Times
(Typical Values)
RL = 100
RL = 1000
, COLLECTOR CURRENT (mA)I
C
30 V
100
50
20
5
2
1
0.1 0.2 0.5 1 2 5 10 20 50 100
IF, LED INPUT CURRENT (mA)
100
Figure 7. Turn–On Switching Times
RL = 1000
10
10
100
50
20
5
2
1
0.1 0.2 0.5 1 2 5 10 20 50 100
IF, LED INPUT CURRENT (mA)
100
Figure 8. Turn–Off Switching Times
RL = 1000
10
{
{
NORMALIZED TO:
VCE = 10 V
TA = 25
°
C
NORMALIZED TO TA = 25
°
C
VCC = 10 V
VCC = 10 VVCC = 10 V
H11AV1,A H11AV2,A
7
µ
A
6
µ
A
5
µ
A
4
µ
A
3
µ
A
2
µ
A
1
µ
A
4
3
2
1
0 2 4 6 8 10 12 14 16 18 20
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
I ,
C
20
18
16
14
12
10
8
6
4
2
0
CCE
f = 1 MHz
0.5 0.1 0.2 0.5 1 2 5 10 20 50
V, VOLTAGE (VOLTS)
Figure 9. DC Current Gain (Detector Only)
C, CAPACITANCE (pF)
Figure 10. Capacitances versus Voltage
TEST CIRCUIT
VCC = 10 V
INPUT
ICRL = 100
Ω
OUTPUT
WAVEFORMS
10%
90%
ton
TYPICAL COLLECTOR CURRENT (mA)
IB = 8
µ
A
IF = 0
INPUT PULSE
OUTPUT PULSE
tf
toff
tr
Figure 11. Switching Time Test Circuit and Waveforms
CLED
CEB
INPUT CURRENT ADJUSTED
TO ACHIEVE IC = 2 mA.
CCB
H11AV1,A H11AV2,A
PACKAGE DIMENSIONS
THRU HOLE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
STYLE 1:
PIN 1. ANODE
2. CATHODE
3. NC
4. EMITTER
5. COLLECTOR
6. BASE
6 4
1 3
–A–
–B–
SEATING
PLANE
–T–
4 PLF
K
C
N
G
6 PLD
6 PLE
M
A
M
0.13 (0.005) B M
T
L
M
6 PLJ
M
B
M
0.13 (0.005) A M
T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
J0.008 0.012 0.21 0.30
K0.100 0.150 2.54 3.81
L0.300 BSC 7.62 BSC
M0 15 0 15
N0.015 0.100 0.38 2.54
_ _ _ _
SURFACE MOUNT
–A–
–B–
S
SEATING
PLANE
–T–
J
K
L
6 PL
M
B
M
0.13 (0.005) A M
T
C
D6 PL
M
A
M
0.13 (0.005) B M
T
H
G
E6 PL
F4 PL
31
46
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
H0.020 0.025 0.51 0.63
J0.008 0.012 0.20 0.30
K0.006 0.035 0.16 0.88
L0.320 BSC 8.13 BSC
S0.332 0.390 8.43 9.90
H11AV1,A H11AV2,A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
0.4" LEAD SPACING
6 4
1 3
–A–
–B–
N
C
K
G
F4 PL
SEATING
D6 PL
E6 PL
PLANE
–T–
M
A
M
0.13 (0.005) B M
T
L
J
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
J0.008 0.012 0.21 0.30
K0.100 0.150 2.54 3.81
L0.400 0.425 10.16 10.80
N0.015 0.040 0.38 1.02
H11AV1,A H11AV2,A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
www.fairchildsemi.com © 2000 Fairchild Semiconductor Corporation
