General Description
The MAX16821A/MAX16821B/MAX16821C pulse-
width-modulation (PWM) LED driver controllers provide
high output-current capability in a compact package
with a minimum number of external components. The
MAX16821A/MAX16821B/MAX16821C are suitable for
use in synchronous and nonsynchronous step-down
(buck), boost, buck-boost, SEPIC, and Cuk LED drivers. A
logic input (MODE) allows the devices to switch between
synchronous buck and boost modes of operation. These
devices are the first high-power drivers designed specifi-
cally to accommodate common-anode HBLEDs.
The ICs offer average current-mode control that enable
the use of MOSFETs with optimal charge and on-resis-
tance figure of merit, thus minimizing the need for
external heatsinking even when delivering up to 30A of
LED current.
The differential sensing scheme provides accurate con-
trol of the LED current. The ICs operate from a 4.75V to
5.5V supply range with the internal regulator disabled
(VCC connected to IN). These devices operate from a
7V to 28V input supply voltage with the internal regula-
tor enabled.
The MAX16821A/MAX16821B/MAX16821C feature a
clock output with 180° phase delay to control a second
out-of-phase LED driver to reduce input and output fil-
ter capacitor size and to minimize ripple currents. The
wide switching frequency range (125kHz to 1.5MHz)
allows the use of small inductors and capacitors.
Additional features include programmable overvoltage
protection and an output enable function.
Applications
Front Projectors/Rear Projection TVs
Portable and Pocket Projectors
Automotive Exterior Lighting
LCD TVs and Display Backlight
Automotive Emergency Lighting and Signage
Features
oUp to 30A Output Current
oTrue-Differential Remote Output Sensing
oAverage Current-Mode Control
o4.75V to 5.5V or 7V to 28V Input-Voltage Range
o0.1V/0.03V LED Current-Sense Options Maximize
Efficiency (MAX16821B/MAX16821C)
oThermal Shutdown
oNonlatching Output Overvoltage Protection
oLow-Side Buck Mode with or without
Synchronous Rectification
oHigh-Side Buck and Low-Side Boost Mode with or
without Synchronous Rectification
o125kHz to 1.5MHz Programmable/Synchronizable
Switching Frequency
oIntegrated 4A Gate Drivers
oClock Output for 180° Out-of-Phase Operation for
Second Driver
o-40°C to +125°C Operating Temperature Range
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
________________________________________________________________
Maxim Integrated Products
1
Q1
HIGH-FREQUENCY
PULSE TRAIN
C2
Q3
L1
R1
V
LED
C1
7V TO 28V
.
CSP
DL
DH
NOTE: MAXIM PATENT-PENDING TOPOLOGY
PGND
EN
IN
I.C.
OVI
CLP
Q2
MAX16821
Simplified Diagram
19-0881; Rev 1; 3/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Typical Operating Circuit and Selector Guide appear at end
of data sheet.
Ordering Information
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
PART TEMP RANGE PIN-
PACKAGE
MAX16821AATI+ -40°C to +125°C 28 TQFN-EP*
MAX16821BATI+ -40°C to +125°C 28 TQFN-EP*
MAX16821CATI+ -40°C to +125°C 28 TQFN-EP*
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 5V, VDD = VCC, TA= TJ= -40°C to +125°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to SGND.............................................................-0.3V to +30V
BST to SGND..........................................................-0.3V to +35V
BST to LX..................................................................-0.3V to +6V
DH to LX...........................................-0.3V to (VBST - VLX) + 0.3V
DL to PGND................................................-0.3V to (VDD + 0.3V)
VCC to SGND............................................................-0.3V to +6V
VCC, VDD to PGND ...................................................-0.3V to +6V
SGND to PGND .....................................................-0.3V to +0.3V
VCC Current ......................................................................300mA
All Other Pins to SGND...............................-0.3V to (VCC + 0.3V)
Continuous Power Dissipation (TA= +70°C)
28-Pin TQFN 5mm x 5mm (derate 34.5mW/°C
above +70°C) ............................................................2758mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Internal LDO on 7 28
Input-Voltage Range VIN Internal LDO off (VCC connected to VIN) 4.75 5.50 V
Quiescent Supply Current IQVEN = VCC or SGND, no switching 2.7 5.5 mA
LED CURRENT REGULATOR
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821A) 0.594 0.600 0.606
VIN = 7V to 28V, fSW = 500kHz
(MAX16821A) 0.594 0.600 0.606
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821B) 0.098 0.100 0.102
VIN = 7V to 28V, fSW = 500kHz
(MAX16821B) 0.098 0.100 0.102
VIN = VCC = 4.75V to 5.5V, fSW = 500kHz
(MAX16821C) 0.028 0.030 0.032
Differential Set Value
(VSENSE+ to VSENSE-) (Note 2)
VIN = 7V to 28V, fSW = 500kHz
(MAX16821C) 0.028 0.030 0.032
V
Soft-Start Time tSS 1024 Clock
Cycles
STARTUP/INTERNAL REGULATOR
V
C C
U nd er vol tag e Lockout ( U V LO ) UVLO VCC rising 4.1 4.3 4.5 V
UVLO Hysteresis VCC falling 200 mV
VCC Output Voltage VIN = 7V to 28V, ISOURCE = 0 to 60mA 4.85 5.10 5.30 V
MOSFET DRIVER
Output Driver Impedance Low or high output, ISOURCE/SINK = 20mA 1.1 3 Ω
Output Driver Source/Sink Current IDH, IDL 4A
Nonoverlap Time tNO CDH/DL = 5nF 35 ns
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, VDD = VCC, TA= TJ= -40°C to +125°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OSCILLATOR
Switching Frequency Range 125 1500 kHz
RT = 500kΩ120 125 130
RT = 120kΩ495 521 547Switching Frequency fSW
RT = 39.9kΩ1515 1620 1725
kHz
120kΩ < RT ≤ 500kΩ-5 +5
Switching Frequency Accuracy 40kΩ ≤ RT ≤ 120kΩ-8 +8 %
CLKOUT Phase Shift with
Respect to DH (Rising Edges) fSW = 125kHz, MODE connected to SGND 180
CLKOUT Phase Shift with
Respect to DL (Rising Edges) fSW = 125kHz, MODE connected to VCC 180
Degrees
CLKOUT Output-Voltage Low VOL ISINK = 2mA 0.4 V
CLKOUT Output-Voltage High VOH ISOURCE = 2mA 4.5 V
SYNC Input High Pulse Width tSYNC 200 ns
SYNC Input Clock High Threshold VSYNCH 2V
SYNC Input Clock Low Threshold VSYNCL 0.4 V
SYNC Pullup Current ISYNC_OUT VRT/SYNC = 0V 250 500 µA
SYNC Power-Off Level VSYNC_OFF 0.4 V
INDUCTOR CURRENT LIMIT
Average Current-Limit Threshold VCL CSP to CSN 26.4 27.5 33.0 mV
Reverse Current-Limit Threshold VCLR CSP to CSN -2.0 mV
Cycle-by-Cycle Current Limit CSP to CSN 60 mV
Cycle-by-Cycle Overload VCSP to VCSN = 75mV 260 ns
CURRENT-SENSE AMPLIFIER
CSP to CSN Input Resistance RCS 4kΩ
Common-Mode Range VCMR
(
CS
)
VIN = 7V to 28V 0 5.5 V
Input Offset Voltage VOS(CS) 0.1 mV
Amplifier Voltage Gain AV(CS) 34.5 V/V
3dB Bandwidth f3dB 4 MHz
CURRENT-ERROR AMPLIFIER (TRANSCONDUCTANCE AMPLIFIER)
Transconductance gm550 µS
Open-Loop Gain AVL(CE) 50 dB
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, VDD = VCC, TA= TJ= -40°C to +125°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LED CURRENT SIGNAL DIFFERENTIAL VOLTAGE AMPLIFIER (DIFF)
Common-Mode Voltage Range VCMR
(
DIFF
)
0 1.0 V
DIFF Output Voltage VCM VSENSE+ = VSENSE- = 0V 0.6 V
MAX16821A -3.7 +3.7
Input Offset Voltage VOS
(
DIFF
)
MAX16821B/MAX16821C -1.5 +1.5 mV
MAX16821A 0.992 1 1.008
MAX16821B 5.85 6 6.1Amplifier Voltage Gain AV(DIFF)
MAX16821C 18.5 20 21.5
V/V
MAX16821A, CDIFF = 20pF 1.7 MHz
MAX16821B, CDIFF = 20pF 16003dB Bandwidth f3dB
MAX16821C, CDIFF = 20pF 550 kHz
MAX16821A 50 100
MAX16821B 30 60
SENSE+ to SENSE- Input
Resistance RVS
MAX16821C 10 20
kΩ
OUTV AMPLIFIER
Gain-Bandwidth Product VOUTV = 2V 4 MHz
3dB Bandwidth VOUTV = 2V 1 MHz
Output Sink Current 30 µA
Output Source Current 80 µA
Maximum Load Capacitance 50 pF
OUTV to (CSP - CSN) Transfer
Function 4mV ≤ CSP - CSN ≤ 32mV 132.5 135 137.7 V/V
Input Offset Voltage 1mV
VOLTAGE-ERROR AMPLIFIER (EAOUT)
Open-Loop Gain AVOLEA 70 dB
Unity-Gain Bandwidth fGBW 3 MHz
EAN Input Bias Current IB(EA) VEAN = 2V -0.2 +0.03 +0.2 µA
Error Amplifier Output Clamping
Voltage VCLAMP
(
EA
)
With respect to VCM 905 930 940 mV
INPUTS (MODE AND OVI)
MODE Input-Voltage High 2V
MODE Input-Voltage Low 0.8 V
MODE Pulldown Current 456µA
OVI Trip Threshold OVPTH 1.244 1.276 1.308 V
OVI Hysteresis OVIHYS 200 mV
OVI Input Bias Current IOVI VOVI = 1V 0.2 µA
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
_______________________________________________________________________________________ 5
Note 1: All devices are 100% production tested at +25°C. Limits over temperature are guaranteed by design.
Note 2: Does not include an error due to finite error amplifier gain. See the
Voltage-Error Amplifier
section.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, VDD = VCC, TA= TJ= -40°C to +125°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ENABLE INPUT (EN)
EN Input-Voltage High EN rising 2.437 2.5 2.562 V
EN Input Hysteresis 0.28 V
EN Pullup Current IEN 13.5 15 16.5 µA
THERMAL SHUTDOWN
Thermal Shutdown 165 °C
Thermal-Shutdown Hysteresis 20 °C
Typical Operating Characteristics
(VIN = 12V, VDD = VCC = 5V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT (IQ) vs. FREQUENCY
MAX16821A toc01
FREQUENCY (kHz)
SUPPLY CURRENT (mA)
1300900 1100500 700300
1
2
3
4
5
6
7
8
9
10
0
100 1500
VIN = 24V
EXTERNAL CLOCK
NO DRIVER LOAD
VIN = 5V
VIN = 12V
SUPPLY CURRENT vs. TEMPERATURE
MAX16821A toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
45
50
55
60
65
70
40
-40 85
VIN = 12V
CDH/DL = 22nF
VCC LOAD REGULATION vs. VIN
MAX16821A toc03
VCC LOAD CURRENT (mA)
VCC (V)
13512090 10530 45 60 7515
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
5.5
4.5
0150
VIN = 24V
VIN = 7V
VIN = 12V
DRIVER RISE TIME
vs. DRIVER LOAD CAPACITANCE
MAX16821A toc04
LOAD CAPACITANCE (nF)
tR (ns)
2015510
20
40
60
80
100
120
140
160
180
200
0
025
DH
DL
DRIVER FALL TIME
vs. DRIVER LOAD CAPACITANCE
MAX16821A toc05
LOAD CAPACITANCE (nF)
fF (ns)
2015510
20
40
60
80
100
0
025
DH
DL
HIGH-SIDE DRIVER (DH) SINK
AND SOURCE CURRENT
MAX16821A toc06
2A/div
100ns/div
CLOAD = 22nF
VIN = 12V
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
6 _______________________________________________________________________________________
LOW-SIDE DRIVER (DL) SINK
AND SOURCE CURRENT
MAX16821A toc07
3A/div
100ns/div
CLOAD = 22nF
VIN = 12V
HIGH-SIDE DRIVER (DH) RISE TIME
MAX16821A toc08
2V/div
40ns/div
VIN = 12V
DH RISING
HIGH-SIDE DRIVER (DH) FALL TIME
MAX16821A toc09
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
LOW-SIDE DRIVER (DL) RISE TIME
MAX16821A toc10
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
LOW-SIDE DRIVER (DL) FALL TIME
MAX16821A toc11
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
FREQUENCY vs. RT
MAX16821A toc12
RT (kΩ)
fSW (kHz)
430 470 510350 39070 110 150
190
230 270 310
1000
10,000
100
30 550
VIN = 12V
FREQUENCY vs. TEMPERATURE
MAX16821A toc13
TEMPERATURE (°C)
fSW (kHz)
3020 2551015
250
260
258
256
254
252
248
246
244
242
240
035
VIN = 12V
SYNC, CLKOUT, AND DH WAVEFORMS
MAX16821A toc14
RT/SYNC
5V/div
CLKOUT
5V/div
DH
5V/div
0V
0V
0V
1µs/div
MODE = SGND
SYNC, CLKOUT, AND DL WAVEFORMS
MAX16821A toc15
RT/SYNC
5V/div
CLKOUT
5V/div
DL
5V/div
0V
0V
0V
1µs/div
MODE = VCC
Typical Operating Characteristics (continued)
(VIN = 12V, VDD = VCC = 5V, TA= +25°C, unless otherwise noted.)
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
_______________________________________________________________________________________ 7
Pin Description
PIN NAME FUNCTION
1 PGND Power-Supply Ground
2, 7 N.C. No Connection. Not internally connected.
3 DL Low-Side Gate-Driver Output
4 BST Boost-Flying Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a ceramic capacitor between BST and LX.
5 LX High-Side MOSFET Source Connection
6 DH High-Side Gate-Driver Output
8, 22, 25 SGND Signal Ground. SGND is the ground connection for the internal control circuitry. Connect SGND and PGND
together at one point near the IC.
9 CLKOUT Oscillator Output. If MODE is low, the rising edge of CLKOUT phase shifts from the rising edge of DH by
180°. If MODE is high, the rising edge of CLKOUT phase shifts from the rising edge of DL by 180°.
10 MODE Buck/Boost Mode Selection Input. Drive MODE low for low-side buck mode operation. Drive MODE high for
boost or high-side buck mode operation. MODE has an internal 5µA pulldown current to ground.
11 EN Output Enable. Drives EN high or leave unconnected for normal operation. Drive EN low to shut down the
power drivers. EN has an internal 15µA pullup current.
12 RT/SYNC Switching Frequency Programming. Connect a resistor from RT/SYNC to SGND to set the internal oscillator
frequency. Drive RT/SYNC to synchronize the switching frequency with an external clock.
13 OUTV Inductor Current-Sense Output. OUTV is an amplifier output voltage proportional to the inductor current.
The voltage at OUTV = 135 x (VCSP - VCSN).
14 I.C. Internally Connected. Connect to SGND for proper operation.
15 OVI
Overvoltage Protection. When OVI exceeds the programmed output voltage by 12.7%, the low-side and
the high-side drivers are turned off. When OVI falls 20% below the programmed output voltage, the drivers
are turned on after power-on reset and soft-start cycles are completed.
16 CLP Current-Error-Amplifier Output. Compensate the current loop by connecting an RC network to ground.
17 EAOUT Voltage-Error-Amplifier Output. Connect EAOUT to the external gain-setting network.
18 EAN Voltage-Error-Amplifier Inverting Input
19 DIFF Differential Remote-Sense Amplifier Output. DIFF is the output of a precision amplifier with SENSE+ and
SENSE- as inputs.
20 CSN Current-Sense Differential Amplifier Negative Input. The differential voltage between CSN and CSP is
amplified internally by the current-sense amplifier (Gain = 34.5) to measure the inductor current.
21 CSP Current-Sense Differential Amplifier Positive Input. The differential voltage between CSP and CSN is
amplified internally by the current-sense amplifier (Gain = 34.5) to measure the inductor current.
23 SENSE- Differential LED Current-Sensing Negative Input. Connect SENSE- to the negative side of the LED current-
sense resistor or to the negative feedback point.
24 SENSE+ Differential LED Current-Sensing Positive Input. Connect SENSE+ to the positive side of the LED current-
sense resistor, or to the positive feedback point.
26 IN Supply Voltage Input. Connect IN to VCC, for a 4.75V to 5.5V input supply range.
27 VCC Internal +5V Regulator Output. VCC is derived from VIN. Bypass VCC to SGND with 4.7µF and 0.1µF
ceramic capacitors.
28 VDD Low-Side Driver Supply Voltage
—EP
Exposed Pad. EP is internally connected to SGND. Connect EP to a large-area ground plane for effective
power dissipation. Connect EP to SGND. Do not use as a ground connection.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
8 _______________________________________________________________________________________
Detailed Description
The MAX16821A/MAX16821B/MAX16821C are high-per-
formance average current-mode PWM controllers for
high-power and high-brightness LEDs (HBLEDs). The
average current-mode control technique offers inherently
stable operation, reduces component derating and size
by accurately controlling the inductor current. The
devices achieve high efficiency at high currents (up to
30A) with a minimum number of external components. A
logic input (MODE) allows the LED driver to switch
between buck and boost modes of operation.
The MAX16821A/MAX16821B/MAX16821C feature a
CLKOUT output 180° out-of-phase with respect to either
the high-side or low-side driver, depending on MODE’s
logic level. CLKOUT provides the drive for a second
out-of-phase LED driver for applications requiring
reduced input capacitor ripple current while operating
another LED driver.
The MAX16821A/MAX16821B/MAX16821C consist of
an inner average current regulation loop controlled by
an outer loop. The combined action of the inner current
loop and outer voltage loop corrects the LED current
errors by adjusting the inductor current resulting in a
tightly regulated LED current. The differential amplifier
(SENSE+ and SENSE- inputs) senses the LED current
using a resistor in series with the LEDs and produces
an amplified version of the sense voltage at DIFF. The
resulting amplified sensed voltage is compared against
an internal 0.6V reference at the error amplifier input.
Input Voltage
The MAX16821A/MAX16821B/MAX16821C operate
with a 4.75V to 5.5V input supply range when the inter-
nal LDO is disabled (VCC connected to IN) or a 7V to
28V input supply range when the internal LDO is
enabled. For a 7V to 28V input voltage range, the inter-
nal LDO provides a regulated 5V output with 60mA of
sourcing capability. Bypass VCC to SGND with 4.7µF
and 0.1µF low-ESR ceramic capacitors.
The MAX16821A/MAX16821B/MAX16821C’s VDD input
provides supply voltage for the low-side and the high-
side MOSFET drivers. Connect VDD to VCC using an
R-C filter to isolate the analog circuits from the MOSFET
drivers. The internal LDO powers up the MAX16821A/
MAX16821B/MAX16821C. For applications utilizing a
5V input voltage, disable the internal LDO by connect-
ing IN and VCC together. The 5V power source must be
in the 4.75V to 5.5V range of for proper operation of the
MAX16821A/MAX16821B/MAX16821C.
Undervoltage Lockout (UVLO)
The MAX16821A/MAX16821B/MAX16821C include
UVLO and a 2048 clock-cycle power-on-reset circuit.
The UVLO rising threshold is set to 4.3V with 200mV
hysteresis. Hysteresis at UVLO eliminates chattering
during startup. Most of the internal circuitry, including
the oscillator, turns on when the input voltage reaches
4V. The MAX16821A/MAX16821B/MAX16821C draw up
to 3.5mA of quiescent current before the input voltage
reaches the UVLO threshold.
Soft-Start
The MAX16821A/MAX16821B/MAX16821C include an
internal soft-start for a glitch-free rise of the output volt-
age. After 2048 power-on-reset clock cycles, a 0.6V
reference voltage connected to the positive input of the
internal error amplifier ramps up to its final value after
1024 clock cycles. Soft-start reduces inrush current
and stress on system components. During soft-start,
the LED current will ramp monotonically towards its
final value.
Internal Oscillator
The internal oscillator generates a clock with the fre-
quency inversely proportional to the value of RT(see
the
Typical Operating Circuit
). The oscillator frequency
is adjustable from 125kHz to 1.5MHz range using a sin-
gle resistor connected from RT/SYNC to SGND. The
frequency accuracy avoids the overdesign, size, and
cost of passive filter components like inductors and
capacitors. Use the following equation to calculate the
oscillator frequency:
For 120kΩ≤RT≤500kΩ:
For 40kΩ≤RT≤120kΩ:
The oscillator also generates a 2VP-P ramp signal for
the PWM comparator and a 180° out-of-phase clock
signal at CLKOUT to drive a second out-of-phase LED
current regulator.
fx
RHz
SW T
. ()=640 10
10
fx
RHz
SW T
. ()=625 10
10
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
_______________________________________________________________________________________ 9
MAX16821A
MAX16821B
MAX16821C
VCM
VCM
0.12 x VREF
OVP
COMPARATOR
PWM
COMPARATOR
ENABLE
UVLO
VREF = 0.6V
VCM
0.5 x VCC
+5V LDO
EN
VCC
SGND
IN
RT/SYNC
CLKOUT
SENSE-
DIFF
SENSE+
VCC
I.C.
CLP
CSP
CSN
OUTV
BST
DH
LX
VDD
DL
PGND
MODE
VTH
TO INTERNAL CIRCUIT
VCLAMP HIGH
AV = 4 VCLAMP LOW
CLK
2 x fS
UVLO
POR
TEMP SEN
OSCILLATOR
RAMP
GENERATOR
SOFT-
START
AV = 34.5
DIFF
AMP
EAN
EAOUT
OVI
ERROR
AMP
gm
S
MUX
Q
RQ
Figure 1. Internal Block Diagram
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
10 ______________________________________________________________________________________
Synchronization
The MAX16821A/MAX16821B/MAX16821C synchronize
to an external clock connected to RT/SYNC. The appli-
cation of an external clock at RT/SYNC disables the
internal oscillator. Once the MAX16821A/MAX16821B/
MAX16821C are synchronized to an external clock, the
external clock cannot be removed if reliable operation
is to be maintained.
Control Loop
The MAX16821A/MAX16821B/MAX16821C use an
average current-mode control scheme to regulate the
output current (Figure 2). The main control loop con-
sists of an inner current regulation loop for controlling
the inductor current and an outer current regulation
loop for regulating the LED current. The inner current
regulation loop absorbs the double pole of the inductor
and output capacitor combination reducing the order of
the outer current regulation loop to that of a single-pole
system. The inner current regulation loop consists of a
current-sense resistor (RS), a current-sense amplifier
(CSA), a current-error amplifier (CEA), an oscillator pro-
viding the carrier ramp, and a PWM comparator
(CPWM) (Figure 2). The MAX16821A/MAX16821B/
MAX16821C outer LED-current control loop consists of
a differential amplifier (DIFF), a reference voltage, and
a voltage-error amplifier (VEA).
Inductor Current-Sense Amplifier
The differential current-sense amplifier (CSA) provides a
34.5V/V DC gain. The typical input offset voltage of the
current-sense amplifier is 0.1mV with a 0 to 5.5V common-
mode voltage range (VIN = 7V to 28V). The current-sense
amplifier senses the voltage across RS. The maximum
common-mode voltage is 3.2V when VIN = 5V.
Inductor Peak-Current Comparator
The peak-current comparator provides a path for fast
cycle-by-cycle current limit during extreme fault condi-
tions, such as an inductor malfunction (Figure 3). Note
the average current-limit threshold of 27.5mV still limits
the output current during short-circuit conditions. To
prevent inductor saturation, select an inductor with a
saturation current specification greater than the aver-
age current limit. The 60mV threshold for triggering the
peak-current limit is twice the full-scale average cur-
rent-limit voltage threshold. The peak-current compara-
tor has only a 260ns delay.
CF
L
RIN
DIFF
SENSE+
SENSE-
EAN EAOUT CSN CSP CLP
RF
CCP
CCZ
RCF
RS
RLS
LED
STRING
COUT
DIFF
VREF
VEA
CEA
CPWM
CA
DRIVER
MODE = SGND
VIN
Figure 2. MAX16821A/MAX16821B/MAX16821C Control Loop
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 11
Current-Error Amplifier
The MAX16821A/MAX16821B/MAX16821C include a
transconductance current-error amplifier with a typical
gmof 550µS and 320µA output sink and source capa-
bility. The current-error amplifier output (CLP) is con-
nected to the inverting input of the PWM comparator.
CLP is also externally accessible to provide frequency
compensation for the inner current regulation loop
(Figure 2). Compensate CEA so the inductor current
negative slope, which becomes the positive slope to
the inverting input of the PWM comparator, is less than
the slope of the internally generated voltage ramp (see
the
Compensation
section). In applications without syn-
chronous rectification, the LED driver can be turned off
and on instantaneously by shorting or opening the CLP
to ground.
PWM Comparator and R-S Flip-Flop
An internal PWM comparator sets the duty cycle by
comparing the output of the current-error amplifier to a
2VP-P ramp signal. At the start of each clock cycle, an
R-S flip-flop resets and the high-side driver (DH) turns
on if MODE is connected to SGND, and DL turns on if
MODE is connected to VCC. The comparator sets the
flip-flop as soon as the ramp signal exceeds the CLP
voltage, thus terminating the ON cycle. See Figure 3.
Differential Amplifier
The differential amplifier (DIFF) allows LED current sens-
ing (Figure 2). It provides true-differential LED current
sensing, and amplifies the sense voltage by a factor of 1
(MAX16821A), 6 (MAX16821B), and 20 (MAX16821C),
while rejecting common-mode voltage errors. The VEA
provides the difference between the differential amplifier
output (DIFF) and the desired LED current-sense volt-
age. The differential amplifier has a bandwidth of 1.7MHz
(MAX16821A), 1.6MHz (MAX16821B), and 550kHz
(MAX16821C). The difference between SENSE+ and
SENSE- is regulated to +0.6V (MAX16821A), +0.1V
(MAX16821B), or +0.03V (MAX16821C).
PWM
COMPARATOR
CLK
SHDN
RAMP
IN
CSP
CLP
CSN
MODE = GND
AV = 34.5
60mV
gm = 550µS
SQ
RQ
PEAK-CURRENT
COMPARATOR
BST
DH
LX
VDD
DL
PGND
Figure 3. MAX16821A/MAX16821B/MAX16821C Phase Circuit
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
12 ______________________________________________________________________________________
Voltage-Error Amplifier (VEA)
The VEA sets the gain of the voltage control loop, and
determines the error between the differential amplifier
output and the internal reference voltage. The VEA out-
put clamps to 0.93V relative to the internal common-
mode voltage, VCM (+0.6V), limiting the average maxi-
mum current. The maximum average current-limit
threshold is equal to the maximum clamp voltage of the
VEA divided by the gain (34.5) of the current-sense
amplifier. This results in accurate settings for the aver-
age maximum current.
MOSFET Gate Drivers
The high-side (DH) and low-side (DL) drivers drive the
gates of external n-channel MOSFETs. The drivers’ 4A
peak sink- and source-current capability provides
ample drive for the fast rise and fall times of the switch-
ing MOSFETs. Faster rise and fall times result in
reduced cross-conduction losses. Size the high-side
and low-side MOSFETs to handle the peak and RMS
currents during overload conditions. The driver block
also includes a logic circuit that provides an adaptive
nonoverlap time to prevent shoot-through currents dur-
ing transition. The typical nonoverlap time is 35ns
between the high-side and low-side MOSFETs.
BST
The MAX16821A/MAX16821B/MAX16821C provide
power to the low-side and high-side MOSFET drivers
through VDD. A bootstrap capacitor from BST to LX pro-
vides the additional boost voltage necessary for the
high-side driver. VDD supplies power internally to the
low-side driver. Connect a 0.47µF low-ESR ceramic
capacitor between BST and LX and a Schottky diode
from BST to VDD.
Protection
The MAX16821A/MAX16821B/MAX16821C include out-
put overvoltage protection (OVP). During fault condi-
tions when the load goes to high impedance (output
opens), the controller attempts to maintain LED current.
The OVP disables the MAX16821A/MAX16821B/
MAX16821C whenever the output voltage exceeds the
OVP threshold, protecting the external circuits from
undesirable voltages.
Current Limit
The error amplifier (VEA) output is clamped between
-0.050V and +0.93V with respect to common-mode
voltage (VCM). Average current-mode control limits the
average current sourced by the converter during a fault
condition. When a fault condition occurs, the VEA out-
put clamps to +0.93V with respect to the common-
mode voltage (0.6V) to limit the maximum current
sourced by the converter to ILIMIT = 0.0275 / RS.
Overvoltage Protection
The OVP comparator compares the OVI input to the
overvoltage threshold. The overvoltage threshold is typ-
ically 1.127 times the internal 0.6V reference voltage
plus VCM (0.6V). A detected overvoltage event trips the
comparator output turning off both high-side and low-
side MOSFETs. Add an RC delay to reduce the sensi-
tivity of the overvoltage circuit and avoid unnecessary
tripping of the converter (Figure 4). After the OVI volt-
age falls below 1.076V (typ.), high-side and low-side
drivers turn on only after a 2048 clock-cycle POR and a
1024 clock-cycle soft-start have elapsed. Disable the
overvoltage function by connecting OVI to SGND.
MAX16821A
MAX16821B
MAX16821C
OVI
DIFF
EAN
EAOUT
COVI
RA
RF
VOUT
RB
RIN
Figure 4. Overvoltage Protection Input Delay
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 13
Applications Information
Boost LED Driver
Figure 5 shows the MAX16821A/MAX16821B/MAX16821C
configured as a synchronous boost converter with
MODE connected to VCC. During the on-time, the input
voltage charges the inductor. During the off-time, the
inductor discharges to the output. The output voltage
cannot go below the input voltage in this configuration.
Resistor R1 senses the inductor current and resistor R2
senses the LED current. The outer LED current regula-
tion loop programs the average current in the inductor,
thus achieving tight LED current regulation.
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
Q1
VLED
C1
C4
LED
STRING
VIN
C2
D1
VIN
7V TO 28V
C11
C10
C9
C8
R8
R5
R10
R3
R4
VCC
ON/OFF
R7
R5
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R1
R2
R9
Q2
L1
Figure 5. Synchronous Boost LED Driver (Output Voltage Not to Exceed 28V)
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
14 ______________________________________________________________________________________
Input-Referenced Buck-Boost LED Driver
The circuit in Figure 6 shows a step-up/step-down reg-
ulator. It is similar to the boost converter in Figure 5 in
that the inductor is connected to the input and the
MOSFET is essentially connected to ground. However,
rather than going from the output to ground, the LEDs
span from the output to the input. This effectively
removes the boost-only restriction of the regulator in
Figure 5, allowing the voltage across the LED to be
greater or less than the input voltage. LED current-
sensing is not ground-referenced, so a high-side cur-
rent-sense amplifier is used to measure current.
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
VIN
C2
C11
C10
C9
C8
R7
R9
R3
R4
VCC
ON/OFF
R6
R5
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R1
R8
Q1
C1
LED
STRING
1 TO 6
LEDS
C2
L1
D1
VIN
7V TO 28V R2
VCC
RS+
RS- OUT
VLED
Figure 6. Typical Application Circuit for an Input-Referred Buck-Boost LED Driver (7V to 28V Input)
SEPIC LED Driver
Figure 7 shows the MAX16821A/MAX16821B/
MAX16821C configured as a SEPIC LED driver. While
buck topologies produce an output always lower than
the input, and boost topologies produce an output
always greater than the input, a SEPIC topology allows
the output voltage to be greater than, equal to, or less
than the input. In a SEPIC topology, the voltage across
C3 is the same as the input voltage, and L1 and L2 have
the same inductance. Therefore, when Q1 turns on (on-
time), the currents in both inductors (L1 and L2) ramp
up at the same rate. The output capacitor supports the
output voltage during this time. When Q1 turns off (off-
time), L1 current recharges C3 and combines with L2 to
provide current to recharge C1 and supplies the load
current. Since the voltage waveform across L1 and L2
are exactly the same, it is possible to wind both induc-
tors on the same core (a coupled inductor). Although
voltages on L1 and L2 are the same, RMS currents can
be quite different so the windings may require a differ-
ent gauge wire. Because of the dual inductors and seg-
mented energy transfer, the efficiency of a SEPIC
converter is lower than the standard buck or boost con-
figurations. As in the boost driver, the current-sense
resistor connects to ground, allowing the output voltage
of the LED driver to exceed the rated maximum voltage
of the MAX16821A/MAX16821B/MAX16821C.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 15
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
VIN
C10
C9
C8
C7
R7
R9
R3
R4
VCC
ON/OFF
R6
R5
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C2
C6 C5 C4
R8
Q1
L1
L2
VLED
C1 LED
STRING
D1
VIN
7V TO 28V
R1
R2
C3
Figure 7. Typical Application Circuit for a SEPIC LED Driver
MAX16821A/MAX16821B/MAX16821C
Low-Side Buck Driver
with Synchronous Rectification
In Figure 8, the input voltage goes from 7V to 28V and,
because of the ground-based current-sense resistor,
the output voltage can be as high as the input. The syn-
chronous MOSFET keeps the power dissipation to a
minimum, especially when the input voltage is large
compared to the voltage on the LED string. For the
inner average current-loop inductor, current is sensed
by resistor R1. To regulate the LED current, R2 creates
a voltage that the differential amplifier compares to
0.6V. Capacitor C1 is small and helps reduce the ripple
current in the LEDs. Omit C1 in cases where the LEDs
can tolerate a higher ripple current. The average current-
mode control scheme converts the input voltage to a
current source feeding the LED string.
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
16 ______________________________________________________________________________________
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
Q1
L1 VLED
C1
C4
LED
STRING
VIN
C2
D2
VIN
7V TO 28V
C11
C10
C9
C8
R9
R5
R10
R3
R4
VCC
ON/OFF
R7
R6
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R1
R2
R9
Q2
Figure 8. Application Circuit for a Low-Side Buck LED Driver
High-Side Buck Driver
with Synchronous Rectification
In Figure 9, the input voltage goes from 7V to 28V, the LED
load is connected from the positive side to the current-
sense resistor (R1) in series with the inductor, and MODE
is connected to VCC. For the inner average current-loop
inductor, current is sensed by resistor R1 and is then
transferred to the low side by the high-side current-sense
amplifier, U2. The voltage appearing across resistor R11
becomes the average inductor current-sense voltage for
the inner average current loop. To regulate the LED
current, R2 creates a voltage that the differential ampli-
fier compares to its internal reference. Capacitor C1 is
small and is added to reduce the ripple current in the
LEDs. In cases where the LEDs can tolerate a higher
ripple current, capacitor C1 can be omitted.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 17
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
Q1
L1
C1
C4
LED
STRING
VIN
C2
D1
VIN
7V TO 28V
C11
C10
C9
C8
R8
R5
R3
R4
VCC
ON/OFF
R7
R6
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
C3
C7 C6 C5
R1
R2
R11
Q2
VCC
I.C.
U2
RS+
RS- OUT
Figure 9. Application Circuit for a High-Side Buck LED Driver
MAX16821A/MAX16821B/MAX16821C
Inductor Selection
The switching frequency, peak inductor current, and
allowable ripple at the output determine the value and
size of the inductor. Selecting higher switching frequen-
cies reduces inductance requirements, but at the cost
of efficiency. The charge/discharge cycle of the gate
and drain capacitance in the switching MOSFETs cre-
ate switching losses worsening at higher input volt-
ages, since switching losses are proportional to the
square of the input voltage. The MAX16821A/
MAX16821B/MAX16821C operate up to 1.5MHz.
Choose inductors from the standard high-current, sur-
face-mount inductor series available from various manu-
facturers. Particular applications may require
custom-made inductors. Use high-frequency core mate-
rial for custom inductors. High ∆ILcauses large peak-to-
peak flux excursion increasing the core losses at higher
frequencies. The high-frequency operation coupled with
high ∆ILreduces the required minimum inductance and
makes the use of planar inductors possible.
The following discussion is for buck or continuous
boost-mode topologies. Discontinuous boost, buck-
boost, and SEPIC topologies are quite different in
regards to component selection. Use the following
equations to determine the minimum inductance value:
Buck regulators:
Boost regulators:
where VLED is the total voltage across the LED string.
The average current-mode control feature of the
MAX16821A/MAX16821B/MAX16821C limits the maxi-
mum peak inductor current and prevents the inductor
from saturating. Choose an inductor with a saturating
current greater than the worst-case peak inductor cur-
rent. Use the following equation to determine the worst-
case current in the average current-mode control loop.
where RSis the sense resistor and VCL = 0.030V. For
the buck converter, the sense current is the inductor
current and for the boost converter, the sense current is
the input current.
Switching MOSFETs
When choosing a MOSFET for voltage regulators, con-
sider the total gate charge, RDS(ON), power dissipation,
and package thermal impedance. The product of the
MOSFET gate charge and on-resistance is a figure of
merit, with a lower number signifying better perfor-
mance. Choose MOSFETs optimized for high-frequen-
cy switching applications. The average current from the
MAX16821A/MAX16821B/MAX16821C gate-drive out-
put is proportional to the total capacitance it drives
from DH and DL. The power dissipated in the
MAX16821A/MAX16821B/MAX16821C is proportional
to the input voltage and the average drive current. The
gate charge and drain capacitance losses (CV2), the
cross-conduction loss in the upper MOSFET due to
finite rise/fall time, and the I2R loss due to RMS current
in the MOSFET RDS(ON) account for the total losses in
the MOSFET. Estimate the power loss (PDMOS_) in the
high-side and low-side MOSFETs using the following
equations:
where QG, RDS(ON), tR, and tFare the upper-switching
MOSFET’s total gate charge, on-resistance, rise time,
and fall time, respectively.
For the buck regulator, D is the duty cycle, IVALLEY =
(IOUT - ∆IL / 2) and IPK = (IOUT + ∆IL / 2).
Input Capacitors
The discontinuous input-current waveform of the buck
converter causes large ripple currents in the input
capacitor. The switching frequency, peak inductor cur-
rent, and the allowable peak-to-peak voltage ripple
reflected back to the source dictate the capacitance
requirement. The input ripple is comprised of ∆VQ
(caused by the capacitor discharge) and ∆VESR
(caused by the ESR of the capacitor).
PD Q V f R I
IIIII
D
MOS LO G DD SW DSON RMS LO
RMS LO VALLEY PK VALLEY PK
_
=××
()
+×
=++×
⎛
⎝⎞
⎠×−
()
−
−
2
22 1
3
IIIII
D
RMS HI VALLEY PK VALLEY PK−=++×
⎛
⎝⎞
⎠×
22
3
PD Q V f
VI ttf
RI
MOS HI G DD SW
IN LED R f SW
DSON RMS HI
_
=××
()
+
××+
()
×
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥+
×−
2
2
IV
R
I
LPEAK CL
S
CL
=+
⎛
⎝
⎜⎞
⎠
⎟
∆
2
LVV V
Vf I
MIN LED INMAX INMAX
LED SW L
=−
()
×
××∆
LVVV
VfI
MIN INMAX LED LED
INMAX SW L
=−
()
×
××∆
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
18 ______________________________________________________________________________________
Use low-ESR ceramic capacitors with high ripple-cur-
rent capability at the input. In the case of the boost
topology where the inductor is in series with the input,
the ripple current in the capacitor is the same as the
inductor ripple and the input capacitance is small.
Output Capacitors
The function of the output capacitor is to reduce the
output ripple to acceptable levels. The ESR, ESL, and
the bulk capacitance of the output capacitor contribute
to the output ripple. In most of the applications, the out-
put ESR and ESL effects can be dramatically reduced
by using low-ESR ceramic capacitors. To reduce the
ESL effects, connect multiple ceramic capacitors in
parallel to achieve the required bulk capacitance.
In a buck configuration, the output capacitance, COUT,
is calculated using the following equation:
where ∆VRis the maximum allowable output ripple.
In a boost configuration, the output capacitance, COUT,
is calculated as:
where ILED is the output current.
In a buck-boost configuration, the output capacitance,
COUT is:
where VLED is the voltage across the load and ILED is
the output current.
Average Current Limit
The average current-mode control technique of the
MAX16821A/MAX16821B/MAX16821C accurately limits
the maximum output current in the case of the buck con-
figuration. The MAX16821A/MAX16821B/MAX16821C
sense the voltage across the sense resistor and limit the
peak inductor current (IL-PK) accordingly. The on-cycle
terminates when the current-sense voltage reaches
26.4mV (min). Use the following equation to calculate
the maximum current-sense resistor value:
Select a 5% lower value of RSto compensate for any
parasitics associated with the PCB. Select a non-induc-
tive resistor with the appropriate wattage rating. In the
case of the boost configuration, the MAX16821A/
MAX16821B/MAX16821C accurately limits the maxi-
mum input current. Use the following equation to calcu-
late the current-sense resistor value:
where IIN is the input current.
Compensation
The main control loop consists of an inner current loop
(inductor current) and an outer LED current regulation
loop. The MAX16821A/MAX16821B/MAX16821C use an
average current-mode control scheme to regulate the
LED current (Figure 2). The VEA output provides the
controlling voltage for the current source. The inner cur-
rent loop absorbs the inductor pole reducing the order of
the LED current loop to that of a single-pole system. The
major consideration when designing the current control
loop is making certain that the inductor downslope
(which becomes an upslope at the output of the CEA)
does not exceed the internal ramp slope. This is a nec-
essary condition to avoid subharmonic oscillations simi-
lar to those in peak current mode with insufficient slope
compensation. This requires that the gain at the output of
the CEA be limited based on the following equation:
Buck:
where VRAMP = 2V, gm= 550µS, AV= 34.5V/V, and
VLED is the voltage across the LED string.
The crossover frequency of the inner current loop is
given by:
For adequate phase margin place the zero formed by
RCF and CCZ at least 3 to 5 times below the crossover
frequency. The pole formed by RCF and CCP may not
be required in most applications but can be added to
minimize noise at a frequency at or above the switching
frequency.
fR
V
V
LgR
CS
RAMP
IN mCF
. =×
×× ×××
234 5
π
RVfL
ARV g
CF RAMP SW
VSLED m
≤××
×× ×
RI
SENSE IN
.
=⎛
⎝
⎜⎞
⎠
⎟
0 0264
RI
SENSE LED
.
=⎛
⎝
⎜⎞
⎠
⎟
0 0264
C 2 V I
VV V f
OUT
LED LED
R LED INMIN SW
≥××
×+ ×
( ) ∆
C
VV I
VV f
OUT
LED INMIN LED
R LED SW
≥−××
××
( )
2
∆
C VVV
VL Vf
OUT
INMAX LED LED
R INMAX SW
≥−×
××× ×
( )
∆22
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 19
MAX16821A/MAX16821B/MAX16821C
Boost:
The crossover frequency of the inner current loop is
given by:
For adequate phase margin at crossover, place the zero
formed by RCF and CCZ at least 3 to 5 times below the
crossover frequency. The pole formed by RCF and CCP
is added to eliminate noise spikes riding on the current
waveform and is placed at the switching frequency.
PWM Dimming
Even though the MAX16821A/MAX16821B/MAX16821C
do not have a separate PWM input, PWM dimming can
be easily achieved by means of simple external circuitry.
See Figures 10 and 11.
fR
V
V
LgR
CS
RAMP
LED mCF
. =×
×× ×××
234 5
π
RVfL
AR V V g
CF RAMP SW
VSLED IN m
( )
≤××
×× − ×
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
20 ______________________________________________________________________________________
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
Q1
L1 VLED
C4
LED
STRING
VIN
C2
D2
VIN
7V TO 28V
C11
C10
C9
C8
R9
R5
R10
R3
R4
VCC
ON/OFF
R7
R6
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R1
R2
R9
Q2
PWM DIM
Q3
Figure 10. Low-Side Buck LED Driver with PWM Dimming (Patent Pending)
Power Dissipation
Calculate power dissipation in the MAX16821A/
MAX16821B/MAX16821C as a product of the input volt-
age and the total VCC regulator output current (ICC).
ICC includes quiescent current (IQ) and gate-drive cur-
rent (IDD):
PD= VIN x ICC
ICC = IQ+ [fSW x (QG1 + QG2)]
where QG1 and QG2 are the total gate charge of the
low-side and high-side external MOSFETs at VGATE =
5V, IQis the supply current, and fSW is the switching
frequency of the LED driver.
Use the following equation to calculate the maximum
power dissipation (PDMAX) in the chip at a given ambi-
ent temperature (TA):
PDMAX = 34.5 x (150 – TA) mW
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 21
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
VLED
LED
STRING
VIN
C11
C10
C9
C8
R7
R9
R3
R4
VCC
ON/OFF
R6
R5
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
Q5
Q4
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R2
R1
R8
PWM DIM
Q2
VCC
R10
PWM DIM
Q3
PWM DIM
Q1
L1
D1
VIN
7V TO 28V
C2
C1
Figure 11. Boost LED Driver with PWM Dimming
MAX16821A/MAX16821B/MAX16821C
PCB Layout
Use the following guidelines to layout the LED driver.
1) Place the IN, VCC, and VDD bypass capacitors
close to the MAX16821A/MAX16821B/MAX16821C.
2) Minimize the area and length of the high-current
switching loops.
3) Place the necessary Schottky diodes that are con-
nected across the switching MOSFETs very close to
the respective MOSFET.
4) Use separate ground planes on different layers of
the PCB for SGND and PGND. Connect both of
these planes together at a single point and make
this connection under the exposed pad of the
MAX16821A/MAX16821B/MAX16821C.
5) Run the current-sense lines CSP and CSN very
close to each other to minimize the loop area. Run
the sense lines SENSE+ and SENSE- close to each
other. Do not cross these critical signal lines with
power circuitry. Sense the current right at the pads
of the current-sense resistors. The current-sense
signal has a maximum amplitude of 27.5mV. To pre-
vent contamination of this signal from high dv/dt
and high di/dt components and traces, use a
ground plane layer to separate the power traces
from this signal trace.
6) Place the bank of output capacitors close to the load.
7) Distribute the power components evenly across the
board for proper heat dissipation.
8) Provide enough copper area at and around the
switching MOSFETs, inductor, and sense resistors
to aid in thermal dissipation.
9) Use 2oz or thicker copper to keep trace inductances
and resistances to a minimum. Thicker copper con-
ducts heat more effectively, thereby reducing thermal
impedance. Thin copper PCBs compromise efficiency
in applications involving high currents.
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
22 ______________________________________________________________________________________
Selector Guide
PART
DIFFERENTIAL
SET VALUE
(VSENSE+ - VSENSE-)
(V)
DIFFERENTIAL
AMP GAIN
(V/V)
MAX16821A 0.60 1
MAX16821B 0.10 6
MAX16821C 0.03 20
Chip Information
PROCESS: BiCMOS
MAX16821A
MAX16821B
MAX16821C
TQFN
TOP VIEW
26
27
25
24
10
9
11
N.C.
BST
LX
DH
N.C.
12
PGND
CSN
EAN
EAOUT
CSP
CLP
OVI
12
SGND
4567
2021 19 17 16 15
IN
VCC
RT/SYNC
EN
MODE
CLKOUT
DL DIFF
3
18
28 8
VDD SGND
*EP = EXPOSED PAD.
*EP
+
SENSE+
23 13 OUTV
SENSE-
22 14 I.C.
SGND
Pin Configuration
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
______________________________________________________________________________________ 23
1
2
3
4
5
6
8
7
21
20
19
18
17
16
15
9
10
11
12
1314
22 23 24 25 26 27 28
Q1
L1 VLED
C1
C4
LED
STRING
VIN
C2
D2
VIN
7V TO 28V
C11
C10
C9
C8
R9
R5
R10
R3
R4
VCC
ON/OFF
R7
R6
PGND
N.C.
N.C.
DL
BST
LX
DH
I.C. OUTV RT/SYNC EN MODE CLKOUT SGND
SGND SENSE- SENSE+ SGND IN V
CC
V
DD
OVI
CLP
EAOUT
EAN
DIFF
CSN
CSP
MAX16821A
MAX16821B
MAX16821C
VLED
C3
C7 C6 C5
R1
R2
R9
Q2
Typical Operating Circuit
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
28 TQFN-EP T2855-8 21-0140
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
MAX16821A/MAX16821B/MAX16821C
High-Power Synchronous HBLED
Drivers with Rapid Current Pulsing
Heaney
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 7/07 Initial release —
1 3/09 Updated Electrical Characteristics table. 3, 4
