IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE FAST CMOS 16-BIT TRANSPARENT LATCH IDT74FCT16373AT/CT FEATURES: DESCRIPTION: * * * * * * * * The FCT16373T 16-bit transparent D-type latch is built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches, or one 16-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16373T is ideally suited for driving high-capacitance loads and lowimpedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) VCC = 5V 10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C * Available in SSOP and TSSOP packages FUNCTIONAL BLOCK DIAGRAM 1OE 2OE 1LE 2LE 1D1 D 2D1 D 1O1 2O1 C C TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2009 1 (c) 2009 Integrated Device Technology, Inc. DSC-5454/6 IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION 1OE 1 48 1LE 1O1 2 47 1D1 1O2 3 46 1D2 GND 4 45 GND 1O3 5 44 1D3 1O4 6 43 1D4 VCC 7 42 VCC 1O5 8 41 1D5 1O6 9 40 1D6 GND 10 39 GND 1O7 11 38 1D7 1O8 12 37 1D8 Symbol Description VTERM(2) Max Unit VTERM(3) Terminal Voltage with Respect to GND -0.5 to 7 V Terminal Voltage with Respect to GND -0.5 to VCC+0.5 V TSTG Storage Temperature -65 to +150 C IOUT DC Output Current -60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Outputs and I/O terminals for FCT162XXX. CAPACITANCE (TA = +25C, f = 1.0MHz) Parameter(1) Symbol Conditions Typ. Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF 13 36 2D1 2O2 14 35 2D2 GND 15 34 GND 2O3 16 33 2D3 2O4 17 32 2D4 VCC 18 31 VCC Pin Names 2O5 19 30 2D5 xDx Data Inputs xLE Latch Enable Input (Active HIGH) xOE Output Enable Input (Active LOW) xOx 3-State Outputs 20 29 2D6 GND 21 28 GND 2O7 22 27 2D7 2O8 23 26 2D8 24 25 2LE 2OE Unit CIN 2O1 2O6 Max. NOTE: 1. This parameter is measured at characterization but not tested. PIN DESCRIPTION Description FUNCTION TABLE(1) Inputs SSOP/ TSSOP TOP VIEW xDx xLE xOE xOx H H L H L H L L X X H Z NOTE: 1. H = HIGH voltage level L = LOW voltage level X = Don't care Z = High-impedance 2 Outputs IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 -- -- V VIL Input LOW Level Guaranteed Logic LOW Level -- -- 0.8 V IIH Input HIGH Current (Input pins)(5) VCC = Max. -- -- 1 A -- -- 1 VI = VCC Input HIGH Current (I/O pins)(5) IIL Input LOW Current (Input pins)(5) VI = GND -- -- 1 -- -- 1 VO = 2.7V -- -- 1 VO = 0.5V -- -- 1 Input LOW Current (I/O pins)(5) IOZH High Impedance Output Current IOZL (3-State Output pins)(5) VCC = Max. VIK Clamp Diode Voltage VCC = Min., IIN = -18mA -- -0.7 -1.2 V IOS Short Circuit Current VCC = Max., VO = GND(3) -80 -140 -250 mA VH Input Hysteresis -- 100 -- mV ICCL Quiescent Power Supply Current -- 5 500 A -- VCC = Max A VIN = GND or VCC ICCH ICCZ OUTPUT DRIVE CHARACTERISTICS Symbol Test Conditions(1) Parameter 2.5V(3) Min. Typ.(2) Max. Unit IO Output Drive Current VCC = Max., VO = -50 -- 180 mA VOH Output HIGH Voltage VCC = Min. IOH = -3mA 2.5 3.5 -- V VIN = VIH or VIL IOH = -15mA VOL Output LOW Voltage IOFF Input/Output Power Off Leakage(5) VCC = Min. 2.4 3.5 -- V IOH = -32mA(4) 2 3 -- V IOL = 64mA -- 0.2 0.55 V -- -- 1 A VIN = VIH or VIL VCC = 0V, VIN = or VO 4.5V NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. This test limit for this parameter is 5A at TA = -55C. 3 IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Test Conditions(1) Symbol ICC Parameter Quiescent Power Supply Current TTL Inputs HIGH ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open xOE = GND One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE = GND xLE = VCC One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE = GND xLE = VCC Sixteen Bits Toggling Min. -- Typ.(2) 0.5 Max. 1.5 Unit mA VIN = VCC VIN = GND -- 60 100 A/ MHz VIN = VCC VIN = GND -- 0.6 1.5 mA VIN = 3.4V VIN = GND -- 0.9 2.3 VIN = VCC VIN = GND -- 2.4 4.5(5) VIN = 3.4V VIN = GND -- 6.4 16.5(5) VCC = Max. VIN = 3.4V(3) NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) Parameter Propagation Delay xDx to xOx Propagation Delay xLE to xOx Output Enable Time Condition(2) CL = 50pF RL = 500 FCT16373AT Min.(2) Max. 1.5 5.2 FCT16373CT Min.(2) Max. 1.5 3.6 Unit ns 2 8.5 2 3.7 ns 1.5 6.5 1.5 4.4 ns Output Disable Time 1.5 5.5 1.5 3.9 ns Set-up Time HIGH or LOW, xDx to xLE Hold Time HIGH or LOW, xDx to xLE xLE Pulse Width HIGH Output Skew(3) 2 1.5 5 -- -- -- -- 0.5 2 1.5 5 -- -- -- -- 0.5 ns ns ns ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 5 IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC SWITCH POSITION 7.0V 500 V OUT VIN Pulse Generator D.U.T. 50pF RT 500 CL Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH Pulse Width Set-up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED tPLZ 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH Propagation Delay SWITCH OPEN 3.5V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 6 IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX FCT Temp. Range XXX Family XXXX Device Type XX Package X Process Blank Industrial (-40C to +85C) PVG PAG Shrink Small Outline Package - Green Thin Shrink Small Outline Package - Green 373AT 373CT 16-Bit Transparent Latch 16 Double-Density, 5 Volt, High Drive 74 40 C to +85 C Datasheet Document History 09/10/09 Pg.7 Updated the ordering information by removing the "IDT" notation and non RoHS part. CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 7 for Tech Support: logichelp@idt.com