I2784A-08TT - Alliance Semiconductor

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

1 of 9 http://www.pulsecore.com

General Purpose EMI Reduction IC

FEATURES

• Provides up to 15 dB of EMI suppression

• FCC approved method of EMI attenuation

• Generates a 1X, 2X, and 4X low EMI spread

spectrum clock of the input frequency

• Input frequency range from 3 to 78 MHz

• External loop filter for spread % adjustment

• Spreading ranges from +/-0.25% to +/-5.0%

• Ultra low cycle-to-cycle jitter

• Zero-cycle slip

• 3.3V operating voltage range

• 10 mA output drives

• TTL or CMOS compatible outputs

• Ultra-low power CMOS design

• Available in 8 pin SOIC and TSSOP

PRODUCT DESCRIPTION

The P278xx is a versatile spread spectrum

frequency modulator designed specifically for

digital camera and other digital video and imaging

applications. The P278xx reduces

electromagnetic interference (EMI) at the clock

source, which provides system wide reduction of

EMI of all clock dependent signals. The P278xx

allows significant system cost savings by reducing

the number of circuit board layers and shielding

that are traditionally required to pass EMI

regulations.

The P278xx uses the most efficient and optimized

modulation profile approved by the FCC.

The P278xx modulates the output of a single PLL

in order to “spread” the bandwidth of a synthesized

clock and, more importantly, decreases the peak

amplitudes of its harmonics. This results in

significantly lower system EMI compared to the

typical narrow band signal produced by oscillators

and most frequency generators. Lowering EMI by

increasing a signal’s bandwidth is called “spread

spectrum clock generation”.

APPLICATIONS

The P278xx is targeted towards MFP, xDSL, fax

modem, set-top box, USB controller, DSC, and

embedded systems.

Figure 1 - Pi n Diagram

Standard pin c onfiguration offered in both

8 SOIC and TSS OP packages

Alternat i ve pi n configurati on avai l abl e

only for 8 TSS OP package

P278XA-08S

P278XA-08T

1 8

2 7

XIN

VSS

FS1

XOUT

VDD

FS0

ModOut

P278XB-08T

1 8

2 7

FS0

VDD

XIN

XOUT

ModOut

VSS

FS1

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

2 of 9 http://www.pulsecore.com

Figure 2 - P278XX Block Diagram

P278X X Block Diagram

Output

Divider

XIN

VSS

ModOUT

XOUT

Crystal

Oscillator

Modulation

Phase

Detector

Frequency

Divider

Feedback

Divider

VCO

PLL

FS0 F S1 VDD

PIN DESCRIPTION (P278XA)

PIN # Name Type Description

1 XIN/CLKIN I Connect to crystal or clock input.

2 XOUT I Crystal output

3 FS1 I Digital logic input used to select input frequency range (see Table 1). This

pin has an internal pull-up resistor.

4 LF I External Loop Filter for the PLL. By changing the value of the CRC circuit,

the % spread can be adjusted accordingly. See Table 2 for detail value.

5 VSS I Ground Connection. Connect to system ground.

6 ModOUT O Spread Spectrum Clock Output.

7 FS0 I Digital logic input used to select input frequency range (see Table 1). This

pin has an internal pull-up resistor.

8 VDD P Connect to +3.3V

Table 1 - Input Frequency Selection

Output Frequency Scaling (MHz)

FS1 FS0 Input

(MHz) P2781X P2782X P2784X Modulation Rate

(KHz)

0 0 3 to 9 3 to 9 6 to 18 12 to 36 Fin / 128

0 1 10 to 19 10 to 19 20 to 38 40 to 76 Fin / 256

1 0 20 to 38 20 to 38 40 to 76 80 to 152 Fin / 512

1 1 39 to 78 39 to 78 78 to 156 156 to 312 Fin / 1024

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

3 of 9 http://www.pulsecore.com

Table 2 - Loop Filter Selection Table VDD 3.3V

NOTE: The BW % value is representative of typical conditions.

BW=+/-0.50% BW=+/-0.75% BW=+/-1.00% BW=+/-1.25%

INPUT

(MHz) FS1 FS0 C1 (pF) C2 (pF) R1

(ohms) C1 (pF) C2 (pF) R1

(ohms)

3 0 0 270 330,000 220 270 330,000 300 270 100,000 390 560 100,000 510

4 0 0 270 100,000 270 270 100,000 390 270 100,000 560 560 100,000 680

5 0 0 270 100,000 390 270 100,000 560 270 100,000 750 560 100,000 910

6 0 0 270 100,000 510 270 100,000 750 270 10,000 1,000 680 6,800 1,200

7 0 0 270 100,000 620 270 100,000 1,000 270 5,600 1,200 330 3,300 1,200

8 0 0 270 100,000 820 270 100,000 1,200 270 12,000 2,200 680 6,800 2,200

9 0 0 270 100,000 1,000 270 100,000 1,500 270 5,600 2,200 270 2,700 2,200

10 0 1 270 100,000 330 270 100,000 510 270 100,000 750 560 100,000 910

11 0 1 270 100,000 390 270 100,000 560 270 100,000 866(1%) 560 100,000 1,100

12 0 1 270 100,000 510 270 100,000 750 270 10,000 1,000 680 6,800 1,200

13 0 1 270 100,000 560 270 100,000 820 270 12,000 1,200 470 4,700 1,200

14 0 1 270 100,000 620 270 100,000 1,000 270 5,600 1,200 330 3,300 1,200

15 0 1 270 100,000 750 270 100,000 1,100 270 3,900 1,200 330 3,300 1,500

16 0 1 270 100,000 820 270 100,000 1,200 270 12,000 2,200 680 6,800 2,200

17 0 1 270 100,000 910 270 100,000 1,300 270 10,000 2,200 390 3,900 2,200

18 0 1 270 100,000 1,000 270 100,000 1,500 270 5,600 2,200 270 2,700 2,200

19 0 1 270 100,000 1,200 270 100,000 1,600 270 3,300 2,200 270 2,700 2,700

20 1 0 270 100,000 330 270 100,000 560 270 100,000 750 560 100,000 910

21-22 1 0 270 100,000 390 270 100,000 620 270 100,000 866(1%) 560 100,000 1,100

23-24 1 0 270 100,000 510 270 100,000 750 270 10,000 1,000 680 6,800 1,200

25-26 1 0 270 100,000 560 270 100,000 820 270 12,000 1,200 470 4,700 1,200

27-28 1 0 270 100,000 620 270 100,000 1,000 270 6,800 1,200 330 3,300 1,200

29-30 1 0 270 100,000 750 270 100,000 1,100 270 3,900 1,200 330 3,300 1,500

31-32 1 0 270 100,000 820 270 100,000 1,200 270 12,000 2,200 680 6,800 2,200

33-34 1 0 270 100,000 910 270 100,000 1,300 270 10,000 2,200 390 3,900 2,200

35-36 1 0 270 100,000 1,000 270 100,000 1,500 270 5,600 2,200 270 2,700 2,200

37-38 1 0 270 100,000 1,200 270 100,000 1,600 270 3,300 2,200 270 2,700 2,700

39-42 1 1 270 100,000 330 270 100,000 560 270 100,000 750 560 100,000 910

43-46 1 1 270 100,000 390 270 100,000 620 270 100,000 866(1%) 560 100,000 1,100

47-50 1 1 270 100,000 510 270 100,000 750 270 10,000 1,000 680 6,800 1,200

51-54 1 1 270 100,000 560 270 100,000 820 270 12,000 1,200 470 4,700 1,200

55-58 1 1 270 100,000 620 270 100,000 1,000 270 6,800 1,200 330 3,300 1,200

59-62 1 1 270 100,000 750 270 100,000 1,100 270 3,900 1,200 330 3,300 1,500

63-66 1 1 270 100,000 820 270 100,000 1,200 270 12,000 2,200 680 6,800 2,200

67-70 1 1 270 100,000 910 270 100,000 1,300 270 8,200 2,200 390 3,900 2,200

71-74 1 1 270 100,000 1,000 270 100,000 1,600 270 5,600 2,200 270 2,700 2,200

75-78 1 1 270 100,000 1,200 270 100,000 1,800 270 3,300 2,200 270 2,700 2,700

*Please contact factory for loop filter values not listed in the above table

(info@pulsecore.com; or Ext. 17 or 25)

C2 C1

PIN 4 LF

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

4 of 9 http://www.pulsecore.com

SPREAD SPECTRUM SELECTION

The P278xA performs Zero Cycle Slip when sets at low % spreading. This allows no occurrence of system

timing error. The optimal setting should minimize system EMI to the fullest without affecting system

perfor m ance. T he spreading is descr ibed as a perc entage deviation of the c enter fr equency (Note: the center

frequency is the frequency of the external reference input on CLKIN, Pin 1).

Example: The P2781A is designed for PC peripheral, networking, notebook PC, and LCD monitor

applications. It is optimized for operation between 3 to 78 MHz range. The P2781A’s spread % selection is

determined by the external LF value specified in Table 2. Table 1 specifies the input frequency range. The

external LF allows the user to fine tuning the spread % to optimize the EMI reduction benefits of the spread

spectrum.

Figure 3 - P278xA Application Schematic

+3.3V

1 8

2 7

CLKIN

XOUT

FS1

VDD

ModOUT

FS0

VSS

16MHz

P2781A

M odulated 16MHz with

+/-0 .5% B W to target

chip

0.1uF

C2 C1 0 Ohm

560pF

820 Ohm

100,000 pF

Note: Both logic input pins FS1 and FS0 have to be connected to either VDD or VSS by a low impedance

connection such as a printed circuit board trace or zero ohms resistor. Do not leave them floating.

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

5 of 9 http://www.pulsecore.com

EMC SOFTWARE SIMULATION

By using PulseCore Semiconduc tor, Inc.’s pr oprietary EMC simulation sof tware – EMI-lator®, radiated system

level EMI analysis can be made easier to allow a quantitative assessment on PulseCore’s EMI reduction

products. The simulation engine of this EMC software has already been characterized to correlate with the

electrical characteristics of PulseCore EMI reduction IC’s. Figure 4 below is an example of the simulation

result. Please visit our web site at www.pulsecore.com for information on how to obtain a free copy and

demonstration of EMI-lator®.

Figure 4 - Simulation Result from EMI-lator®

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

6 of 9 http://www.pulsecore.com

ABSOLUTE MAXIMUM RATINGS P278XX

Symbol Parameter Rating Unit

VDD, VIN Voltage on any pin with respect to GND -0.5 to +7.0 V

TSTG Storage Temperature -65 to +125 ºC

TA Operating Temperature 0 to +70 ºC

DC ELECTRICAL CHARACTERISTICS P2781X at VDD=3.3V and Temp = +25oC

Symbol Parameter

Min Typ Max Unit

VIL Input Low Voltage GND – 0.3 - 0.8 V

VIH Input High Voltage 2.0 - VDD + 0.3 V

IIL Input Low Current (internal input pull-up

resistor on FS0 and FS1) - 60 -

µA

IIH Input High Current (internal input pull-up

resistor on FS0 and FS1) - 0 -

µA

IXOL

XOUT Output Low Current - 10 - mA

IXOH

XOUT Output High Current - 10 - mA

VOL Output Low Voltage (VDD = 3.3V, IOL = 20 mA) - - 0.4 V

VOH Output High Voltage (VDD = 3.3V, IOH = 20 mA) 2.5 - - V

IDD Static Supply Current - 3 - mA

ICC Typical Dynamic Supply Current

(25pF scope probe loading) 5.2

@ 3 MHz 21.2

@ 82 MHz mA

VDD Operating Voltage 3.0 3.3 3.6 V

tON

Power Up Time (CLOOP=0.1µF, at 16MHz,

first locked clock cycle after power up) - 7 - mS

ZOUT Clock Output Impedance (at 16MHz) - 28 - Ω

AC ELECTRICAL CHARACTERISTICS at VDD=3.3V and Temp = +25oC

Symbol Parameter Min Typ Max Unit

fIN Input Frequency: P278XX 3 78 MHz

fOUT Output Frequency: P2781X

P2782X

P2784X

156

312

MHz

tLH

P278XX Output Rise Time (measured at 0.8V to 2.0V,

25pF scope probe loading) 1 ns

tHL

P278XX Output Fall Time (measured at 2.0V to 0.8V,

25pF scope probe loading) 1 ns

tJC

P2781X Jitter (cycle to cycle, +/-6sigma, 1000 sweeps,

+/-0.5% spread, I/O Frequency = 16 MHz) +/-

250 ps

P2781X Output Duty Cycle Deviation (error from 50%

duty cycle, 25pF scope probe loading) +/-1

@ 3 MHz +/-2

@ 82 MHz %

∆F

P278XX Frequency deviation tolerance from BW%

stated in Table2 -20 0 +20 %

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

7 of 9 http://www.pulsecore.com

Figure 5 - Mechanical Package Outline (8 Pin SOIC)

X278XA

LOT NUMBER

YYWW H

Figure 6 - Mechanical Package Outline (8 Pin TSSOP)

278xx

Lot #

YYWW

INCHES MILLIMETERS

SYMBOL MIN NOR MAX MIN NOR MAX

A 0.057 0.064 0.071 1.45 1.63 1.80

A1 0.004 0.007 0.010 0.10 0.18 0.25

A2 0.053 0.061 0.069 1.35 1.55 1.75

B 0.012 0.016 0.020 0.51 0.41 0.31

C 0.004 0.006 0.001 0.10 0.15 0.25

D 0.186 0.194 0.202 4.72 4.92 5.12

E 0.148 0.156 0.164 3.75 3.95 4.15

e 0.050 BSC 1.27 BSC

H 0.224 0.236 0.248 5.70 6.00 6.30

L 0.012 0.020 0.028 0.30 0.50 0.70

a 0° 5° 8° 0° 5° 8°

Note: Controlling dimensions are millimeters.

SOIC - 0.074 grams unit weight

INCHES MILLIMETERS

SYMBOL MIN NOR MAX MIN NOR MAX

A - - 0.047 - - 1.10

A1 0.002 - 0.006 0.05 - 0.15

A2 0.031 0.039 0.041 0.80 1.00 1.05

B 0.007 - 0.012 0.19 - 0.30

C 0.004 - 0.008 0.09 - 0.20

D 0.114 0.118 0.122 2.90 3.00 3.10

E 0.169 0.173 0.177 4.30 4.40 4.50

e 0.026 BSC 0.65 BSC

H 0.244 0.252 0.260 6.20 6.40 6.60

L 0.018 0.024 0.030 0.45 0.60 0.75

a 0° - 8° 0° - 8°

Note: Controlling dimensions are millimeters.

TSSOP - 0.034 grams unit weight

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

8 of 9 http://www.pulsecore.com

Ordering Information:

X 278XX- 08 XX

Available Ordering Numbers:

Ordering Number Marking Package Type QTY / Reel Temperature

X278XA-08ST X278XA 8 PIN SOIC, TUBE See flow

X278XA-08SR X278XA 8 PIN SOIC, TAPE & REEL 2,500 See flow

X278XA-08TT X278XA 8 PIN TSSOP, TUBE See flow

X278XA-08TR X278XA 8 PIN TSSOP, TAPE & REEL 2,500 See flow

X278XB-08TT X278XB 8 PIN TSSOP, TUBE See flow

X278XB-08TR X278XB 8 PIN TSSOP, TAPE & REEL 2,500 See flow

Flow

P=Com merci al Temperature Range (0°C to 70°C)

I =Industrial Temperature Range (-25°C to 85°C)

A = Automotive Temperature Range (-40°C to 125°C)

Device Number

Device Pi n Count

Package

ST=SOIC i n Tube

SR=SOIC in Tape and Reel

TT=TSSOP in Tube

TR=TSSOP in Tape and Reel

Alliance Semiconductor

Final Specification

P2781/82/84

Nov, 2002 PulseCore – A Division of Alliance Semiconductor

Revision F 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

9 of 9 http://www.pulsecore.com

Document Information History

REVISION DCR # ISSUE DATE DESCRIPTION OF CHANGE

E 221 Sep. 13, 2002 -Added P2781/82/84B as the alternative 8 TSSOP pinout

-Part numbering information

-AC characteristics to include output frequency for P2782/84

F 221.A Nov. 3, 2002 -Reduced the C1 capacitor value for the loop filter to 270pF for

deviation < =+/-1.00%