W24257
32K
×
8 CMOS STATIC RAM
Publication Release Date: February 2001
- 1 - Revision A16
GENERAL DESCRIPTION
The W24257 is a slow speed, low power CMOS static RAM organized as 32768 × 8 bits that operates
on a single 5-volt power supply. This device is manufactured using Winbond's high performance
CMOS technology.
FEATURES
Low power consumption:
Active: 325 mW (max.)
Standby: 75 µW (max.) (LL-version)
150 µW (max.) (L-version)
Access time: 70 nS (max.)
Single +5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Packaged in 28-pin 330 mil SOP,
standard type one TSOP (8 mm x 13.4 mm )
PIN CONFIGURATIONS
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
A13
#CS
#OE
#WE
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A14
A7
A6
A5
A12
A4
A3
A2
A1
A0
I/O2
I/O3
I/O1
SS
25
26
27
28
20
21
22
23
16
17
18
19
15
24
28-pin
SOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28-pin
TSOP
#OE
A11
A9
A8
A13
#WE
VDD
A14
A12
A7
A6
A5
A4
A3
A10
#CS
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
A0
A1
A2
VSS
V
BLOCK DIAGRAM
A0
.
.
#CS
A14
#WE
I/O1
I/O8
#OE
VDD
VSS
.
.
DATA I/O
DECODER
CONTROL
CORE
ARRAY
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0A14 Address Inputs
I/O1I/O8 Data Inputs/Outputs
#CS Chip Select Input
#WE Write Enable Input
#OE Output Enable Input
VDD Power Supply
VSS Ground
W24257
- 2 -
TRUTH TABLE
#CS
#OE
#WE
MODE I/O1
I/O8 VDD CURRENT
H X X Not Selected High Z ISB, ISB1
L H H Output Disable High Z IDD
L L H Read Data Out IDD
L X L Write Data In IDD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to VSS Potential -0.5 to +7.0 V
Input/Output to VSS Potential -0.5 to VDD +0.5 V
Allowable Power Dissipation 1.0 W
Storage Temperature -65 to +150 °C
Operating Temperature 0 to +70 °C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Operating Characteristics
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C for LL/L; -20 to 85° C for LE)
PARAMETER SYM.
TEST CONDITIONS MIN.
TYP.
MAX. UNIT
Input Low Voltage VIL - -0.5
- +0.8 V
Input High Voltage VIH - +2.2
- VDD +0.5
V
Input Leakage Current
ILI VIN = VSS to VDD -2 - +2 µA
Output Leakage
Current ILO VI/O = VSS to VDD, #CS = VIH
(min.) or #OE = VIH (min.) or
#WE = VIL (max.)
-2 - + 2 µA
Output Low Voltage VOL
IOL = +4.0 mA - - 0.4 V
Output High Voltage VOH
IOH = -1.0 mA 2.4 - - V
Operating Power
Supply Current IDD #CS = VIL (min.),
I/O = 0 mA Cycle = min.,
Duty = 100%
- - 70 mA
Standby Power
Supply Current ISB #CS = VIH (min.)
Cycle = min., Duty = 100% - - 3 mA
ISB1
#CS VDD -0.2V LL/LE
- - 15 µA
L - - 30 µA
Note: Typical characteristics are at VDD = 5V, TA = 25° C.
W24257
Publication Release Date: February 2001
- 3 - Revision A16
CAPACITANCE
(VDD = 5V, TA = 25° C, f = 1 MHz)
PARAMETER SYM. CONDITIONS MAX. UNIT
Input Capacitance CIN VIN = 0V 6 pF
Input/Output Capacitance CI/O VOUT = 0V 8 pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER CONDITIONS
Input Pulse Levels 0.6V to 2.4V
Input Rise and Fall Times 5 nS
Input and Output Timing Reference Level 1.5V
Output Load CL = 100 pF, IOH/IOL = -1 mA/4 mA
AC Test Loads and Waveform
90% 90%
5 nS
10%
5 nS 10%
R1 1000 ohm
5V
OUTPUT
R2
660 ohm
5 pF R2
660 ohm
R1 1000 ohm
5V
OUTPUT
100 pF
Including
Jig and
Scope
3.0V
0V
Including
Jig and
Scope
)
(ForTCLZ,,,,,
TOLZ TCHZ TOHZ TWHZ TOW
W24257
- 4 -
AC Characteristics, continued
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C for LL/L; -20 to 85° C for LE)
Read Cycle
PARAMETER SYMBOL
W24257-70 UNIT
MIN. MAX.
Read Cycle Time TRC 70 - nS
Address Access Time TAA - 70 nS
Chip Select Access Time TACS - 70 nS
Output Enable to Output Valid TAOE - 35 nS
Chip Selection to Output in Low Z TCLZ* 10 - nS
Output Enable to Output in Low Z TOLZ* 5 - nS
Chip Deselection to Output in High Z TCHZ* - 30 nS
Output Disable to Output in High Z TOHZ* - 30 nS
Output Hold from Address Change TOH 10 - nS
These parameters are sampled but not 100% tested
Write Cycle
PARAMETER SYMBOL
W24257-70 UNIT
MIN. MAX.
Write Cycle Time TWC 70 - nS
Chip Selection to End of Write TCW 60 - nS
Address Valid to End of Write TAW 60 - nS
Address Setup Time TAS 0 - nS
Write Pulse Width TWP 45 - nS
Write Recovery Time #CS, #WE
TWR 0 - nS
Data Valid to End of Write TDW 30 - nS
Data Hold from End of Write TDH 0 - nS
Write to Output in High Z TWHZ* - 30 nS
Output Disable to Output in High Z TOHZ* - 30 nS
Output Active from End of Write TOW 0 - nS
These parameters are sampled but not 100% tested
W24257
Publication Release Date: February 2001
- 5 - Revision A16
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
TRC
T
AA
TOH TOH
DOUT
Read Cycle 2
(Chip Select Controlled)
#CS
DOUT
TCLZ
TACS CHZ
T
Read Cycle 3
(Output Enable Controlled)
Address
TRC
#CS
DOUT
TAA
#OE
TAOE
TOLZ
TOH
CLZ
TCHZ
T
TACS TOHZ
W24257
- 6 -
Timing Waveforms, continued
Write Cycle 1
Address
#OE
#CS
#WE
DOUT
DIN
TWC
TWR
TCW
TWP
TAS
TOHZ (1, 4)
TDW TDH
TAW
Write Cycle 2
(
OE
= VIL Fixed)
Address
#CS
#WE
DOUT
DIN
TWC
TCW
TAS
TDH
TWR
TWP
TWHZ
DW
T
(2) (3)
TOW
TOH
AW
T
(1, 4)
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
W24257
Publication Release Date: February 2001
- 7 - Revision A16
DATA RETENTION CHARACTERISTICS
(TA = 0 to 70° C for LL/L; -20 to 85° C for LE )
PARAMETER SYM.
TEST CONDITIONS MIN.
TYP.
MAX.
UNIT
VDD for Data Retention VDR #CS VDD -0.2V 2.0
- - V
Data Retention Current IDDDR
#CS VDD -0.2V
LL/LE
- - 15 µA
VDD = 3V L - - 30 µA
Chip Deselect to Data Retention Time
TCDR
See data retention 0 - - nS
Operation Recovery Time TR Waveform TRC*
- - nS
TRC* = Read Cycle Time
DATA RETENTION WAVEFORM
4.5V V>2V
DATA RETENTION MODE
#CS
4.5V
=
=
DR
-0.2V
#CS1>VDD
VDD
TR
TCDR
VIH VIH
ORDERING INFORMATION
PART NO. ACCESS
TIME
(nS)
OPERATING
CURRENT
MAX. (mA)
STANDBY
CURRENT
MAX. (
µ
A)
OPERATING
TEMP.
(°C)
PACKAGE
W24257S-70LL 70 70 15 0 to 70 330 mil SOP
W24257S-70L 70 70 30 0 to 70 330 mil SOP
W24257S-70LE 70 70 15 -20 to 85 330 mil SOP
W24257Q-70LL 70 70 15 0 to 70 Standard type one TSOP
W24257Q-70L 70 70 30 0 to 70 Standard type one TSOP
W24257Q-70LE 70 70 15 -20 to 85 Standard type one TSOP
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in
applications where personal injury might occur as a consequence of product failure.
W24257
Publication Release Date: January 2001
- 8 - Revision A16
BONDING PAD DIAGRAM
23
X
Y
A14
A12
A7
A6
A5
A3
822
A2 A10
OEB
A11
A9
A8
WEB
VDDVDD
7
A4
A13
1
2
3
4
529 2425
26
27
630 28
11 12 13 15 16 17 18
A0 I/O0 I/O1 I/O2 VSS VSS I/O4 I/O5 I/O6
19
9
A1
10 20
CSB
14 21
I/O7I/O3
AC5394
PAD NO.
X Y
1 -232.25 1445.22
2 -351.70 1445.22
3 -471.15 1445.22
4 -590.60 1445.22
5 -710.05 1445.22
6 -829.50 1445.22
7 -992.79 1362.24
8 -992.79 -1306.11
9 -857.86 -1452.79
10 -738.41 -1452.79
11 -594.84 -1414.13
12 -451.06 -1414.13
13 -310.67 -1414.13
14 -171.78 -1405.28
15 24.45 -1405.28
16 151.80 -1414.13
17 298.07 -1414.13
18 443.28 -1414.13
19 588.20 -1414.13
20 732.84 -1414.13
21 871.11 -1452.79
22 992.75 -1312.15
23 992.75 1373.67
24 810.09 1445.22
25 690.64 1445.22
26 571.19 1445.22
27 451.74 1445.22
28 332.29 1445.22
29 120.25 1444.65
30 -93.23 1444.65
Note: For bare chip form (C.O.B.) applications, the substrate must be connected to VDD or left floating in the PCB layout.
W24257
Publication Release Date: January 2001
- 9 - Revision A16
PACKAGE DIMENSIONS
28-pin SO Wide Body
2
1
A
28 15
14
1
e
S
EH
b
Seating Plane
AA
yL
L
e
c
See Detail F
D
E
E
1
1
e
Detail F
1. Dimension D Max. & S include mold flash
or tie bar burrs.
2. Dimension b does not include dambar
protrusion/intrusion.
3. Dimension D & E include mold mismatch
and determined at the mold parting line.
.
0.250.20
0.0100.008
Notes:
Symbol Min. Nom. Max. Max.
Nom.
Min.
Dimension in Inches Dimension in mm
A
b
c
D
e
HE
L
y
A
A
LE
1
2
E
0.014 0.36
0.112 2.85
0.004
0.093
0.014
0.098
0.016
0.103
0.020
2.36
0.36
0.10
2.49
0.41
2.62
0.51
0.059
0.004
010
0.713
0.067
0.733
0.075 1.50
18.11
1.70
18.62
1.91
0.477
0.4650.453 12.1211.8111.51
10
0
0.10
8.53
8.41
8.28
0.3360.331
0.326
0.71 0.91 1.12
0.028 0.036 0.044
4. Controlling dimension: Inches.
5. General appearance spec should be based
on final visual inspection spec.
1.12 1.27 1.420.044 0.050 0.056
S1.19
0.047
θ
28-pin Standard Type One TSOP
A
A
A
2
1
L
L1
Y
c
E
H
D
D
b
e
Controlling dimension: Millimeters
Min.
Dimension In Inches
Nom. Max. Min. Nom. Max.
Symbol
1.20
0.05 0.15
1.05
1.00
0.95
0.17
0.10
11.70
7.90
13.20
0.50
0.00
0
0.20 0.27
0.15 0.21
11.80 11.90
8.00 8.10
13.40 13.60
0.55
0.60 0.70
0.25
0.10
3 5
0.047
0.006
0.041
0.040
0.035
0.007 0.008 0.011
0.004 0.006 0.008
0.461 0.465 0.469
0.311 0.315 0.319
0.520 0.528 0.536
0.022
0.020 0.024 0.028
0.010
0.000 0.004
035
0.002
A
A
b
c
D
E
e
L
L
Y
1
1
2
A
HD
θ
Dimension In mm
θ
1
W24257
- 10 -
VERSION HISTORY
VERSION DATE PAGE DESCRIPTION
A12 Nov. 1999 1, 2, 7 Change the IDD, ISB, ISB1
4, 7 Remove the W24257-10 spc.
A13 Apr. 2000 7 Typo correction in Standby Current Max.: mA->µA
A14 May 2000 1, 7, 8 Delete 28-pin DIP Package
8 Add in Bonding Pad Diagram
A15 Nov. 2000 2 Modify Operating Power Supply Current (IDD) as 70 mA
1 Add in TSOP Pin Configuration
A16 Feb. 2001 2, 4, 7 Add in LE grade
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5796096
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City,
No. 378 Kwun Tong Rd;
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
TEL: 408-9436666
FAX: 408-5441798
Note: All data and specifications are subject to change withou t notice.
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5796096
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City,
No. 378 Kwun Tong Rd;
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
TEL: 408-9436666
FAX: 408-5441798
Note: All data and specifications are subject to change withou t notice.