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Document No. DOC-18314-3 www.psemi.com ©20082019 pSemi Corp. All rights reserved.
RF1 RF2
V1
5050CMOS
Control
Driver
ESD ESD
V2
RFC
ESD
The PE4251 is a HaRP™ technology-enhanced absorptive
single pole double throw (SPDT) RF switch for use in general
switching applications and mobile infrastructure. This device
offers a flexible supply voltage of 3.3/5V, single-pin or
complementary pin control inputs and 4 kV ESD tolerance. It
presents a simple alternative solution to pin diode and
mechanical relay switches.
pSemi’s HaRP™ technology enhancements deliver high
linearity and exceptional performance. It is an innovative
feature of the UltraCMOS® process, providing performance
superior to GaAs with the economy and integration of
conventional CMOS.
Product Specification
UltraCMOS® SPDT RF Switch
104000 MHz, Absorptive
Product Description
Figure 1. Functional Diagram
PE4251
Features
HaRP™ technology enhanced
Low insertion loss: 0.60 dB @ 1000 MHz
High isolation: 62 dB @ 1000 MHz
P1dB typical: +30.5 dBm
IIP3 typical: +59 dBm
Fast switching time: 150 ns
Flexible supply voltage: 3.3V ±10% or
5.0V ±10% supply (see Table 3)
Excellent ESD protection: 4000V HBM
No blocking capacitors required
Single pin or complementary control
inputs
Figure 2. Package Type
8-lead MSOP with exposed paddle
Table 1. Target Electrical Specifications Temp = +25 °C, VDD = 3.3V or 5.0V
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. Absolute maximum rating of PIN = 27 dBm.
Parameter Condition Min Typ Max Unit
Operation frequency1 10 4000 MHz
Insertion loss (RF1/RF2)
10 MHz 0.55 0.60 dB
1000 MHz 0.60 0.70 dB
2000 MHz 0.75 0.85 dB
3000 MHz 0.75 0.90 dB
4000 MHz 1.0 dB
Isolation (RFC to RF1/RF2)
1000 MHz 61 62 dB
2000 MHz 51 53 dB
3000 MHz
4000 MHz
42
43
37 dB
dB
Return loss
1000 MHz 26 dB
2000 MHz 23 dB
3000 MHz
4000 MHz 22
19 dB
dB
Input 1dB compression2 504000 MHz 30.5 dBm
Input IP3 504000 MHz, +18 dBm per tone, 5 MHz spacing 59 dBm
Switching time 50% CTRL to 10/90% RF 150 300 ns
Product Specification
PE4251
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©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 UltraCMOS® RFIC Solutions
Table 1A. Target Electrical Specifications Temp = +125 °C, VDD = 3.3V or 5.0V
Note: * Absolute maximum rating of PIN = 22 dBm.
Parameter Condition Min Typ Max Unit
Operation frequency 50 4000 MHz
Insertion loss (RF1/RF2)
50 MHz 0.65 dB
1000 MHz 0.75 dB
2000 MHz 0.90 dB
3000 MHz
4000 MHz 1.05
1.2 dB
dB
Isolation (RFC to RF1/RF2)
1000 MHz 62 dB
2000 MHz 52 dB
3000 MHz
4000 MHz 43
36 dB
dB
Return loss
1000 MHz 24 dB
2000 MHz 23 dB
3000 MHz
4000 MHz 19
18 dB
dB
Input 1dB compression* 504000 MHz 30.5 dBm
Input IP3 504000 MHz, +18 dBm per tone, 5 MHz spacing 57 dBm
Switching time 50% CTRL to 10/90% RF 200 ns
Product Specification
PE4251
©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 www.psemi.com
Page 3 of 10
Table 2. Pin Descriptions
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Immunity
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Table 3. Operating Ranges
Note: * All RF pins must be DC blocked with an external series capacitor or
held at 0 VDC.
Figure 3. Pin Configuration (Top View)
Pin # Pin Name Description
1 V2
This pin supports two interface options:
Single-pin control mode. A nominal 3-volt
supply connection is required.
Complementary-pin control mode. A
complementary CMOS control signal to
V1 is supplied to this pin.
2 V1 Switch control input, CMOS logic level.
3 RFC RF common port.*
4 N/C or GND No connect or ground
5 RF1 RF1 port.*
6 GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
7 GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
8 RF2 RF2 port.*
Paddle GND Exposed ground paddle. Ground for
proper device operation
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Switching Frequency
The PE4251 has a maximum 25 kHz switching
rate.
4251
1
2
3
4
8
7
6
5
V2
V1
RFC
N/C or
GND
RF2
GND
GND
RF1
Exposed ground paddle
Note: * Customer must choose either 3.3V or 5.0V power supply range.
Table 4. Absolute Maximum Ratings
Symbol Parameter/Condition Min Max Unit
VDD Power supply voltage 3 5.5 V
VI Voltage on any control input 0.3 5.5 V
TST Storage temperature range 65 +150 C
PIN
RF input power (50Ω)
10 MHz4 GHz, +85 °C
50 MHz4 GHz, +125 °C
27
22
dBm
dBm
VESD
ESD voltage, HBM
ESD voltage, MM (machine model) 4000
250
V
V
Note: 1. Human body model (MIL_STD 883 Method 3015).
2. Machine model (JEDEC JESD22-A115).
Parameter Min Typ Max Unit
VDD power supply
voltage*
3.0
4.5
3.3
5.0
3.6
5.5
V
V
IDD power supply current
VDD = VCNTL= 3.3V
VDD = VCNTL= 5.0V
55
75
60
80
µA
µA
Control voltage high 0.8 × VDD V
Control voltage low 0.2 × VDD V
PIN RF input power (50Ω)
10 MHz4 GHz, +85 °C
50 MHz4 GHz, +125 °C
27
22
dBm
dBm
TOP operating
temperature range 40 +25 +125 °C
TST storage temperature
range 65 +25 +150 °C
Moisture Sensitivity Level
The moisture sensitivity level rating for the
PE4251 in the 8-lead MSOP package is MSL1.
Product Specification
PE4251
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©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 UltraCMOS® RFIC Solutions
Control Logic Input
The PE4251 is a versatile RF CMOS switch that
supports two operating control modes: single-pin
control mode and complementary-pin control
mode.
Single-pin control mode enables the switch to
operate with a single control pin (pin 2) supporting
a +3.3 or 5.0-volt CMOS logic input, and requires
a dedicated +3.3 or 5.0-volt power supply
connection (pin 1). This mode of operation
reduces the number of control lines required and
simplifies the switch control interface typically
derived from a CMOS μProcessor I/O port.
Complementary-pin control mode allows the
switch to operate using complementary control
pins V1 and V2 (pins 2 & 1), that can be directly
driven by +3.3 or 5.0-volt CMOS logic or a suitable
μProcessor I/O port. This enables the PE4251 to
operate in positive control voltage mode within the
PE4251 operating limits.
Control Voltages Signal Path
Pin 1 (V2) = VDD
Pin 2 (V1) = High RFC to RF1
Pin 1 (V2) = VDD
Pin 2 (V1) = Low RFC to RF2
Table 5. Single-pin Control Logic Truth Table
Table 6. Complementary-pin Control Logic
Truth Table
Control Voltages Signal Path
Pin 1 (V2 ) = Low
Pin 2 (V1) = High RFC to RF1
Pin 1 (V2) = High
Pin 2 (V1) = Low RFC to RF2
Product Specification
PE4251
©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 www.psemi.com
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NOTES:
4.3 Er AND 2.1MIL Cu
THICKNESS.
3. ALL TRANSMISION LINES ARE:
33MIL WIDTH, 10MIL GAPS, 28MIL CORE DIELECTRIC
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
2. CAUTION:
1. USE 101-0337-02 PCB.
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
or GND
R1
DNI
C2
100pF
1
2
J3
SMASM
1
2
J4
SMASM
1
2
J5
SMASM
1
2
J2
SMASM
C1
100pF
1
2
J6
SMASM
2V1
1V2
3RFC 6
GNDS1
7
GNDS2
8
RF2
4N/C 5
RF1
U1
MSOP
1
13
35
57
7
22
44
66
88
10 10 9
9
J1
HEADER 2 X 5 PIN
R2
0 OHM
R3
0 OHM
Evaluation Kit Figure 4. Evaluation Board Layouts
Figure 5. Evaluation Board Schematic
DOC-02389
PRT-53366
The SPDT switch evaluation kit board was designed to
ease customer evaluation of the PE4251 SPDT switch.
The RF common port is connected through a 50Ω
transmission line to the bottom SMA connector, J3. Port
1 and Port 2 are connected through 50Ω transmission
lines to two SMA connectors on either side of the
board, J4 and J2. A through transmission line connects
SMA connectors J5 and J6. This transmission line can
be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.0322”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a coplanar
waveguide with ground plane model using a trace width
of 0.033”, trace gaps of 0.010”, dielectric thickness of
0.028”, copper thickness of 0.0021” and εr of 4.3.
J1 provides a means for controlling the DC inputs to the
device. The second-to-bottom lower right pin (J13) is
connected to the device V1 input. The second-to-top
upper right pin (J17) is connected to the device V2
input. Footprints for decoupling capacitors are provided
on both V1 and V2 traces. It is the responsibility of the
customer to determine proper supply decoupling for
their design application. Removing these components
from the evaluation board has not been shown to
degrade RF performance.
Product Specification
PE4251
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©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 UltraCMOS® RFIC Solutions
Figure 9. Isolation: RFCRF @ 3.3V
Figure 8. Isolation: RFCRF @ +25 °C
Figure 6. Insertion Loss: RFCRF @ +25 °C Figure 7. Insertion Loss: RFCRF @ 3.3V
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0500 1000 1500 2000 2500 3000 3500 4000
Isolation (dB)
Frequency (MHz)
3.0 V 3.3 V 3.6 V 4.5 V 5.0 V 5.5 V
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
0500 1000 1500 2000 2500 3000 3500 4000
Insertion Loss (dB)
Frequency (MHz)
3.0 V 3.3 V 3.6 V 4.5 V 5.0 V 5.5 V
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0500 1000 1500 2000 2500 3000 3500 4000
Isolation (dB)
Frequency (MHz)
- 40°C +25°C +85°C
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
0500 1000 1500 2000 2500 3000 3500 4000
Insertion Loss (dB)
Frequency (MHz)
- 40°C +25°C +85°C
Product Specification
PE4251
©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 www.psemi.com
Page 7 of 10
Figure 10. Return Loss at Active Port @ +25 °C Figure 11. Return Loss at Active Port @ 3.3V
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Return Loss (dB)
Frequency (MHz)
- 40°C +25°C +85°C
Product Specification
PE4251
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©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 UltraCMOS® RFIC Solutions
Figure 12. Package Drawing
8-lead MSOP
DOC-01889
Product Specification
PE4251
©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 www.psemi.com
Page 9 of 10
Figure 14. Tape and Reel Specifications
8-lead MSOP with exposed paddle
Pin1
Figure 13. Top Marking Specification
4251
LLLL
YWW
AAAA: Product Number, last 4 digits, Exp.
LLLL: Last four digits of the Assembly lot number
YWW: Date Code, last digit of the year and work week
Product Specification
PE4251
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©20082019 pSemi Corp. All rights reserved. Document No. DOC-18314-3 UltraCMOS® RFIC Solutions
Sales Contact and Information
For Sales and contact information please visit www.psemi.com.
Table 7. Ordering Information
Order Code Description Package Shipping Method
EK4251-01 PE4251 Evaluation kit Evaluation kit 1 / Box
PE4251MLI-Z PE4251 SPDT RF switch Green 8-lead MSOP, exposed paddle 2000 units / T&R