
LMK040XX-REV3 EVALUATION BOARD OPERATING INSTRUCTIONS
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Table of Contents
TABLE OF CONTENTS ....................................................................................................................... 2
GENERAL DESCRIPTION ................................................................................................................... 4
Evaluation Board Kit Contents ................................................................................................................................... 4
Available Evaluation Boards ...................................................................................................................................... 4
Available LMK04000 Family NSIDs ......................................................................................................................... 5
QUICK START ................................................................................................................................... 6
Default CodeLoader modes for evaluation boards ..................................................................................................... 7
USING CODELOADER TO PROGRAM THE LMK040XXB ................................................................... 8
1. Start CodeLoader 4 Application ............................................................................................................................. 8
2. Select Device .......................................................................................................................................................... 8
3. Program/Load Device ............................................................................................................................................. 9
4. Restoring a Default Mode ...................................................................................................................................... 9
5. Visual Confirmation of Frequency Lock .............................................................................................................. 10
6. Enable Fout........................................................................................................................................................... 10
7. Enable Clock Outputs ........................................................................................................................................... 11
PLL LOOP FILTERS AND LOOP PARAMETERS ................................................................................. 12
PLL 1 Loop Filter ..................................................................................................................................................... 12
122.88 MHz VCXO option ................................................................................................... 12
12.288 MHz Crystal (-XO) option ........................................................................................ 12
PLL2 Loop Filter ...................................................................................................................................................... 13
122.88 MHz VCXO (Reference Input) ................................................................................. 13
12.288 MHz Crystal (-XO) option (Reference Input) .......................................................... 13
EVALUATION BOARD INPUTS/OUTPUTS ......................................................................................... 14
RECOMMENDED TEST EQUIPMENT ................................................................................................. 17
APPENDIX A: CODELOADER USAGE .............................................................................................. 18
Port Setup Tab .......................................................................................................................................................... 18
Clock Outputs Tab .................................................................................................................................................... 19
PLL1 Tab .................................................................................................................................................................. 20
PLL2 Tab .................................................................................................................................................................. 21
Bits/Pins Tab ............................................................................................................................................................ 22
Registers Tab ............................................................................................................................................................ 24
APPENDIX B: TYPICAL PHASE NOISE PERFORMANCE PLOTS ......................................................... 25
PLL1 ......................................................................................................................................................................... 25
Crystek 122.88 MHz VCXO................................................................................................. 25
Vectron 12.288 MHz Crystal ................................................................................................ 26
PLL2 ......................................................................................................................................................................... 27
Clock Outputs ........................................................................................................................................................... 28
Clock Output Measurement Technique ................................................................................ 28
LMK040x0B Phase Noise ........................................................................................................................................ 29
LMK040x1B Phase Noise ........................................................................................................................................ 30
LMK040x2B Phase Noise ........................................................................................................................................ 31
LMK040x3B Phase Noise ........................................................................................................................................ 32
APPENDIX C: SCHEMATICS ............................................................................................................ 33
Power ........................................................................................................................................................................ 33
Main ......................................................................................................................................................................... 34
Clock Outputs ........................................................................................................................................................... 35
APPENDIX D: BOARD LAYERS STACKUP ....................................................................................... 36
APPENDIX E: BILL OF MATERIALS ................................................................................................ 37
Common Bill of Materials for Evaluation Boards .................................................................................................... 37