For further information contact your local STMicroelectronics sales office.
September 2013 DocID025324 Rev 1 1/7
STEVAL-CCM007V2
STM32-based NAND Flash driver
demonstration board (with TFT MB785/P)
Data brief
Features
•Designed for 512 byte and 2 kilobyte page size
NAND Flash interfacing using the FSMC
interface of the STM32
•Supports both the FAT (ELM_FS) file system
and USB mass storage device mode
•Supports garbage collection, wear leveling,
bad block management & ECC check
•Displays BMP images stored in NAND Flash
on MB785 TFT
•RoHS compliant
Description
The STEVAL-CCM007V2 is a demonstration
board for a NAND Flash driver based on the
STM32F205ZET6 microcontroller.
It supports 512 byte and 2 kilobyte page SLC
NAND Flash, and dynamic detection of NAND
Flash based on “Device ID”.
The firmware automatically detects which NAND
Flash is mounted on the PCB, and functions
accordingly.
STEVAL-CCM007V2
www.st.com
Schematic diagram STEVAL-CCM007V2
2/7 DocID025324 Rev 1
1 Schematic diagram
Figure 1. Microcontroller section circuit schematic
Figure 2. NAND Flash circuit schematic
VCAP
PH0_OSC_IN
PH1_OSC_OUT
3V3
NRST
3V3
VCAP
VCAP
GND
3V3
GND
3V3
GND
3V3
3V3
GND
GND
GND
3V3
PE3
PB8
PE2
PB9
GND
3V3
PB5_OTG_HS_ULPI_D7
GND
3V3
3V3
PA3_OTG_HS_ULPI_D0
PH0_OSC_IN
PB0_OTG_HS_ULPI_D1
PH1_OSC_OUT
GND
PA10_OTG_FS_ID_USB
PE2
PB1_OTG_HS_ULPI_D2
PC0_OTG_HS_ULPI_STP
PA13_JTAG_JTMS
PA11_OTG_FS_DM_USB
PG8_USB_PU
GND
3V3
PB8
3V3
PA15_JTAG_JTDI
PB9
PA12_OTG_FS_DP_USB
PA14_JTAG_JTCK
3V3
PB13_OTG_HS_ULPI_D6
3V3
PD0_FSMC_D2
PE3
PD1_FSMC_D3
PB12_OTG_HS_ULPI_D5
PF0_FSMC_ADDR_A0
PB7_I2C1_SDA
PD14_FSMC_D0
PD15_FSMC_D1
PB6_I2C1_SCL
PE7_FSMC_D4
PE10_FSMC_D7
PE9_FSMC_D6
PE8_FSMC_D5
PD5_FSMC_NWE
PD11_FSMC_ADDR_A16
PE11_FSMC_D8
PD12_FSMC_ADDR_A17
PE14_FSMC_D11
PE13_FSMC_D10
PE12_FSMC_D9
PD8_FSMC_D13
PE15_FSMC_D12
PD10_FSMC_D15
PD9_FSMC_D14
PD4_FSMC_NOE
NRST
PB10_OTG_HS_ULPI_D3
GND
GND
PC3_OTG_HS_ULPI_NXT
GND
3V3
GND
GND
PC2_OTG_HS_ULPI_DIR
PB3_JTAG_JTDO
3V3
PB4_JTAG_JNTRST
3V3
PA9_OTG_FS_VBUS_USB
PB11_OTG_HS_ULPI_D4
GND
PA5_OTG_HS_ULPI_CK
3V3
GND
PG10_FSMC_NE3
GND
PG7_FSMC_INT3
PG14_TSCREEN_INT
PG6_FSMC_INT2
PD6_FSMC_NWAIT
PD7_FSMC_NCE2
PG9_FSMC_NCE3
GND
For STM32F10xx
Mou
nt --- R1,R8,R11
DNM --- R3,R9
For STM32F2xxx & STM32F4xxx
Mount --- R3,R9
DNM --- R1,R8,R11
For STM32F10xx
Y1----- 8MHz
For STM32F2xxx & STM32F4xxx
Y1------ 25MHz
STM32F103ZET6/
STM32F205ZET6/
STM32F405ZGT6
11YY
zz
HH
MM
55
22
66
CC
FFnn0000
11
KK11
6611
CC
FFnn00
00
11
33CC
FF
pp00
22
99CC
FFnn
00
0011
00
11
RR
KK0011
11
DD
11
DD
EELL
__
TT
SSEETT
44
CC
FFuu
22
..
22
11JJ
1
2
3
33 KKLLBBRRTT NNNN
OO
C
C
11PP
TT
1
TT
NN
IIOO
PP
TT
SSEETT
1111
CC
FF
nn00
0011
KK
1
1
3311RR
22CC
FFpp0022
99
RR
mm
hhOO 00
7711
CC
FFnn
00
00
11
66RR
K
K11
22
DD
22
DDEELL__
T
T
SS
EETT
77
CC
FFnn
0
0
00
11
11RR
mmhhOO 00 22RR
KK
00
11
11WW
SS
NNOO
TT
TTUUBB
HHSSUUPP
88
RR
mmhh
OO
00
5511
CC
FFnn
0000
11
55CC
FFuu22
..
22
33
11
CC
FFnn
000011
11
UU
PB14 7
7
5
4
PB12
PB13 73
VDD_1
72 VCAP_1
71 PB11
70 PB10
69 PE15
68 PE14
67 PE13
66 PE12
65 PE11
64 PE10
63 VDD_7
62 VSS_7
61 PE9
60 PE8
59 PE7
58 PG1
9PC14-OSC32_IN
4
5
6
7
8
P
P
P
V
P
B
E
E
E
C
4
5
6
A
1
T
3-TAMPER-RTC
PF0
10 PC15-OSC32_OUT
PF1
11
PF2
12
PF3
13
16 PF5
1
1
5
4PF4
3
1
2P
P
E
E
2
3
17 VSS_5
2
2
8
9PC2
18 VDD_ 5
19 PF6
OSC_OUT
NRST
25
PC0
2
2
2
2
2
0
1
2
3
4
P
P
P
P
O
F
F
F
F
S
7
8
9
1
C
0
_IN
26
PC1
27
3
3
0
1
P
VD
C3
D_12
36 P
P
A
A
1
2
3
3
3
3
2
3
4
5
V
V
V
P
S
R
D
A0
S
E
D
_
A
F
A
W
+
KUP
VDD_4
3
3
3
7
8
9
P
V
A
S
3
S_4
PA4
40
PA5
41
PA6
42
PA7
43
57 PG0
56 PF15
55 PF14
54 PF13
53 VDD_6
52 VSS_6
50 PF11
49 PB2-BOOT1
51 PF12
48 PB1
47 PB0
46 PC5
4
4
5
4PC4
PB15 76
PD8 77
PD9 78
79
PD10
PD11 80
81
PD12
PD13 82
83
VSS_8
84
VDD_8
PD14 85
PD15 86
PG2 87
PG3 88
PG4 89
PG5 90
PG6 91
PG7 92
PG8 93
94
VSS_9
95
VDD_9
PC6 96
PC7 97
PC8 98
PC9 99
PA8 100
PA9 101
PA10 102
PA11 103
PA12 104
PA13 105
VCAP_ 2 106
VSS_2 107
VDD_2 108
PA14 109
PA15 110
PC10 111
PC11 112
PC12 113
PD0 114
PD1 115
PD2 116
PD3 117
PD4 118
PD5 119
VSS_10
VD
P
P
P
P
P
D
P
P
P
G
G
G
G
G
_
G
D
D
1
1
1
1
1
1
0
6
7
9
0
1
2
3
4
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
1
0
5
6
7
8
4
2
3
VSS_11 129
P
P
B
B
8
9
1
1
3
3
8
9
V
B
D
O
P
D
P
P
P
P
P
O
G
_
B
B
B
B
B
T
1
1
1
3
4
5
6
7
5
0
1
1
1
1
1
1
1
1
3
3
3
3
3
3
3
3
1
0
2
3
4
5
6
7
VD
P
P
D
E
E
_3
0
1
1
1
1
4
4
4
0
1
2
VDD_SA 1
1
4
4
3
4
88CC
FFnn00
0011
33RR
mmhhOO 00
55
RR
KK
11
44RR
KK
00
11
22
11CC
FFnn
00
0
011
4411
CC
FFnn00
0
0
11
22JJ
1
2
3
33
KK
LL
BBRRTT NNNNOOCC
11CC
FFnn000011
11
11RR
mmhhOO 00
77
RR
00
9933
00
11CC
FF
nn
0000
11
AM17678v1
3V3 3V3_NAND1
3V3 3V3_NAND2
PD14_FSMC_D0
PD15_FSMC_D1
PD0_FSMC_D2
PD1_FSMC_D3
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PE10_FSMC_D7
PD11_FSMC_ADDR_A16
PD12_FSMC_ADDR_A17
PD5_FSMC_NWE
PD4_FSMC_NOE
3V3_NAND1
GND
GND
3V3_NAND13V3_NAND1
3V3_NAND1
GND
GND
3V3_NAND1
PD6_FSMC_NWAIT
PG6_FSMC_INT2
3V3_NAND1
PE10_FSMC_D7
PD5_FSMC_NWE
3V3_NAND2 3V3_NAND2
GND
GND
PD4_FSMC_NOE
GND
3V3_NAND2
GND
PD14_FSMC_D0
PD15_FSMC_D1
3V3_NAND2
3V3_NAND2
PD0_FSMC_D2
PD11_FSMC_ADDR_A16
PD1_FSMC_D3
PD12_FSMC_ADDR_A17
3V3_NAND2
PD6_FSMC_NWAIT
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PG7_FSMC_INT3
PD7_FSMC_NCE2 PG9_FSMC_NCE3
Mount One at a time Mount One at a time
DNM: R25, R27
55
33RR
KK
0011
1144RR
KK00
11
mm
hh
OO 005522RR
11
22
CC
FF
nn
0000
11
mm
hh
OO
00
7722RR
11
22
RR
KK0011
mm
hh
OO
0066
22RR
44
22CC
FF
n
n
000011
55
22
CC
FFnn
00
00
11
5555
RR
mm
hhOO
00
6655
RR
mm
hh
OO 00
99
1
1
CC
FF
nn00
00
11
33UU
NC
1
2NC
BB22
1155DDNNAANN
NC
3
4NC
5NC
NC
6
7RB
R
8
E
9
NC
10
NC
11
VDD
12
VSS
13
NC
14
NC
15
CL
16
AL
17
W
18
WP
19
NC
20
NC
21
NC
22
NC
23
NC
24 NC 25
NC 26
NC 27
NC 28
I/O0
I/O1 29
I/O2 30
I/O5 41
V
I
I
V
/
/
D
N
N
N
N
N
N
S
O
O
D
C
C
C
C
C
C
S
3
4
3
3
3
3
3
3
3
3
4
3
1
2
7
3
4
5
8
9
0
6
I/O6 42
I/
N
N
N
N
O
C
C
C
C
74
4
4
4
4
4
3
4
5
6
7
8
22
22RR
KK0011
22
UU
1NC
NC
2
BB
221155
DD
NN
AA
NN
NC
3
4NC
NC
5
6NC
7RB
R
8
E
9
NC
10
NC
11
VDD
12
VSS
13
NC
14
NC
15
CL
16
AL
17
W
18
WP
19
NC
20
NC
21
NC
22
NC
23
NC
24 NC 25
NC 26
NC 27
NC 28
I/O0
I/O1 29
I/O2 30
I/O5 41
V
I
I
V
/
/
D
N
N
N
N
N
N
S
O
O
D
C
C
C
C
C
C
S
3
4
3
3
3
3
3
3
3
3
4
3
1
2
7
3
4
5
8
9
0
6
I/O6 42
I/
N
N
N
N
O
C
C
C
C
74
4
4
4
4
4
3
4
5
6
7
8
22
44
RR
KK
0011
8811
CC
FFnn
00
0
0
110022RR
KK0011
99
11RR
KK
0011
0022
CC
FFnn00
00
11
3333RR
KK
0011
8822
R
R
mm
hhOO
22
22
mmhh
OO
00
0033
RR
99
22
RR
mmhh
OO
22
22
AM17679v1
DocID025324 Rev 1 3/7
STEVAL-CCM007V2 Schematic diagram
7
Figure 3. USB full speed circuit schematic
Figure 4. JTAG connector circuit schematic
USB5V_FS
PA11_OTG_FS_DM_USB
PA12_OTG_FS_DP_USB
PA12_OTG_FS_DP_USB
PA9_OTG_FS_VBUS_USB
PA10_OTG_FS_ID_USB
PG8_USB_PU
kk
11
00
44RR
22
33
RR
22
22
44
UU
VB
I/
U
O
S
24
66PP22--
66
CC
LL
BB
SS
UU
I/O1 5
6
1
2I/O1
3I/
G
O
N
2
D
44
11
RR
kk
55
..
11
00
6633RR
44
JJ
1
2USB_VCC
3
4
U
U
S
S
B
B
D
DP
M
EE
PP
YY
TT
BB
//AAII
NN
IIMM
__
BB
SS
UU
USB_GND
SHELL 6
7
SHELL 8
5ID SHELL
SHELL 9
33
22
CC
FF
nn
7
7
..
44
44
33
RR
22
22
2222
CC
FFuu
00
11
11
33
RR
MM11
33DD
NNEEEERR
G
G
__
DD
EELL
AM17680v1
3V3
PB3_JTAG_JTDO
PA13_JTAG_JTMS
PB3_JTAG_JTDO
PA14_JTAG_JTCK
PB4_JTAG_JNTRST
NRST
PA15_JTAG_JTDI
DBGRQ
RTCK
DBGACK
PA13_JTAG_JTMS
PA15_JTAG_JTDI
3V3
PB4_JTAG_JNTRST
NRST
PA14_JTAG_JTCK
PB3_JTAG_JTDO
PA14_JTAG_JTCK
PB4_JTAG_JNTRST
NRST
PA13_JTAG_JTMS
NRST
PA15_JTAG_JTDI
6
6
11
RR
kk
00
11
55
JJ
NN
NN
OOCC__GGAA
TT
JJ
10
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
99
33
RR
kk0011
77
33RR
kk
00
11
00
33
22RR
77
11
RR
kk
00
11
55
11
RR
kk
00
1
1
44
2
2
RR
kk00
11
88
11RR
kk
00
11
8833
RR
kk00
11
AM17681v1
Schematic diagram STEVAL-CCM007V2
4/7 DocID025324 Rev 1
Figure 5. USB high speed circuit schematic
Figure 6. Touch screen controller circuit schematic
3V3_HS
XTAL1
XTAL2
USB5V_HS
XTAL1
PB12_OTG_HS_ULPI_D5
PA3_OTG_HS_ULPI_D0
XTAL2
PB0_OTG_HS_ULPI_D1
PC2_OTG_HS_ULPI_DIR
PC0_OTG_HS_ULPI_STP
PB1_OTG_HS_ULPI_D2
PA5_OTG_HS_ULPI_CK
PC3_OTG_HS_ULPI_NXT
PB13_OTG_HS_ULPI_D6
PB5_OTG_HS_ULPI_D7
PB10_OTG_HS_ULPI_D3
3V3
PB11_OTG_HS_ULPI_D4
3V3_HS
66
4
4
CC
FFuu77
..
44
33
44
CC
FF
uu
11..00
0033
CC
F
F
uu
11..
00
9922
CC
FF
uu11
.
.
00
KK114444RR
77JJ
1
2USB_VCC
3
4
U
U
S
S
B
B
D
DP
M
USB_GND
SHELL 6
SHELL 7
5ID
5544CC
FF
pp3333
1144CC
FF
pp
3
3
33
0022887744RR
2244
CC
FFuu11..00
KK22116644RR
66DD
NN
EEEERRGG__
DD
EE
LL
00
2255RR
MM
11
00
55
RR
66UU
00003333BBSSUU
EXTVBUS 32
REG_EN 1
3
6
1
VDD3.3 30
2
2
9
6VDDA1.8 X
X
O
I28
VDD3.3 27
VDD1.8
VDD3.3 25
GND 2
GND 3
RBIAS 4
D
ID
P5
VDD3.3 6
DM 7
STP
13
14 CLKOUT
15 VDD1.8
GNDPAD 3
1
3
1
9
1RESET
DATA7
17 DATA6
18 DATA5
19 DATA4
20 DATA3
21 DATA2
22 DATA1
2
2
3
4DATA0
DIR
12 NXT
CPEN 10
VBUS 8
++
6633
CC
F
F
uu77..
44
44
44
CC
FF
uu77..44
77
22C
C
F
F
uu11..00
22
YY
zzHH
MM
44
22
3344
RR
KK0011
8822
CC
FFuu11..
00
11LL
BBEEAADD
AM17682v1
SDAT
PB6_I2C1_SCL
3V3
3V3
PB7_I2C1_SDA
AGND
AGND
AGND
3V3
TSC_YD
SDAT
TSC_YU
TSC_XR
TSC_YD
TSC_XL
AGND
AGND
AGND
TSC_XR
SCLK
TSC_YU
TSC_XL
PG14_TSCREEN_INT
AGND
3V3
AGND
SCLK
GNDAGND
11
33
CC
FF
pp
22
88
44
RR
KK77
..44
2233
CC
FF
pp
22
11
55
RR
22
22
7733
CC
FF
uu
11
22
LL
BBEEAADD
33
33
CC
FFpp
22
00
77
55
RR
44
55RR
kk
00
11
77
UU
1Y-
2INT
11
1188
EE
PPMM
TT
SS
3A0
4SCLK
SDAT 5
VCC 6
DATA_IN 7
IN0 8
IN1 9
GND 10
IN2 11
IN3 12
13 X+
14 VIO
15 Y+
16 X-
44
33
CC
FF
pp22
22
22
3355
RR
7744CC
FFnn
0000
11
99
44RR
KK
77
..
44
00
44
CC
FFuu0011
99
33
CC
FF
nn00
0011
8833
CC
FF
nn0000
11
AM17683v1
DocID025324 Rev 1 5/7
STEVAL-CCM007V2 Schematic diagram
7
Figure 7. Power section circuit schematic
Figure 8. TFT connector circuit schematic
Figure 9. NAND signals circuit schematic
USB5V_FS 3V3
GND
5V0
GND 3V3
USB5V_HS
44
DD
UU0033LL11SSPPTTSS 5
5UU
4VIN
VO
N
U
C
T5
RR
TT
3333DD771111
11
DD
LL
1GND
2VOUT
3VOUT
VO
N
U
C
T
8
6
7
77DD
NN
EEEE
RR
GG__D
D
EELL
55DD
UU
0033LL11SSPPTTSS
kk
11
5544RR
8844CC
FF
uu0011
66
22
CC
FF
uu0011
5533CC
FFnn
000011
AM17684v1
PD4_FSMC_NOE
GND
PE7_FSMC_D4
PD9_FSMC_D14
PE14_FSMC_D11
TSC_XR
PF0_FSMC_ADDR_A0
PE11_FSMC_D8
PE8_FSMC_D5
GND
PD10_FSMC_D15
PE12_FSMC_D9
TSC_YU
PD0_FSMC_D2
TSC_YD
3V3
PE15_FSMC_D12
PD5_FSMC_NWE
PE9_FSMC_D6
3V3
PD1_FSMC_D3
GND
5V0
PD8_FSMC_D13
PD14_FSMC_D0NRST
PG10_FSMC_NE3
PE13_FSMC_D10
PE10_FSMC_D7
TSC_XL
5V0
PD15_FSMC_D1
66JJ
1
3
5
7
9
11
13
22
xx
0022
RR
OO
TT
CC
EE
NNNN
O
O
CC
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
35 36
37 38
39 40
AM17685v1
PD15_FSMC_D1
PD0_FSMC_D2
PD1_FSMC_D3
PD5_FSMC_NWE
PD12_FSMC_ADDR_A17
PD11_FSMC_ADDR_A16
PD4_FSMC_NOE
PE10_FSMC_D7
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PD14_FSMC_D0
PD7_FSMC_NCE2
PD6_FSMC_NWAIT
PG6_FSMC_INT2
PG9_FSMC_NCE3
GND
PG7_FSMC_INT3
3V3
GND
33JJ
0022
NN
O
O
CC
10
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
AM17686v1
Revision history STEVAL-CCM007V2
6/7 DocID025324 Rev 1
2 Revision history
Table 1. Document revision history
Date Revision Changes
30-Sep-2013 1 Initial release.
DocID025324 Rev 1 7/7
STEVAL-CCM007V2
7
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