SFR/U9024 Advanced Power MOSFET FEATURES BVDSS = -60 V n Avalanche Rugged Technology RDS(on) = 0.28 n Rugged Gate Oxide Technology n Lower Input Capacitance ID = -7.8 A n Improved Gate Charge n Extended Safe Operating Area D-PAK n Lower Leakage Current : 10 A (Max.) @ VDS = -60V n Lower RDS(ON) : 0.206 (Typ.) I-PAK 2 1 1 3 2 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS Characteristic Value Drain-to-Source Voltage Continuous Drain Current (TC=25 C) -7.8 o Continuous Drain Current (TC=100 C) IDM Drain Current-Pulsed VGS Gate-to-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt 1 O 2 O 1 O 1 O O3 o Total Power Dissipation (TC=25 C) Linear Derating Factor TJ , TSTG TL A -5.5 o Total Power Dissipation (TA=25 C) * PD V -60 o ID Units Operating Junction and 31 A 30 V 155 mJ -7.8 A 3.2 mJ -5.5 V/ns 2.5 W 32 W 0.26 W/ C o - 55 to +150 Storage Temperature Range o Maximum Lead Temp. for Soldering C 300 Purposes, 1/8" from case for 5-seconds Thermal Resistance Symbol Characteristic Typ. Max. RJC Junction-to-Case -- 3.91 RJA Junction-to-Ambient * -- 50 RJA Junction-to-Ambient -- 110 Units o C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. C P-CHANNEL POWER MOSFET SFR/U9024 Electrical Characteristics (TC=25oC unless otherwise specified) Symbol Characteristic BVDSS Drain-Source Breakdown Voltage BV/TJ VGS(th) IGSS IDSS RDS(on) Min. Typ. Max. Units Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance -60 -- -- -- -0.04 -- -2.0 -- -4.0 -- -- -100 V nA See Fig 7 VDS=-5V,ID=-250A VGS=-20V VGS=20V -- 100 -- -10 -- -- -100 -- -- 0.28 VGS=-10V,ID=-3.9A 4 O S VDS=-30V,ID=-3.9A 4 O -- 3.7 -- Ciss Input Capacitance -- 465 600 Coss Output Capacitance -- 140 215 Crss Reverse Transfer Capacitance -- 40 60 td(on) Turn-On Delay Time -- 11 30 Rise Time -- 21 50 Turn-Off Delay Time -- 29 65 Fall Time -- 20 50 tf V/ C ID=-250A -- Forward Transconductance td(off) VGS=0V,ID=-250A o -- gfs tr V Test Condition Qg Total Gate Charge -- 15 19 Qgs Gate-Source Charge -- 2.9 -- Qgd Gate-Drain("Miller") Charge -- 6.0 -- A pF VDS=-60V o VDS=-48V,TC=125 C VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-30V,ID=-9.7A, ns RG=18 See Fig 13 4O 5 O VDS=-48V,VGS=-10V, nC ID=-9.7A See Fig 6 & Fig 12 4O 5 O Source-Drain Diode Ratings and Characteristics Symbol IS Characteristic Min. Typ. Max. Units Continuous Source Current -7.8 Test Condition -- -- -- -- -31 -- -- -3.8 V TJ=25 C,IS=-7.8A,VGS=0V A Integral reverse pn-diode ISM Pulsed-Source Current 1 O VSD Diode Forward Voltage O trr Reverse Recovery Time -- 80 -- ns TJ=25 C,IF=-9.7A Qrr Reverse Recovery Charge -- 0.22 -- C diF/dt=100A/s 4 Notes ; Temperature O1 Repetitive Rating : Pulse Width Limited by Maximum Junction o 2 * =-7.8A, V =-25V, R =27 , Starting T =25 C L=3.0mH, I O AS DD G J O3 ISD <_ -9.7A, di/dt <_ 250A/s, VDD<_ BVDSS , Starting TJ =25oC 4 Pulse Test : Pulse Width = 250s, Duty Cycle< _ 2% O 5 Essentially Independent of Operating Temperature O in the MOSFET o o 4 O P-CHANNEL POWER MOSFET SFR/U9024 Fig 1. Output Characteristics Fig 2. Transfer Characteristics VGS - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V 101 -ID , Drain Current [A] -ID , Drain Current [A] Top : 100 @ Notes : 1. 250 s Pulse Test 2. TC = 25 oC 10-1 -1 10 100 101 150 oC 100 - 55 oC 10-1 101 @ Notes : 1. VGS = 0 V 2. VDS = -30 V 3. 250 s Pulse Test 25 oC 2 4 6 8 10 -VDS , Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage -IDR , Reverse Drain Current [A] RDS(on) , [ ] Drain-Source On-Resistance 0.40 0.35 0.30 VGS = -10 V 0.25 0.20 0.15 VGS = -20 V 0.10 0 5 10 15 20 @ Note : TJ = 25 oC 25 30 35 101 100 150 oC 25 C 10-1 40 @ Notes : 1. VGS = 0 V 2. 250 s Pulse Test o -ID , Drain Current [A] 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage 800 C iss C oss 400 @ Notes : 1. VGS = 0 V 2. f = 1 MHz 200 00 10 C rss 101 -VDS , Drain-Source Voltage [V] VDS = -12 V VDS = -30 V VDS = -48 V 10 -VGS , Gate-Source Voltage [V] Capacitance [pF] 600 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd 5 @ Notes : ID =-9.7 A 0 0 4 8 12 QG , Total Gate Charge [nC] 16 P-CHANNEL POWER MOSFET SFR/U9024 Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature 2.5 RDS(on) , (Normalized) Drain-Source On-Resistance -BVDSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 -75 @ Notes : 1. VGS = 0 V 2. ID = -250 A -50 -25 0 25 50 75 100 125 150 2.0 1.5 1.0 0.0 -75 175 @ Notes : 1. VGS = -10 V 2. ID = -4.9 A 0.5 -50 -25 0 25 50 75 100 125 150 175 200 TJ , Junction Temperature [ C] TJ , Junction Temperature [oC] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature 8 -ID , Drain Current [A] 102 Operation in This Area is Limited by R DS(on) 0.1 ms 101 1 ms 10 ms 100 DC @ Notes : 1. TC = 25 oC 2. TJ = 150 oC 3. Single Pulse 10-1 0 10 101 6 4 2 0 25 102 50 75 100 Tc , Case Temperature [oC] -VDS , Drain-Source Voltage [V] Thermal Response Fig 11. Thermal Response D=0.5 @ Notes : 1. Z J C (t)=3.91 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z J C (t) 0 10 0.2 0.1 P.DM 0.05 10- 1 0.02 0.01 JC Z (t) , -ID , Drain Current [A] o t1. t2. single pulse 10- 5 10- 4 10- 3 10- 2 10- 1 t 1 , Square Wave Pulse Duration 100 [sec] 101 125 150 P-CHANNEL POWER MOSFET SFR/U9024 Fig 12. Gate Charge Test Circuit & Waveform " Current Regulator " VGS Same Type as DUT 50K Qg 200nF 12V -10V 300nF VDS Qgs VGS Qgd DUT -3mA R1 R2 Current Sampling (IG) Resistor Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL t on Vout td(on) VDD Vin ( 0.5 rated VDS ) RG Vin t off tr td(off) tf 10% DUT -10V Vout 90% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID tp ID VDD RG C VDD -10V IAS tp VDS (t) ID (t) DUT BVDSS Time P-CHANNEL POWER MOSFET SFR/U9024 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT -IS L Driver VGS RG VGS VGS ( Driver ) Compliment of DUT (N-Channel) VDD * dv/dt controlled by "RG" * IS controlled by Duty Factor "D" Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM IS ( DUT ) di/dt IFM , Body Diode Forward Current Vf VDS ( DUT ) Body Diode Forward Voltage Drop Body Diode Recovery dv/dt VDD TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTa CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. The Power Franchise Programmable Active Droop ImpliedDisconnect PACMAN POP ISOPLANAR Power247 LittleFET PowerTrencha MicroFET QFET MicroPak QS MICROWIRE QT Optoelectronics MSX Quiet Series MSXPro RapidConfigure OCX RapidConnect OCXPro SILENT SWITCHERa OPTOLOGICa SMART START OPTOPLANAR SPM Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation UHC UltraFETa VCX DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I1