SFR/U9024
BVDSS = -60 V
RDS(on) = 0. 28 Ω
ID= -7.8 A
-60
-7.8
-5.5
31
±30
155
-7.8
3.2
-5.5
2.5
32
0.26
- 55 to +150
300
3.91
50
110
--
--
--
nAvalanche Rugged Technology
nRugged Gate Oxide Technology
nLower Input Capacitance
nImproved Gate Charge
nExtended Safe Operating Area
nLower Leakage Current : 10 µA(Max.) @ V
DS = -60V
nLower RDS(ON) : 0.206 Ω(Typ.)
Advanced Power MOSFET
Thermal Resistance
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient
RθJC
RθJA
RθJA
oC/W
Characteristic Max. UnitsSymbol Typ.
FEATURES
*
*When mounted on t he m i nimum pad size recommended (PCB Mount).
Absolute Maximum Ratings
Drain-to-Source Voltage
Continuous Drain Current (TC=25oC)
Continuous Drain Current (TC=100oC)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (TA=25oC)
Total Power Dissipation (TC=25oC)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
Characteristic Value UnitsSymbol
IDM
VGS
EAS
IAR
EAR
dv/dt
PD
ID
TJ , TSTG
TL
A
V
mJ
A
mJ
V/ns
W
W
W/oC
A
oC
VDSS V
*
D-PAK
1. Gat e 2. Drain 3. Source
1
2
3
I-PAK
1
3
2
O
1
O
2
O
3
O
1
O
1
Rev. C
SFR/U9024
-60
--
-2.0
--
--
--
--
--
-0.04
--
--
--
--
--
140
40
11
21
29
20
15
2.9
6.0
--
--
-4.0
-100
100
-10
-100
0.28
--
600
215
60
30
50
65
50
19
--
--
3.7
465
--
--
--
80
0.22
-7.8
-31
-3.8
--
--
Notes ;
Repetitive Rat i ng : Pulse Width Limited by Maximum Junc tion Temperature
L=3.0mH, IAS=-7.8A, VDD=-25V, RG=27Ω*, Starting TJ =25oC
ISD -9.7A, di/dt 250A/µs, VDD BVDSS , St arting T J =25oC
Pulse Test : Pulse Width = 250µs, Duty Cycle 2%
Essential l y I ndependent of Operati ng Temperature
_
<
O
1
O
2
O
3
O
4
O
5
_
<
_
<_
<
P-CHANNEL
POWER MOSFET
Electrical Characteristics (TC=25oC unless otherwise specified)
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
gfs
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
BVDSS
∆BV/∆TJ
VGS(th)
RDS(on)
IGSS
IDSS
V
V/oC
V
nA
µA
Ω
pF
ns
nC
--
--
--
--
--
--
--
--
--
--
--
--
--
VGS=0V,ID=-250µA
ID=-250µA See Fig 7
VDS=-5V,ID=-250µA
VGS=-20V
VGS=20V
VDS=-60V
VDS=-48V,TC=125oC
VGS=-10V,ID=-3.9A
VDS=-30V,ID=-3.9A
VDD=-30V,ID=-9.7A,
RG=18
See Fig 13
VDS=-48V,VGS=-10V,
ID=-9.7A
See Fig 6 & Fig 12
Drain-to-Source Leakage Current
VGS=0V,VDS=-25V,f =1MHz
See Fig 5
Source-Drain Diode Ratings and Characteristics
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Rec overy Time
Reverse Recovery Charge
IS
ISM
VSD
trr
Qrr
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
--
--
--
--
--
A
V
ns
µC
Integral reverse pn-diode
in the MOSFET
TJ=25oC,IS=-7.8A,VGS=0V
TJ=25oC,IF=-9.7A
diF/dt=100A/µs
Ω
O
4
O
5
O
4
O
4
O
5
O
4
O
4
O
4
O
1
S
SFR/U9024
10-1 100101
10-1
100
101
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
VGS
Top : - 1 5 V
- 10 V
- 8.0 V
- 7 .0 V
- 6.0 V
- 5 .5 V
- 5 .0 V
Bottom : - 4.5 V
-ID , Drain Current [A]
-VDS , Drain-Source Voltage [V]
246810
10-1
100
101
25 oC
150 oC
- 55 oC
@ Notes :
1. VGS = 0 V
2. VDS = -30 V
3. 250 µs Pulse Test
-ID , Drain Current [A]
-VGS , Gate-Source Voltage [V]
0.5 1.0 1.5 2.0 2.5 3.0 3.5
10-1
100
101
150 oC
25 oC
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
-IDR , Reverse Drain Current [A]
-VSD , Source-Drain Voltage [V]
100101
0
200
400
600
800 C
iss= Cgs+ Cgd ( C
ds= shorted )
C
oss= Cds+ Cgd
C
rss= Cgd
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
C oss
C iss
Capacitance [pF]
-VDS , Drain-Source Voltage [V]
0481216
0
5
10
V
DS = -48 V
V
DS = -30 V
V
DS = -12 V
@ Notes : ID =-9.7 A
-VGS , Gate-Source Voltage [V]
QG
, Total Gate Charge [nC]
0 5 10 15 20 25 30 35 40
0.10
0.15
0.20
0.25
0.30
0.35
0.40
@ Note : TJ = 25 oC
V
GS = -20 V
V
GS = -10 V
RDS(on) , [ Ω]
Drain-Source On-Resistance
-ID
, Drain Current [A]
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteri sti cs
Fig 6. Gate Charge vs. Gate-Source V o l tageFig 5. Capacitance vs. Drai n-Source Voltage
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
SFR/U9024
100101102
10-1
100
101
102
10 ms
DC
1 ms
0.1 ms
@ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
Operation in This Area
is Limited by R DS(on)
-ID , Drain Current [A]
-VDS , Drain-Source Voltage [V]
-75 -50 -25 0 25 50 75 100 125 150 175
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. VGS = 0 V
2. ID = -250 µA
-BVDSS , (Normalized)
Drain-Source Breakdown Voltage
TJ
, Junction Temperature [oC]
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.0
0.5
1.0
1.5
2.0
2.5
@ Notes :
1. VGS = -10 V
2. ID = -4.9 A
RDS(on) , (Normalized)
Drain-Source On-Resistance
TJ
, Junction Temperature [oC]
25 50 75 100 125 150
0
2
4
6
8
-ID , Drain Current [A]
Tc , Case Temperature [oC]
10-5 10-4 10-3 10-2 10-1 100101
10-1
100
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. ZθJC(t)=3.91 oC/W Max.
2. Duty Factor, D=t1/t2
3. TJM-TC=PDM*ZθJC(t)
ZθJC
(t) , Therma l Response
t1 , Square Wav e Pulse Durati on [sec]
P-CHANNEL
POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
Fig 11. Thermal Response
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
PDM
.
t1.
t2.
SFR/U9024
P-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resisti ve S witching Test Circuit & Waveforms
Fig 14. Unclamped I nductive Switching Test Circuit & Waveforms
EAS =L
L IAS2
----
2
1--------------------
BVDSS -- VDD
BVDSS
Vin
Vout
10%
90%
td(on) tr
ton toff
td(off) tf
Charge
VGS
-10V
Qg
Qgs Qgd
Vary tpt o obtain
required peak ID
-10V
VDD
C
LL
VDS
ID
RG
tp
DUT
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
VDD
( 0.5 rated VDS )
-10V
Vout
Vin
RL
DUT
RG
-3mA
VGS
Current Sampli ng (IG)
Resistor Current Sampli ng (ID)
Resistor
DUT
VDS
300nF
50K
200nF
12V
Same Typ e
as DUT
“ Current Regulator ”
R1R2
Ω
SFR/U9024 P-CHANNEL
POWER MOSFET
Fig 15. Peak Di ode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
--
L
IS
Driver
VGS
RGCompliment of DUT
(N-Channel)
VGS • dv/dt controlled by “RG”
•I
Scontrolled by Duty Factor “D”
VDD
10V
VGS
( Driver )
IS
( DUT )
VDS
( DUT ) VDD
Body Diode
Forward Voltage Drop
Vf
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/d t
di/dt
D = Gate P ulse Width
Gate Pulse Period
--------------------------
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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