ICS2304NZG-1LF - Integrated Device Technology

DATASHEET

LOW SKEW PCI/PCI-X BUFFER ICS2304NZ-1

IDT™ / ICS™

LOW SKEW PCI/PCI-X BUFFER 1

ICS2304NZ-1 REV D 091306

Description

The ICS2304NZ-1 is a high-performance, low skew, low

jitter PCI/PCI-X clock driver. It is designed to distribute

high-speed signals in PCI/PCI-X applications operating at

speeds from 0 to 140 MHz.

The ICS2304NZ-1 is characterized for operation from -40°C

to +85°C for automotive and industrial applications.

Features

•Packaged in 8-pin TSSOP (4.4 mm body)

•Available in Pb (lead) free package

•Frequency range of 0 to 140 MHz

•Less than 100 ps skew between outputs

•Distribute one clock input to one bank of four outputs

•Operating voltage of 3.3 V ±10%

•Available in commercial and industrial temperature

ranges

Block Diagram

Logic

Control

CLK_IN

CLK2

CLK1

CLK0

CLK3

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Pin Assignment Functionality Table

Pin Descriptions

CLK_IN

CLK0

CLK2

GND

VDD

CLK1

CLK31

Inputs Outputs

CLK_IN OE CLK(3:0)

0 0 Tristate

01 0

1 0 Tristate

11 1

Number

Name

Type

Pin Description

1 CLK_IN Input Input reference frequency.

2 OE Input Output Enable. When OE is low, it tri-states clock outputs.

3 CLK0 Output Buffered clock output.

4 GND Power Connect to ground.

5 CLK1 Output Buffered clock output.

6 VDD Power Power supply for 3.3 V.

7 CLK2 Output Buffered clock output.

8 CLK3 Output Buffered clock output.

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Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the ICS2304NZ-1. These ratings, which

are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at

these or any other conditions above those indicated in the operational sections of the specifications is not implied.

Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical

parameters are guaranteed only over the recommended operating temperature range.

Notes:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are

observed.

2. This value is limited to 4.6 V maximum.

3. The package thermal impedance is calculated in accordance with JESD 51.

Recommended Operation Conditions

Timing Requirements Over Recommended Ranges of Supply Voltage and Operating Free-air

Temperature

Item Rating

Supply Voltage Range, VDD -0.5 V to 4.3 V

Input Voltage Range, VI (see notes 1 and 2) -0.5 V to VDD + 0.5 V

Output Voltage Range, VO (see notes 1 and 2) -0.5 V to VDD + 0.5 V

Input Clamp Current, IIK (VI<0 or VI>VDD)±50 mA

Output Clamp Current, IIK (VO<0 or VO)±50 mA

Continuous Total Output Current, IO (VO = 0 to VDD)±50 mA

Package Thermal Impedance, θJA (see note 3): PW

Package

230.5°C/W

Storage Temperature Range, Tstg -65°C to 150°C

Parameter Min. Typ. Max. Units

Supply Voltage, VDD 33.33.6V

High-level Input Voltage, VIH 0.7 x VDD V

Low-level Input Voltage, VIL 0.3 x VDD V

Input Voltage, VI0V

DD V

High-level Output Current, IOH -24 mA

Low-level Output Current, IOL 24 mA

Operating Free-air Temperature, TA-40 – +85 °C

Min. Typ. Max. Units

Clock Frequency, fCLK 0 140 MHz

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Electrical Characteristics at 3.3 V over Recommended Free-air Temperature Range

VDD = 3.3 V ±10%, TA = -40°C to +85°C (unless stated otherwise)

Note 1: Guaranteed by design, not 100% tested in production.

Parameter Symbol Conditions Min. Typ. Max. Units

Input Voltage VIK VDD at 3.3 V, II = -18 mA -1.2 V

High-level Output Voltage VOH

VDD = min to max,

IOH = -1 mA

VDD-0.2 3.3

VDD = 3 V, IOH = -24 mA 2 2.3

VDD = 3 V, IOH = -12 mA 2.4 2.7

Low-level Output Voltage VOL

VDD = min to max,

IOH = 1 mA

0.222 0.2

VDD = 3 V, IOL = 24 mA 0.61 0.8

VDD = 3 V, IOL = 12 mA 0.31 0.55

High-level Input Current IOH

VDD = 3 V, VO = 1 V -53 -40 mA

VDD = 3.3 V, VO = 1.65 V -54

Low-level Input Current IOL

VDD = 3 V, VO = 2 V 40 53 mA

VDD = 3.3 V, VO = 1.65 V 57

Input Current IIV = VDD or VO0.1 50 µA

Dynamic Supply Current IDD Unloaded outputs at

66.67 MHz

13 37 mA

Input Capacitance

(Note 1)

CIVDD = 3.3 V,

VI = 0V or 3.3 V

35pF

Output Capacitance

(Note 1)

COVDD = 3.3 V,

VI = 0V or 3.3 V

3.2 pF

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Switching Characteristics at 3.3 V over Recommended Ranges of Supply Voltage

and Operating Free-air Temperature

VDD = 3.3 V ±10%, TA = -40°C to 85°C (unless stated otherwise)

Note 1: Guaranteed by design, not 100% tested in production.

Parameter Symbol Conditions Min. Typ. Max. Units

High-to-Low Propagation Delay (Note 1) tPLH VO = VDD/2 1.8 3.1 3.8 ns

Low-to-High Propagation Delay (Note 1) tPHL VO = VDD/2 1.8 2.9 3.8 ns

Output Skew Window (Note 1) TSK(o) VO = VDD/2 50 100 ps

Pulse Skew = | tPLH - tPHL | (Note 1) TSK(p) VO = VDD/2 300 ps

Process Skew (Note 1) TSK(pr) VO = VDD/2 500 ps

CLKIN High Time (Note1) Thigh

66 MHz 6 ns

140 MHz 3 ns

CLKIN Low Time (Note1) Tlow

66 MHz 6 ns

140 MHz 3 ns

Rise Time (Note 1) TrVOL=0.8 V,

VOH=2.0 V

1.2 2.0 ns

Fall Time (Note 1) TfVOH=2.0 V,

VOL=0.8 V

1.2 2.0 ns

Cycle-to-Cycle Jitter Tcyc-cyc Loaded

outputs

200 ps

Jitter, 1-Sigma Tj1s 10,000 cycles 14 40 ps

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Parameter Measurement Information

Figure 2. Voltage Thresholds for Propagation Delay (tpd) Measurements

Figure 3. Output Skew

Figure 4. Clock Waveform

CLK0-CLK3 0.8 V

2.0 V

50% VDD

0.8 V

2.0 V

50% VDD

CLKIN

50% VDD

VOH

VOL

trtf

tPLH tPHL

VDD

50% VDD

Any CLK

tSK(p)

Any CLK

50% VDD

0.2 VDD

0.5 VDD

tCYC

tHIGH

tLOW

VTEST

VIH (MIN)

VIL (MAX)

0.4 VDD

Peak-to-Peak (minimum)

Parameter Value Unit

VIH (MIN)

VIL (MAX)

VTEST

0.5 VDD

0.4 VDD

0.35 VDD

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Figure 5. Supply Current vs. Frequency

Figure 6. High-level Output Voltage vs. High-level Output Current

VOH - High-level Output Voltage (V)

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Figure 7. Low-level Output Voltage vs. Low-level Output Current

VOL - Low-level Output Voltage (V)

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Marking Diagram

Marking Diagram (industrial)

Notes:

1. ###### is the lot number.

2. YYWW is the last two digits of the year and week that the

part was assembled.

3. “L” denotes Pb (lead) free package.

Marking Diagram (Pb free)

Marking Diagram (Pb free/industrial)

BOTTOM

TOP

$$##

####

YYWW

304N1

BOTTOM

TOP

YYWW

04NI1

$$##

####

BOTTOM

TOP

YYWW

304NL

####

BOTTOM

TOP

####

YYWW

04NIL

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Package Outline and Package Dimensions (8-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)

Package dimensions are kept current with JEDEC Publication No. 95, MO-153

Ordering Information

Parts that are ordered with a “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no

responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No

other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications

such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not

recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS

does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.

Part / Order Number Marking Shipping Packaging Package Temperature

ICS2304NZG-1

see page 8

Tubes 8-pin TSSOP 0 to +70° C

ICS2304NZG-1T Tape and Reel 8-pin TSSOP 0 to +70° C

ICS2304NZG-1LF Tubes 8-pin TSSOP 0 to +70° C

ICS2304NZG-1LFT Tape and Reel 8-pin TSSOP 0 to +70° C

ICS2304NZGI-1 Tubes 8-pin TSSOP -40 to +85° C

ICS2304NZGI-1T Tape and Reel 8-pin TSSOP -40 to +85° C

ICS2304NZGI-1LF Tubes 8-pin TSSOP -40 to +85° C

ICS2304NZGI-1LFT Tape and Reel 8-pin TSSOP -40 to +85° C

INDEX

AREA

1 2

E1 E

SEATING

PLANE

- C -

aaa C

Millimeters Inches

Symbol Min Max Min Max

A--1.20--0.047

A1 0.05 0.15 0.002 0.006

A2 0.80 1.05 0.032 0.041

b 0.19 0.30 0.007 0.012

C 0.09 0.20 0.0035 0.008

D 2.90 3.10 0.114 0.122

E 6.40 BASIC 0.252 BASIC

E1 4.30 4.50 0.169 0.177

e 0.65 Basic 0.0256 Basic

L 0.45 0.75 0.018 0.030

α0°8°0°8°

aaa -- 0.10 -- 0.004

Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered

trademarks used to identify products or services of their respective owners.

Printed in USA

Corporate Headquarters

Integrated Device Technology, Inc.

6024 Silver Creek Valley Road

San Jose, CA 95138

United States

800 345 7015

+408 284 8200 (outside U.S.)

Asia Pacific and Japan

Integrated Device Technology

Singapore (1997) Pte. Ltd.

Reg. No. 199707558G

435 Orchard Road

#20-03 Wisma Atria

Singapore 238877

+65 6 887 5505

Europe

IDT Europe, Limited

Prime House

Barnett Wood Lane

Leatherhead, Surrey

United Kingdom KT22 7DE

+44 1372 363 339

For Sales

800-345-7015

408-284-8200

Fax: 408-284-2775

Innovate with IDT and accelerate your future networks. Contact:

www.IDT.com

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