REVISIONS LTR DESCRIPTION A DATE (YR-MO-DA) APPROVED 06-08-30 Raymond Monnin Boilerplate update, part of 5 year review. ksr THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Kenneth S. Rice STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY D. A. DiCenzo APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE Michael A. Frye DRAWING APPROVAL DATE MICROCIRCUIT, MEMORY, DIGITAL, CMOS, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON 88-09-23 AMSC N/A REVISION LEVEL A SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 . 1 OF 5962-88713 11 5962-E605-06 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88713 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type 01,05,09 02,06,10 03,07,11 04,08,12 Generic number 1/ C16L8 C16R8 C16R6 C16R4 Circuit function tPD 16-input 8-output AND-OR invert logic array 16-input 8-output registered AND-OR logic array 16-input 6-output registered AND-OR logic array 16-input 4-output registered AND-OR logic array 40,30,20 ns 40,30,20 ns 40,30,20 ns 40,30,20 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R S X Descriptive designator Terminals GDIP1-T20 or CDIP2-T20 GDFP2-F20 or CDFP3-F20 CQCC2-N20 Package style 20-lead 20-lead 20-terminal dual-in-line package flat package square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range --------------------------------------DC voltage applied to outputs in High Z ---------------DC input voltage --------------------------------------------Output sink current------------------------------------------Thermal resistance, junction-to-case (JC):-----------Maximum power dissipation (PD) 1/--------------------Maximum junction temperature (TJ) -------------------Lead temperature (soldering, 10 seconds maximum) Storage temperature range -----------------------------Temperature under bias range --------------------------- -0.5 V dc to +7.0 V dc -0.5 V dc to +7.0 V dc -3.0 V dc to +7.0 V dc 24 mA See MIL-STD-1835 1.0 W +175C +260C -65C to +150C -55C to +125C 1.4 Recommended operating conditions. Supply voltage (VCC) --------------------------------------High-level input voltage (VIH) ----------------------------Low-level input voltage (VIL) ------------------------------Case operating temperature range (TC) -------------- 4.5 V dc to 5.5 V dc 2.0 V dc minimum 0.8 V dc maximum -55C to +125C 1/ Must withstand the added PD due to short circuit test, e.g., IOS. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.3), the devices shall be programmed by the manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 3 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Min Unit Max Output high voltage VOH VSS = 0 V, IOH = -2.0 mA, VIN = VIH, VIL 1, 2, 3 All 2.4 V Output low voltage VOL VCC = 4.5 V, IOL = 12.0 mA, VIN = VIH or VIL 1, 2, 3 All Input high voltage 2/ VIH 1, 2, 3 All Input low voltage 2/ VIL 1, 2, 3 All Input leakage current IIX VIN = 5.5 V to GND 1, 2, 3 All -10 10 A Output leakage current IOZ VCC = 5.5 V, 1, 2, 3 All -100 100 A 0.4 2.0 V V 0.8 V VOUT = 5.5 V and GND Output short circuit current 3/ 4/ IOS VCC = 5.5 V, VOUT = 0.5 V 1, 2, 3 All -300 mA ICC VCC = 5.5 V, IOUT = 0 mA, 1, 2, 3 All 70 mA Input capacitance 4/ CIN VIN = 0 V, VCC = 5.0 V 4 All 7 pF Output capacitance 4/ COUT (see 4.3.1c) 4 All 7 pF Input or feedback to tPD VCC = 5.5 V 9, 10, 11 01, 03, 04 40 ns Power supply current 5/ VIN = GND TA = +25C, f = 1 MHz non-registered output Input to output enable Input to output disable See figures 3 and 4 tEA 9, 10, 11 tER 9, 10, 11 4/ 6/ OE to output enable OE to output disable 9, 10, 11 tPZX 9, 10, 11 tPXZ 4/ 6/ 05, 07, 08 30 09, 11, 12 20 01, 03, 04 40 05, 07, 08 30 09, 11, 12 20 01, 03, 04 40 05, 07, 08 30 09, 11, 12 20 02, 03, 04 25 06, 07, 08 25 10, 11, 12 20 02, 03, 04 25 06, 07, 08 25 10, 11, 12 20 ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 4 TABLE I. Electrical performance characteristics - Continued. Test Conditions -55C TC +125C 4.5 V VCC 5.5 V Symbol Group A subgroups Device type unless otherwise specified Clock to output 7/ tCO Min VCC = 5.5 V 9, 10, 11 See figures 3 and 4 Input or feedback tSU 9, 10, 11 setup time 7/ Hold time 7/ tH Clock period 9, 10, 11 tP 4/ Clock width 4/ 9, 10, 11 7/ 7/ Maximum frequency Limits tW 9, 10, 11 fMAX 9, 10, 11 4/ 7/ Unit Max 02, 03, 04 25 06, 07, 08 20 10, 11, 12 15 02, 03, 04 35 06, 07, 08 25 10, 11, 12 20 02, 03, 04 0 06, 07, 08 0 10, 11, 12 0 02, 03, 04 60 06, 07, 08 45 10, 11, 12 35 02, 03, 04 25 06, 07, 08 20 ns ns ns ns ns 10, 11, 12 12 02, 03, 04 16.5 06, 07, 08 22 10, 11, 12 28.5 MHz 1/ AC test are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load on figure 3, configuration A. 2/ These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 3/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed one second. 4/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. 5/ To calculate ICC at any given operating frequency, use 70 mA + ICC(AC), where ICC(AC) = (0.6 mA/MHz) x (operating frequency in MHz). 6/ Transition is measured at steady state high level -500 mV or steady state low level +500 mV on the output from the 1.5 V level on the input and the output load on figure 3, configuration B. 7/ Test applies only to registered outputs. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 5 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 6 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MILSTD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is fifteen devices with no failures and all input and output terminals tested. d. Unprogrammed devices shall be tested for programmability and ac performance compliance to the requirements of Group A, subgroups 9, 10, and 11. (1) A sample shall be selected to satisfy programmability requirements prior to performing subgroups 9, 10, and 11. Twelve devices shall be submitted to programming (see 3.2.2.1). If more than two devices fail to program, the lot shall be rejected. At the manufacturers option, the sample may be increased to 24 total devices with no more than four total device failures allowable. (2) Ten devices from the programmability sample shall be submitted to the requirements of group A, subgroups 9, 10, and 11. If more than two devices fail, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 20 total devices with no more than 4 total device failures allowable. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. c. For quality conformance inspection, the programmability sample (see 4.3.1d) shall be included in subgroup 1 test. 4.4 Programming procedures. The programming procedures shall be as specified by the device manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 7 Device types 01,05,09 02,06,10 03,07,11 04,08,12 Case outlines R, S, X R, S, X R, S, X R, S, X Terminal number Terminal symbol 1 I0 CP CP CP 2 I1 I0 I0 I0 3 I2 I1 I1 I1 4 I3 I2 I2 I2 5 I4 I3 I3 I3 6 I5 I4 I4 I4 7 I6 I5 I5 I5 8 I7 I6 I6 I6 9 I8 I7 I7 I7 10 VSS VSS VSS VSS 11 I9 OE OE OE 12 O0 O0 I/O0 I/O0 13 I/O1 O1 O1 I/O1 14 I/O2 O2 O2 O2 15 I/O3 O3 O3 O3 16 I/O4 O4 O4 O4 17 I/O5 O5 O5 O5 18 I/O6 O6 O6 I/O6 19 O7 O7 I/O7 I/O7 20 VCC VCC VCC VCC FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 8 Device types 01, 05, and 09 Inputs Outputs I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 O0 X X X X X X X X X X Z Z Z Z Z Z Z Z Device types 02, 06, and 10 Inputs Outputs CP OE I7 I6 I5 I4 I3 I2 I1 I0 O7 O6 O5 O4 O3 O2 O1 O0 X H X X X X X X X X Z Z Z Z Z Z Z Z X L X X X X X X X X H H H H H H H H Device types 03, 07, and 11 Inputs Outputs CP OE I7 I6 I5 I4 I3 I2 I1 I0 I/O7 O6 O5 O4 O3 O2 O1 I/O0 X H X X X X X X X X Z Z Z Z Z Z Z Z X L X X X X X X X X Z H H H H H H Z Device types 04, 08, and 12 Inputs Outputs CP OE I7 I6 I5 I4 I3 I2 I1 I0 I/O7 I/O6 O5 O4 O3 O2 I/O1 I/O0 X H X X X X X X X X Z Z Z Z Z Z Z Z X L X X X X X X X X Z Z H H H H Z Z NOTES: 1. Z = Three state 2. X = Don't care FIGURE 2. Truth tables (unprogrammed). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 9 FIGURE 3. Output load circuit. FIGURE 4. Switching waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 10 TABLE II. Electrical test requirements. MIL-STD-883 test requirements 1/ 2/ 3/ 4/ Subgroups (per method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical test parameters (method 5004) for unprogrammed devices Final electrical test parameters (method 5004) for programmed devices 1*, 2, 3, 7*, 8A, 8B 1*, 2, 3, 7*, 8A, 8B, 9 Group A test requirements (method 5005) 1,2,3,4**,7,8A,8B, 9, 10,11 Groups C and D end-point electrical parameters (method 5005) 2, 3, 7, 8 1/ * indicates PDA applies to subgroups 1 and 7. 2/ Any or all subgroups may be combined when using high-speed testers. 3/ ** see 4.3.1c. 4/ Subgroups 7 and 8 shall consist of verifying the data pattern. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88713 A REVISION LEVEL A SHEET 11 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 06-08-30 Approved sources of supply for SMD 5962-88713 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number 5962-8871301RA 0C7V7 PALC16L8-40DMB 5962-8871301SA 0C7V7 PALC16L8-40KMB 5962-8871301XA 0C7V7 PALC16L8-40LMB 5962-8871302RA 0C7V7 PALC16R8-40DMB 5962-8871302SA 0C7V7 PALC16R8-40KMB 5962-8871302XA 0C7V7 PALC16R8-40LMB 5962-8871303RA 0C7V7 PALC16R6-40DMB 5962-8871303SA 0C7V7 PALC16R6-40KMB 5962-8871303XA 0C7V7 PALC16R6-40LMB 5962-8871304RA 3/ PALC16R4-40DMB 5962-8871304SA 3/ PALC16R4-40KMB 5962-8871304XA 3/ PALC16R4-40LMB 5962-8871305RA 0C7V7 PALC16L8-30DMB 5962-8871305SA 0C7V7 PALC16L8-30KMB 5962-8871305XA 0C7V7 PALC16L8-30LMB 5962-8871306RA 0C7V7 PALC16R8-30DMB 5962-8871306SA 0C7V7 PALC16R8-30KMB 5962-8871306XA 0C7V7 PALC16R8-30LMB 5962-8871307RA 0C7V7 PALC16R6-30DMB 5962-8871307SA 0C7V7 PALC16R6-30KMB 5962-8871307XA 0C7V7 PALC16R6-30LMB 5962-8871308RA 3/ PALC16R4-30DMB 5962-8871308SA 3/ PALC16R4-30KMB 5962-8871308XA 3/ PALC16R4-30LMB See footnotes at end of table. Page 1 of 2 Vendor similar PIN 2/ STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 5962-8871309RA 0C7V7 PALC16L8-20DMB 5962-8871309SA 0C7V7 PALC16L8-20KMB 5962-8871309XA 0C7V7 PALC16L8-20LMB 5962-8871310RA 0C7V7 PALC16R8-20DMB 5962-8871310SA 0C7V7 PALC16R8-20KMB 5962-8871310XA 0C7V7 PALC16R8-20LMB 5962-8871311RA 0C7V7 PALC16R6-20DMB 5962-8871311SA 0C7V7 PALC16R6-20KMB 5962-8871311XA 0C7V7 PALC16R6-20LMB 5962-8871312RA 3/ PALC16R4-20DMB 5962-8871312SA 3/ PALC16R4-20KMB 5962-8871312XA 3/ PALC16R4-20LMB 2/ 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the Vendor to determine its availability. 2/ Caution: Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source. Vendor CAGE number Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 0C7V7 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. Page 2 of 2