© Semiconductor Components Industries, LLC, 2016
June, 2018 − Rev. 6 1Publication Order Number:
ESD5101/D
ESD5101, ESD5111
ESD Protection Diodes
Micro−packaged Diodes for ESD
Protection
The ESD51x1 Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
smartphone, smart-watch, or many other portable / wearable
applications where board space comes at a premium.
Features
Low Capacitance (5 pF Max, I/O to GND)
Small Body Outline Dimensions
01005 Size: 0.435 x 0.23 mm
0201 Size: 0.6 x 0.3 mm
Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
Low ESD Clamping Voltage
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit
Operating Junction Temperature Range TJ55 to +125 °C
Storage Temperature Range Tstg 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds) TL260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD) ESD
ESD ±15
±15 kV
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
See Application Note AND8308/D for further description of
survivability specs.
MARKING
DIAGRAMS
ESD5111 (0201)
WLCSP2
CASE 567AV
PIN CONFIGURATION
AND SCHEMATIC
www.onsemi.com
L, E, P = Device Code
12
ESD5101 (01005)
DSN2
CASE 152AK
=
L
See detailed ordering and shipping information on page 2 o
f
this data sheet.
ORDERING INFORMATION
ESD5111P (0201)
DSN2
CASE 152AX
PE
ESD5101, ESD5111
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage VRWM I/O Pin to GND 3.3 V
Breakdown Voltage VBR IT = 1 mA, I/O Pin to GND 3.68 5.0 6.5 V
Reverse Leakage Current IRVRWM = 3.3 V, I/O Pin to GND 0.1 mA
ESD5101, ESD5111
Clamping Voltage
TLP (Note 1)
VCIPP = 8 A IEC 61000−4−2 Level 2 equivalent
(±4 kV Contact, ±4 kV Air) 5.5 V
IPP = 16 A IEC 61000−4−2 Level 2 equivalent
(±8 kV Contact, ±15 kV Air) 6.5
Junction Capacitance CJVR = 0 V, f = 1 MHz 5.5 pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
ORDERING INFORMATION
Device Package Shipping
ESD5101FCT5G DSN2
(Pb−Free) 10,000 / Tape & Reel
ESD5111FCT5G WLCSP2
(Pb−Free) 10,000 / Tape & Reel
ESD5111PFCT5G DSN2
(Pb−Free) 10,000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ESD5101, ESD5111
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3
TYPICAL CHARACTERISTICS
Figure 1. ESD5101 CV Characteristics Figure 2. ESD5111 CV Characteristics
VBIAS (V) VBIAS (V)
2.51.5 3.50.5−0.5−1.5−2.5−3.5
0
1
2
3
4
5
6
10
Figure 3. ESD5101 S21 Insertion Loss Figure 4. ESD5111 S21 Insertion Loss
FREQUENCY (Hz) FREQUENCY (Hz)
1.E+07
−10
−8
−4
−2
0
2
Figure 5. ESD5101 Capacitance over
Frequency Figure 6. ESD5111 Capacitance over
Frequency
FREQUENCY (GHz) FREQUENCY (GHz)
2.51.51.00.5
0
1
3
4
5
7
8
10
C (pF)(dB)CAPACITANCE (pF)
7
8
9
−6
2
6
9
2.0 3.0
1.E+08 1.E+09
2.51.5 3.50.5−0.5−1.5−2.5−3.5
0
1
2
3
4
5
6
10
1.E+07
−10
−8
−4
−2
0
2
2.51.51.00.5
0
1
3
4
5
7
8
10
C (pF)(dB)CAPACITANCE (pF)
7
8
9
−6
2
6
9
2.0 3.0
1.E+08 1.E+09
ESD5101, ESD5111
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4
TYPICAL CHARACTERISTICS
Figure 7. ESD5101 Positive TLP I−V Curve Figure 8. ESD5111 Positive TLP I−V Curve
VC, VOLTAGE (V)
201814128420
0
2
6
8
10
14
18
20
Figure 9. ESD5101 Negative TLP I−V Curve Figure 10. ESD5111 Negative TLP I−V Curve
TLP CURRENT (A)
4
12
16
610 16 0
2
10
4
6
8
VIEC, EQUIVALENT (kV)
VC, VOLTAGE (V)
0
2
6
8
10
14
18
20
TLP CURRENT (A)
4
12
16
0
2
10
4
6
8
VIEC, EQUIVALENT (kV)
VC, VOLTAGE (V)
201814128420
0
−2
−6
−8
−10
−14
−18
−20
TLP CURRENT (A)
−4
−12
−16
610 16 0
2
10
4
6
8
VIEC, EQUIVALENT (kV)
VC, VOLTAGE (V)
0
−2
−6
−8
−10
−14
−18
−20
TLP CURRENT (A)
−4
−12
−16
0
2
4
6
8
VIEC, EQUIVALENT (kV)
10
201814128420 6 10 16
201814128420 6 10 16
Figure 11. ESD5111 Positive 8 kV ESD Contact
Discharge Figure 12. ESD5111 Negative 8 kV ESD
Contact Discharge
ESD5101, ESD5111
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5
IEC 61000−4−2 Spec.
Level Test Volt-
age (kV)
First Peak
Current
(A) Current at
30 ns (A) Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
Ipeak
90%
10%
IEC61000−4−2 W aveform
100%
I @ 30 ns
I @ 60 ns
tP = 0.7 ns to 1 ns
Figure 13. IEC61000−4−2 Spec
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 14. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 15 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
Figure 14. Simplified Schematic of a Typical TLP
System
DUT
LS÷
Oscilloscope
Attenuator
10 MW
VC
VM
IM
50 W Coax
Cable
50 W Coax
Cable
Figure 15. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
ÉÉ
ÉÉ
DSN2, 0.435x0.23, 0.27P, (01005)
CASE 152AK
ISSUE A
DATE 17 FEB 2015
SCALE 16:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
B
E
D
BOTTOM VIEW
b
L
0.02 C TOP VIEW
A
A1
CSEATING
PLANE
SIDE VIEW
DIM MIN MAX
MILLIMETERS
A0.165 0.195
A1 −−− 0.030
b0.177 0.193
D0.435 BSC
E0.230 BSC
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.44
0.23
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
1
L0.112 0.128
0.16
RECOMMENDED
1
PIN 1
INDICATOR
e0.270 BSC
A
M
0.05 BC
A
M
0.05 BC
2X
e
2X
2X
0.02 C
2X
2X 0.02 C
0.05 C
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer
to device data sheet for actual part
marking. PbFree indicator, “G”, may
or not be present.
X = Specific Device Code
X
2X
2X
2X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON82198E
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
DSN2, 0.435X0.23, 0.27P (01005)
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
ÈÈ
X4DFN2, 0.60x0.30, 0.36P
CASE 152AX
ISSUE G
DATE 12 APR 2019
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
B
E
D
BOTTOM VIEW
b
L
TOP VIEW
A
A1
CSEATING
PLANE
SIDE VIEW
DIM MIN NOM
MILLIMETERS
A0.175 0.200
A1
b0.205 0.215
D
E
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.65
0.27
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
1
L0.145 0.155
0.26
RECOMMENDED
1
e0.36 BSC
A
M
0.05 BC
A
M
0.05 BC
2X
e
2X
2X
0.01 C
0.02 C
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer
to device data sheet for actual part
marking. PbFree indicator, “G”, may
or not be present. Some products may
not follow the Generic Marking.
X = Specific Device Code
X
SCALE 8:1
0.575 0.600
0.275 0.300
PIN 1
INDICATOR
MAX
0.225
0.225
0.165
0.625
0.325
0.018 REF
X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON06808G
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
X4DFN2, 0.60x0.30, 0.36P
© Semiconductor Components Industries, LLC, 2018 www.onsemi.com
WLCSP2, 0.6x0.3
CASE 567AV
ISSUE C
DATE 22 SEP 2017
SCALE 12:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A B
E
D
BOTTOM VIEW
b
0.05 B
AC
0.02 C
TOP VIEW
0.02 C
A
A1
0.02 C
0.02 C
CSEATING
PLANE
SIDE VIEW
DIM MIN NOM
MILLIMETERS
A0.250 0.275
A1 0.000 0.025
b0.140 0.155
D
E
L0.190 0.215
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.81
0.33
0.28
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
e0.36 BSC
2X
2X
2X
L
2X
2X
e
2X
MAX
0.570 0.600
0.270 0.300
0.300
0.050
0.170
0.240
0.630
0.330
X = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
PbFree indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
GENERIC
MARKING DIAGRAM*
X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON49805E
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
WLCSP2, 0.6X0.3
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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1
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