ALLIANCE SEMICONDUCTOR 1
High Performance
512K×8/256K×16
5V CMOS Flash EEPROM
AS29F400
®
512K×8/256K×16 CMOS Flash EEPROM
Features
Organization: 512K×8 or 256K×16
Sector architecture
- One 16K; two 8K; one 32K; and seven 64K byte sectors
- Boot code sector architecture—T (top) or B (bottom)
- Erase any combination of sectors or full chip
Single 5.0±0.5V power supply for read/write operations
Sector protection
High speed 55/70/90/120/150 ns address access time
Automated on-chip programming algorithm
- Automatically programs/verifies data at specified address
Automated on-chip erase algorithm
- Automatically preprograms/erases chip or specified sectors
10,000 write/erase cycle endurance
Hardware RESET pin
- Resets internal state machine to read mode
Low power consumption
- 35 mA maximum read current
- 60 mA maximum program current
- 1 µA typical standby current (RESET = 0)
JEDEC standard software, packages and pinouts
- 48-pin TSOP
- 44-pin SO
Detection of program/erase cycle completion
- DQ7 DATA polling
- DQ6 toggle bit
-RY/BY
output
Erase suspend/resume
- Supports reading data from or programming data to a sector
not being erased
•Low V
CC write lock-out below 3.2V
Logic block diagram
X decoder
VCC
VSS
Cell matrix
Y decoder Y gating
Data latch
Chip enable
Address latch
Input/output
buffers
Sector protect
Command
register
Program/erase
control
VCC detector
Erase voltage
generator
Program voltage
generator
Timer
A0–A17
CE
OE
STB
STB
Output enable
Logic
RY/BY
WE
BYTE
RESET
DQ0–DQ15
switches
A-1
Pin arrangement
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A14
A15
A16
BYTE
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
44-pin SO
21
22
DQ3
DQ11
A10
A11
A12
A13
2RY/BY
3A17
4A7
1NC
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
43
42
41
44
WE
A8
A9
RESET
A8
A9
A10
A11
A12
A13
A14
A15 A16
BYTE
VSS
DQ15/A-1
DQ7
DQ14
NC
NC
WE
RESET
NC
NC
RY/BY
NC DQ2
DQ10
DQ3
DQ11
VCC
DQ4
DQ12
DQ5
DQ6
DQ13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
48
47
46
45
44
43
42
41
40
39
38
37
36
35
15
16
34
33
48-pin TSOP
A17
A7
A6
A5
A4
A3
A2
A1 A0
CE
VSS
OE
DQ0
DQ8
DQ1
DQ917
18
19
20
21
22
32
31
30
29
28
27
23
24
26
25
AS29F400
AS29F400
Selection guide
29F400-55 29F400-70 29F400-90 29F400-120 29F400-150 Unit
Maximum access time tAA 55 70 90 120 150 ns
Maximum chip enable access time tCE 55 70 90 120 150 ns
Maximum output enable access time tOE 25 30 35 50 55 ns
Preliminary information
AS29F400
2
®
Preliminary information
Functional description
The AS29F400 is a 4 megabit, 5 volt only Flash memory organized as 512K bytes of 8 bits each or 256K words of 16 bits each. For flexible
erase and program capability, the 4 megabits of data is divided into 11 sectors: one 16K byte, two 8K byte, one 32K byte, and seven 64K
byte. The ×8 data appears on DQ0–DQ7; the ×16 data appears on DQ0–DQ15. The AS29F400 is offered in JEDEC standard 44-pin SO and
48-pin TSOP packages. This device is designed to be programmed and erased in-system with a single 5.0V VCC supply. The device can also
be reprogrammed in standard EPROM programmers.
The AS29F400 offers access times of 55/70/90/120/150 ns, allowing 0-wait state operation of high speed microprocessors. To eliminate
bus contention the device has separate chip enable (CE), write enable (WE), and output enable (OE) controls. Word mode (×16 output) is
selected by BYTE = High and Byte mode (×8 output) is selected by BYTE = Low.
The AS29F400 is fully compatible with the JEDEC single power supply Flash standard. Write commands to the command register using
standard microprocessor write timings. An internal state-machine uses register contents to control the erase and programming circuitry.
Write cycles also internally latch addresses and data needed for the programming and erase operations. Read data from the device in the
same manner as other Flash or EPROM devices. Use the program command sequence to invoke the automated on-chip programming
algorithm that automatically times the program pulse widths and verifies proper cell margin. Use the erase command sequence to invoke the
automated on-chip erase algorithm that preprograms the sector if it is not already programmed before executing the erase operation, times
the erase pulse widths, and verifies proper cell margin.
Boot sector architecture enables the device to boot from either the top (AS29F400T) or bottom (AS29F400B) sector. Sector erase
architecture allows specified sectors of memory to be erased and reprogrammed without altering data in other sectors. A sector typically
erases and verifies within 1.0 seconds. Hardware sector protection disables both program and erase operations in all or any combination of
the eleven sectors. The device provides true background erase with Erase Suspend, which puts erase operations on hold to either read data
from or program data to a sector that is not being erased. The chip erase command will automatically erase all unprotected sectors.
A factory shipped AS29F400 is fully erased (all bits = 1). The programming operation sets bits to 0. Data is programmed into the array one
byte/word at a time in any sequence and across sector boundaries. A sector must be erased to change bits from 0 to 1. Erase returns all
bytes/words in a sector to the erased state (all bits = 1). Each sector is erased individually with no effect on other sectors.
The device features single 5.0V power supply operation for read, write, and erase functions. Internally generated and regulated voltages are
provided for the program and erase operations. A low VCC detector automatically inhibits write operations during power transtitions. The
RY/BY pin, DATA polling of DQ7, or toggle bit (DQ6) may be used to detect end of program or erase operations. The device automatically
resets to the read mode after program/erase operations are completed. DQ2 indicates which sectors are being erased.
The AS29F400 resists accidental erasure or spurious programming signals resulting from power transitions. Control register architecture
permits alteration of memory contents only after successful completion of specific command sequences. During power up, the device is set
to read mode with all program/erase commands disabled when VCC is less than VLKO (lockout voltage). The command registers are not
affected by noise pulses of less than 5 ns on OE, CE, or WE. CE and WE must be logical zero and OE a logical one to initiate write commands.
When the device’s hardware RESET pin is driven low, any program/erase operation in progress will be terminated and the internal state
machine will be reset to read mode. If the RESET pin is tied to the system reset circuitry and a system reset occurs during an automated on-
chip program/erase algorithm, data in address locations being operated on will become corrupted and require rewriting. Resetting the
device enables the system’s microprocessor to read boot-up firmware from the Flash memory.
The AS29F400 uses Fowler-Nordheim tunnelling to electrically erase all bits within a sector simultaneously. Bytes/words are programmed
one at a time using EPROM programming mechanism of hot electron injection.
AS29F400
3
®
Preliminary information
Operating modes
L = Low (<VIL); H = High (>VIH); VID = 12.0 ± 0.5V; X = don’t care; In ×16 mode, BYTE = VIH. In ×8 mode, BYTE = VIL and DQ8–14 is High Z with
DQ15 = A-1(X).
Mode definitions
Mode CE OE WE A0 A1 A6 A9 RESET DQ
ID read MFR code L L H LLLV
ID H Code
ID read device code L L H H L L VID H Code
Read L L H A0 A1 A6 A9 H DOUT
Standby H XXXXXXHHigh Z
Output disable L H H XXXXHHigh Z
Write L H L A0 A1 A6 A9 H DIN
Enable sector protect L VID Pulse/L L H L VID HX
Sector unprotect L VID Pulse/L L H H VID HX
Verify sector protect L L H L H L VID H Code
Temporary sector
unprotect XXXXXXXV
ID X
Hardware Reset XXXXXXXLHigh Z
Item Description
ID MFR code,
device code
Selected by A9 = VID(11.5–12.5V), CE = OE = A1 = A6 = L, enabling outputs.
When A0 is low (VIL) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products.
When A0 is high (VIH), DOUT represents the device code for the 29F400.
Read mode Selected with CE = OE = L, WE = H. Data is valid in tACC time after addresses are stable, tCE after CE is low
and tOE after OE is low.
Standby
Selected with CE = H. Part is powered down, and ICC reduced to <1.0 mA for TTL input levels and <100 µA
for CMOS levels. If activated during an automated on-chip algorithm, the device completes the operation
before entering standby.
Output disable Part remains powered up; but outputs disabled with OE pulled high.
Write
Selected with CE = WE = L, OE = H. Accomplish all Flash erasure and programming through the command
register. Contents of command register serve as inputs to the internal state machine. Address latching occurs
on the falling edge of WE or CE, whichever occurs later. Data latching occurs on the rising edge WE or CE,
whichever occurs first. Filters on WE prevent spurious noise events from appearing as write commands.
Enable
sector protect
Hardware protection circuitry implemented with external programming equipment causes the device to
disable program and erase operations for specified sectors.
Sector
unprotect Disables sector protection using external programming equipment.
Verify
sector protect
Verifies write protection for sector. Sectors are protected from program/erase operations on commercial
programming equipment. Determine if sector protection exists in a system by writing the ID read command
sequence and reading location XXX02h, where address bits A12–17 select the defined sector addresses. A
logical 1 on DQ0 indicates a protected sector; a logical 0 indicates an unprotected sector.
Temporary
sector
unprotect
Temporarily disables sector protection for in-system data changes to protected sectors. Apply +12V to RESET
to activate temporary sector unprotect mode. During temporary sector unprotect mode, program protected
sectors by selecting the appropriate sector address. All protected sectors revert to protected state on removal
of +12V from RESET.
AS29F400
4
®
Preliminary information
Flexible sector architecture
In word mode, there are one 8K word, two 4K word, one 16K word, and seven 32K word sectors. Address range is A17–A-1 if BYTE = VIL; address range is
A17–A0 if BYTE = VIH.
ID Sector address table
RESET Resets the interal state machine to read mode. If device is programming or erasing when RESET = L, data
may be corrupted.
Deep
power down Hold RESET low to enter deep power down mode (<1 µA CMOS). Recovery time to active mode is 1.5 µs.
Sector
Bottom boot sector architecture (AS29F400B) Top boot sector architecture (AS29F400T)
×8 ×16 Size (Kbytes) ×8 ×16 Size (Kbytes)
0 00000h–03FFFh 00000h–01FFFh 16 00000h–0FFFFh 00000h–07FFFh 64
1 04000h–05FFFh 02000h–02FFFh 8 10000h–1FFFFh 08000h–0FFFFh 64
2 06000h–07FFFh 03000h–03FFFh 8 20000h–2FFFFh 10000h–17FFFh 64
3 08000h–0FFFFh 04000h–07FFFh 32 30000h–3FFFFh 18000h–1FFFFh 64
4 10000h–1FFFFh 08000h–0FFFFh 64 40000h–4FFFFh 20000h–27FFFh 64
5 20000h–2FFFFh 10000h–17FFFh 64 50000h–5FFFFh 28000h–2FFFFh 64
6 30000h–3FFFFh 18000h–1FFFFh 64 60000h–6FFFFh 30000h–37FFFh 64
7 40000h–4FFFFh 20000h–27FFFh 64 70000h–77FFFh 38000h–3BFFFh 32
8 50000h–5FFFFh 28000h–2FFFFh 64 78000h–79FFFh 3C000h–3CFFFh 8
9 60000h–6FFFFh 30000h–37FFFh 64 7A000h–7BFFFh 3D000h–3DFFFh 8
10 70000h–7FFFFh 38000h–3FFFFh 64 7C000h–7FFFFh 3E000h–3FFFFh 16
Sector
Bottom boot sector address (AS29F400B) Top boot sector address (AS29F400T)
A17 A16 A15 A14 A13 A12 A17 A16 A15 A14 A13 A12
0 00000X 00 0XXX
1 000010 001XXX
2 000011 010XXX
3 0001XX 011XXX
4 001XXX 1 00XXX
5 010XXX 1 01XXX
6 011XXX 1 10XXX
7 100XXX 1 110XX
8 101XXX 111100
9 110XXX 111101
10 111XXX 11111X
Item Description
AS29F400
5
®
Preliminary information
READ codes
Key: L =Low (<VIL); H = High (>VIH); X =Don’t care; T = top; B = bottom
Command format
1 Bus operations defined in "Mode definitions," on page 3.
2 Reading from and programming to non-erasing sectors allowed in Erase Suspend mode.
3 Address bit A15 = X = Don’t care for all address commands except Program Address and Sector Address.
4 Address bit A16 = X = Don’t care for all address commands except Program Address and Sector Address.
5 Address bit A17 = X = Don’t care for all address commands except Program Address and Sector Address.
6 System should generate address patterns: ×16 mode - 5555h or 2AAAh to addresses A0–A14; ×8 mode - AAAAh or 5555h to addresses A-1–A14.
Mode A17–A12 A6 A1 A0 Code
MFR code (Alliance Semiconductor) X L L L 52h
Device code
×8 T boot X L L H 23h
×8 B boot X L L H ABh
×16 T boot X L L H 2223h
×16 B boot X L L H 22ABh
Sector protection Sector address L H L 01h protected
00h unprotected
Command sequence
Required
bus cycles
1st bus write cycle 2nd bus write cycle 3rd bus write cycle 4th bus write cycle 5th bus write cycle 6th bus write cycle
Address Data Address Data Address Data Address Data Address Data Address Data
Reset/Read 1 XXXXh F0h Read
Address Read Data
Reset/Read ×16 45555h AAh 2AAAh 55h 5555h F0h Read Address Read
Data
×8 AAAAh 5555h AAAAh
AutoselectI
D Read
×16
4
5555h
AAh
2AAAh
55h
5555h
90h
01h
Device code
2223h
(T)
22ABh (B)
×8 AAAAh 5555h AAAAh 23h (T)
ABh (B)
×16/×8
00h
MFR code 52h
XXX02h
Sector protection
01 = protected
00 = unprotected
Program ×16 45555h AAh 2AAAh 55h 5555h A0h Program
Address
Program
Data
×8 AAAAh 5555h AAAAh
Chip Erase ×16 65555h AAh 2AAAh 55h 5555h 80h 5555h AAh 2AAAh 55h 5555h 10h
×8 AAAAh 5555h AAAAh AAAAh 5555h AAAAh
Sector Erase ×16 65555h AAh 2AAAh 55h 5555h 80h 5555h AAh 2AAAh 55h Sector
Address 30h
×8 AAAAh 5555h AAAAh AAAAh 5555h
Sector Erase Suspend 1 XXXXh B0h
Sector Erase Resume 1 XXXXh 30h
AS29F400
6
®
Preliminary information
Command definitions
Item Description
Reset/Read
Initiate read or reset operations by writing the Read/Reset command sequence into the command
register. This allows the microprocessor to retrieve data from the memory. Device remains in read
mode until command register contents are altered.
Device automatically powers up in read/reset state. This feature allows only reads, therefore
ensuring no spurious memory content alterations during power up.
ID Read
AS29F400 provides manufacturer and device codes in two ways. External PROM programmers
typically access the device codes by driving +12V on A9. AS29F400 also contains an ID Read
command to read the device code with only +5V, since multiplexing +12V on address lines is
generally undesirable.
Initiate device ID read by writing the ID Read command sequence into the command register.
Follow with a read sequence from address XXX00h to return MFR code. Follow ID Read command
sequence with a read sequence from address XXX01h to return device code.
To verify write protect status on sectors, read address XXX02h. Sector addresses A17–A12 produce
a 1 on DQ0 for protected sector and a 0 for unprotected sector.
Exit from ID read mode with Read/Reset command sequence.
Hardware Reset
Holding RESET low for 500 ns resets the device, terminating any operation in progress; data
handled in the operation is corrupted. The internal state machine resets 20 µs after RESET is driven
low. RY/BY remains low until the RESET operation is completed. After RESET is set high, there is a
delay of 1.5 µs for the device to permit read operations.
Byte/word
Programming
Programming the AS29F400 is a four bus cycle operation performed on a byte-by-byte or word-
by-word basis. Two unlock write cycles precede the Program Setup command and program data
write cycle. Upon execution of the program command, no additional CPU controls or timings are
necessary. Addresses are latched on the falling edge of CE or WE, whichever is last; data is latched
on the rising edge of CE or WE, whichever is first. The AS29F400’s automated on-chip program
algorithm provides adequate internally-generated programming pulses and verifies the
programmed cell margin.
Check programming status by sampling data on the DATA polling (DQ7), toggle bit (DQ6), or
RY/BY pin. The AS29F400 returns the equivalent data that was written to it (as opposed to
complemented data), to complete the programming operation.
The AS29F400 ignores commands written during programming. A hardware reset occurring
during programming may corrupt the data at the programmed location.
AS29F400 allows programming in any sequence, across any sector boundary. Changing data from
0 to 1 requires an erase operation. Attempting to program data 0 to 1 results in either DQ5 = 1
(exceeded programming time limits) or success according to DATA polling; reading this data after
a read/reset operation returns a 0. When programming time limit is exceeded, DQ5 reads high,
and DQ6 continues to toggle. In this state, a Reset command returns the device to read mode.
Chip Erase
Chip erase requires six bus cycles: two unlock write cycles; a setup command, two additional
unlock write cycles; and finally the Chip Erase command.
Chip erase does not require logical 0s to be written prior to erasure. When the automated on-chip
erase algorithm is invoked with the Chip Erase command sequence, AS29F400 automatically
programs and verifies the entire memory array for an all-zero pattern prior to erase. The AS29F200
returns to read mode upon completion of chip erase unless DQ5 is set high as a result of exceeding
time limit.
AS29F400
7
®
Preliminary information
Sector Erase
Sector erase requires six bus cycles: two unlock write cycles, a setup command, two additional
unlock write cycles, and finally the Sector Erase command. Identify the sector to be erased by
addressing any location in the sector. The address is latched on the falling edge of WE; the
command, 30h is latched on the rising edge of WE. The sector erase operation begins after a 80 µs
time-out.
To erase multiple sectors, write the Sector Erase command to each of the addresses of sectors to
erase after following the six bus cycle operation above. Timing between writes of additional
sectors must be <80 µs, or the AS29F400 ignores the command and erasure begins. During the
80 µs time-out period any falling edge of WE resets the time-out. Any command (other than
Sector Erase or Erase Suspend) during time-out period resets the AS29F400 to read mode, and the
device ignores the sector erase command string. Erase such ignored sectors by restarting the Sector
Erase command on the ignored sectors.
The entire array need not be written with 0s prior to erasure. AS29F400 writes 0s to the entire
sector prior to electrical erase; writing of 0s affects only selected sectors, leaving non-selected
sectors unaffected. AS29F400 requires no CPU control or timing signals during sector erase
operations.
Automatic sector erase begins after 80 µs time-out from the last rising edge of WE from the sector
erase command stream and ends when the DATA polling (DQ7) is logical 1. DATA polling address
must be performed on addresses that fall within the sectors being erased. AS29F400 returns to read
mode after sector erase unless DQ5 is set high by exceeding the time limit.
Erase Suspend
Erase Suspend allows interruption of sector erase operations to read data from or program data to a
sector not being erased. Erase suspend applies only during sector erase operations, including the
time-out period. Writing an Erase Suspend command during sector erase time-out results in
immediate termination of the time-out period and suspension of erase operation.
AS29F400 ignores any commands during erase suspend other than Read/Reset, Program or Erase
Resume commands. Writing the Erase Resume Command continues erase operations. Addresses
are DON’T CARE when writing Erase Suspend or Erase Resume commands.
AS29F400 takes 0.1–15 µs to suspend erase operations after receiving Erase Suspend command. To
determine completion of erase suspend, either check DQ6 after selecting an address of a sector not
being erased, or poll RY/BY. Check DQ2 in conjunction with DQ6 to determine if a sector is
being erased. AS29F400 ignores redundant writes of Erase Suspend.
While in erase-suspend mode, AS29F400 allows reading data (erase-suspend-read mode) from or
programming data (erase-suspend-program mode) to any sector not undergoing sector erase,
treated as standard read or standard programming mode. AS29F400 defaults to erase-suspend-read
mode while an erase operation has been suspended.
Write the Resume command 30h to continue operation of sector erase. AS29F400 ignores
redundant writes of the Resume command. AS29F400 permits multiple suspend/resume
operations during sector erase.
Sector Protect
When attempting to write to a protected sector, DATA polling and Toggle Bit 1 (DQ6) are
activated for about <1 µs. When attempting to erase a protected sector, DATA polling and
Toggle Bit 1 (DQ6) are activated for about <5 µs. In both cases, the device returns to read mode
without altering the specified sectors.
Ready/Busy
RY/BY indicates whether an automated on-chip algorithm is in progress (RY/BY = low) or
completed (RY/BY = high). The device does not accept Program/Erase commands when
RY/BY = low. RY/BY= high when device is in erase suspend mode. RY/BY is an open drain
output, enabling multiple RY/BY pins to be tied in parallel with a pull up resistor to VCC.
Item Description
AS29F400
8
®
Preliminary information
Status operations
Write operation status
Toggles with OE or CE only for erasing or erase suspended sector addresses.
Toggles only if DQ5 = 1 and address applied is within sector that exceeded timing limits.
DQ8–DQ15 = Don’t care in ×16 mode.
DATA polling (DQ7)
Only active during automated on-chip algorithms or sector erase time outs. DQ7 reflects
complement of data last written when read during the automated on-chip algorithm (0 during
erase algorithm); reflects true data when read after completion of an automated on-chip algorithm
(1 after completion of erase agorithm).
Toggle bit 1 (DQ6)
Active during automated on-chip algorithms or sector time outs. DQ6 toggles when CE or OE
toggles, or an Erase Resume command is invoked. DQ6 is valid after the rising edge of the fourth
pulse of WE during programming; after the rising edge of the sixth WE pulse during chip erase;
after the last rising edge of the sector erase WE pulse for sector erase. For protected sectors,
DQ6 toggles for <1 µs during writes, and <5 µs during erase (if all selected sectors are protected);
in both cases, data is unaffected.
Exceeding time limit
(DQ5)
Indicates unsuccessful completion of program/erase operation (DQ5 = 1). DATA polling remains
active; CE powers the device down to 2 mA. If DQ5 = 1 during chip erase, all or some sectors are
defective; during sector erase, the sector is defective (in this case, reset the device and execute a
program or erase command sequence to continue working with functional sectors); during byte
programming, that particular byte is defective. Attempting to program 0 to 1 will set DQ5 = 1.
Sector erase timer
(DQ3)
Checks whether sector erase timer window is open. If DQ3 = 1, erase is in progress; no commands
will be accepted. If DQ3 = 0, the device will accept sector erase commands. Check DQ3 before and
after each Sector Erase command to verify that the command was accepted.
Toggle bit 2 (DQ2)
During sector erase, DQ2 toggles with OE or CE only during an attempt to read a sector being
erased. During chip erase, DQ2 toggles with OE or CE for all addresses. If DQ5 = 1, DQ2 toggles
only at sector addresses where failure occurred, and will not toggle at other sector addresses. Use
DQ2 in conjunction with DQ6 to determine whether device is in auto erase or erase suspend
mode.
Status DQ7 DQ6 DQ5 DQ3 DQ2 RY/BY
In progress
Auto programming (byte/word) DQ7 Toggle 0 0 No toggle 0
Program/erase in auto erase 0 Toggle 0 1 Toggle0
Erase
suspend
mode
Read erasing sector 1 No toggle 0 0 Toggle 1
Read non-erasing
sector Data Data Data Data Data 1
Program in erase
suspend DQ7 Toggle 0 0 Toggle0
Exceeded time limits
Auto programming (byte/word) DQ7 Toggle 1 0 No toggle 0
Program/erase in auto erase 0 Toggle 1 1 Toggle0
Program in erase suspend DQ7 Toggle 1 0 Toggle0
AS29F400
9
®
Preliminary information
Automated on-chip programming algorithm Automated on-chip erase algorithm
The system software should check the status of DQ3 prior to and
following each subsequent sector erase command to ensure command
completion. The device may not have accepted the command if DQ3 is
high on second status check.
Write program command sequence
(see below)
DATA poll device
Verify byte?
Programming completed
5555h/AAh
2AAAh/55h
5555h/A0h
Program address/program data
Program command sequence
×16 mode (address/command):
NO
YES
5555h/AAh
2AAAh/55h
5555h/80h
Chip erase command sequence
5555h/AAh
2AAAh/55h
5555h/10h
Sector erase command sequence
Erase complete
Sector address/30h
Sector address/30h
Sector address/30h
Optional multiple
sector erase commands
×16 mode (address/command): ×16 mode (address/command):
5555h/AAh
2AAAh/55h
5555h/80h
5555h/AAh
2AAAh/55h
DATA polling or toggle bit
successfully completed
Write erase command sequence
(see below)
AS29F400
10
®
Preliminary information
DATA polling algorithm
VA = Byte address for programming. VA = any of the sector
addresses within the sector being erased during Sector Erase. VA
= valid address equals any non-protected sector group address
during Chip Erase.
DQ7 rechecked even if DQ5 = 1 because DQ5 and DQ7 may not
change simultaneously.
Toggle bit algorithm
DQ6 rechecked even if DQ5 = 1 because DQ6 may stop toggling
when DQ5 changes to 1.
Read byte (DQ0–DQ7)
Address = VA
Read byte (DQ0–DQ7)
Address = VA
NO
DONE
NO
NO
YES
FAIL
YES
YES
DONE
DQ7
=
data
?
DQ5
=
1
?
DQ7
=
data
?
Read byte (DQ0–DQ7)
Address = don’t care
Read byte (DQ0–DQ7)
Address = don’t care
NO
DONE
YES
YES
YES
FAIL
NO
NO
DONE
DQ6
=
toggle
?
DQ6
=
toggle
?
DQ5
=
1
?
AS29F400
11
®
Preliminary information
DC electrical characteristics VCC = 5.0±0.5V
1 Not more than one output tested simultaneously. Duration of the short circuit must not be >1 second. VOUT = 0.5V was selected to avoid test problems
caused by tester ground degradation. (This parameter is sampled and not 100% tested, but guaranteed by characterization.)
2 The ICC current listed includes both the DC operating current and the frequency dependent component (@ 6 MHz). The frequency component typically
is less than 2 mA/MHz with OE at VIH.
3I
CC active while program or erase operations are in progress.
Maximum negative overshoot waveform
Maximum positive overshoot waveform
Parameter Symbol Test conditions Min Max Unit
Input load current ILI VIN = VSS to VCC, VCC = VCC MAX 1µA
A9 Input load current ILIT VCC = VCC MAX, A9 = 12.5V 90 µA
Output leakage current ILO VOUT = VSS to VCC, VCC = VCC MAX 1µA
Output short circuit current1IOS VOUT = 0.5V - 200 mA
Active current, read @ 6MHz2ICC CE = VIL, OE = VIH -35mA
Active current, program/erase3ICC2 CE = VIL, OE = VIH -60mA
Standby current (TTL) ISB1 CE = OE = VIH, VCC = VCCMAX,
RESET = VIH -1.0mA
Standby current (CMOS) ISB2 CE = VCC + 0.5V, OE = VIH,
VCC = VCC MAX, RESET = VCC ± 0.5V -100µA
Deep power down current ISB3 RESET = VSS ± 0.3V - 5.0 µA
Input low voltage VIL -0.5 0.8 V
Input high voltage VIH 2.0 VCC + 0.5 V
Output low voltage VOL IOL = 5.8mA, VCC = VCC MIN -0.45V
Output high voltage VOH1 IOH = -2.5 mA, VCC = VCC MIN 2.4 - V
VOH2 IOH = -100 µA, VCC = VCC MIN VCC - 0.4 - V
Low VCC lock out voltage VLKO 3.2 4.2 V
Input HV select voltage VID 11.5 12.5 V
20 ns20 ns20 ns
-2.0V
-0.5V
+0.8V
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20 ns20 ns20 ns
VCC+2.0V
VCC+0.5V
+2.0V
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AS29F400
12
®
Preliminary information
AC parameters: read cycle
Key to switching waveforms
Read waveform
JEDEC
Symbol Std Symbol Parameter
-55 -70 -90 -120 -150
UnitMin Max Min Max Min Max Min Max Min Max
tAVAV tRC Read cycle time 55 - 70 - 90 - 120 - 150 - ns
tAVQV tACC Address to output delay - 55 - 70 - 90 - 120 - 150 ns
tELQV tCE Chip enable to output - 55 - 70 - 90 - 120 - 150 ns
tGLQV tOE Output enable to output - 25 - 30 - 35 - 50 - 55 ns
tEHQZ tDF Chip enable to output High Z - 15 - 20 - 20 - 30 - 35 ns
tGHQZ tDF Output enable to output High Z - 15 - 20 - 20 - 30 - 35 ns
tAXQX tOH Output hold time from addresses,
first occurrence of CE or OE 0-0-0-0-0-ns
t
ELFL/ELFH CE to BYTE transition low/high - 5 - 5 - 5 - 5 - 5 ns
tPHQV tPWH RESET high to output delay - 1.5 - 1.5 - 1.5 - 1.5 - 1.5 µs
tBDEL BYTE switching to valid data - 55 - 70 - 90 - 120 - 150 ns
tFLQZ BYTE low to DQ8–DQ15 tri-state 25 - 30 - 35 - 50 - 55 - ns
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Undefined output/don’t care
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Falling input
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Rising input
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Addresses stable
Addresses
tRC
tACC
tOE
tOEH
tCE tOH
tDF
CE
OE
WE
Outputs High Z High Z
Output valid
tELFL/ELFH
tPWH
BYTE
RESET
tBDEL
AS29F400
13
®
Preliminary information
AC parameters — write cycle WE controlled
Write waveform WE controlled
JEDEC
Symbol Std Symbol Parameter
-55 -70 -90 -120 -150
UnitMin Max Min Max Min Max Min Max Min Max
tAVAV tWC Write cycle time 55 - 70 - 90 - 120 - 150 - ns
tAVWL tAS Address setup time 0 - 0 - 0 - 0 - 0 - ns
tWLAX tAH Address hold time 40 - 45 - 45 - 50 - 50 - ns
tDVWH tDS Data setup time 25 - 30 - 45 - 50 - 50 - ns
tWHDX tDH Data hold time 0 - 0 - 0 - 0 - 0 - ns
tOES Output enable setup time 0 - 0 - 0 - 0 - 0 - ns
tOEH Output enable hold time:
Toggle and data polling 10 - 10 - 10 - 10 - 10 - ns
tREADY RESET pin low to read mode 20 - 20 - 20 - 20 - 20 - µs
tRP RESET pulse 500 - 500 - 500 - 500 - 500 - ns
tGHWL tGHWL Read recover time before write 0 - 0 - 0 - 0 - 0 - ns
tELWL tCS CE setup time 0 - 0 - 0 - 0 - 0 - ns
tWHEH tCH CE hold time 0-0-0-0-0- ns
t
WLWH tWP Write pulse width 35 - 35 - 45 - 50 - 55 - ns
tWHWL tWPH Write pulse width high 20 - 20 - 20 - 20 - 20 - ns
tWHWH1 tWHWH1 Programming time 15-15-15-15-15- µs
t
WHWH2 tWHWH2 Erase time 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - sec
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Addresses
CE
OE
WE
DATA
VSS
tWC tAS
tAH
tGHWL; tOES
tWP
tCS tWPH
tDH
tWHWH1 or 2
tDS
DQ7D
OUT
Program
5555h Program address Program address
3rd bus cycle
tCH
DATA polling
data
A0h
AS29F400
14
®
Preliminary information
AC parameters—write cycle 2 CE controlled
Write waveform 2 CE controlled
JEDEC
Symbol Std Symbol Parameter
-55 -70 -90 -120 -120
UnitMin Max Min Max Min Max Min Max Min Max
tAVAV tWC Write cycle time 55 - 70 - 90 - 120 - 150 - ns
tAVEL tAS Address setup time 0 - 0 - 0 - 0 - 0 - ns
tELAX tAH Address hold time 40 - 45 - 45 - 50 - 50 - ns
tDVEH tDS Data setup time 25 - 30 - 45 - 50 - 50 - ns
tEHDX tDH Data hold time 0 - 0 - 0 - 0 - 0 - ns
tOES Output enable setup time 0 - 0 - 0 - 0 - 0 - ns
tOEH
Output enable hold time: Read 0 - 0 - 0 - 0 - 0 - ns
Output enable hold time:
Toggle and data polling 10 - 10 - 10 - 10 - 10 - ns
tGHEL tGHEL Read recover time before write 0 - 0 - 0 - 0 - 0 - ns
tWLEL tWS WE setup time 0 - 0 - 0 - 0 - 0 - ns
tEHWH tWH WE hold time 0 - 0 - 0 - 0 - 0 - ns
tELEH tCP CE pulse width 35 - 35 - 45 - 50 - 55 - ns
tEHEL tCPH CE pulse width high 20 - 20 - 20 - 20 - 20 - ns
tWHWH1 tWHWH1 Programming time 15 - 15 - 15 - 15 - 15 - µs
tWHWH2 tWHWH2 Erase time 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - sec
Addresses
WE
OE
CE
Data
Program address5555h Program address
A0h Program DQ7D
OUT
tWC tAS tAH
tGHEL, tOES
tCP
tCPH tDH
tDS
tWHWH1 or 2
DATA polling
data
AS29F400
15
®
Preliminary information
Erase waveform ×16 mode only
RESET waveform
RY/BY waveform
DATA polling waveform
Addresses
CE
OE
WE
Data
5555h 2AAAh 5555h 5555h 2AAAh Sector address
tWC tAS
tAH
tGHWL
AAh 55h 80h AAh 55h 30h
10h for Chip Erase
tWP
tCS
tWPH
tDH
tDS
tWC
CE
RY/BY
RESET
tRP
tREADY
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CE
WE
RY/BY
Rising edge of last WE signal
Program/erase
operation
tri-stated open-drain
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CE
OE
WE
DQ7
tCH
tOH
tWHWH1 or 2
tOE
tOEH
tCE
tDF
High Z
Input DQ7 Output DQ7 Output
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AS29F400
16
®
Preliminary information
Toggle bit waveform
Erase and programming performance
Latchup tolerance
Includes all pins except VCC. Test conditions: VCC = 5.0V, one pin at a time.
AC test conditions
Parameter
Limits
UnitMin Typical Max
Sector erase and verify-1 time (excludes 00h programming prior to erase) -1.0 - sec
Word programming time - 15 - µs
Byte program time - 15 - µs
Chip programming time - 2.5 - sec
Erase program cycles - - 10,000 cycles
Parameter Min Max Unit
Input voltage with respect to VSS on A9, OE, and RESET pin -1.0 +13.0 V
Input voltage with respect to VSS on all DQ, address and control pins -1.0 VCC+1.0 V
Current -100 +100 mA
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A
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CE
WE
OE
DQ6
tOEH
tDH tOE
6.2K
100 pF*
2.7K
Device under test
VSS
+5.0V
*includi ng scope
and jig capacitance
VSS VSS
1N3064
or equ ivalent
1N3064
or equivalent
AS29F400
17
®
Preliminary information
Recommended operating conditions
Absolute maximum ratings
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute max-
imum rating conditions for extended periods may affect reliability.
TSOP pin capacitance
SO pin capacitance
Data retention
Parameter Symbol Min Typ Max Unit
Supply voltage VCC +4.5 5.0 +5.5 V
VSS 000V
Input voltage VIH 2.0 - VCC + 0.5 V
VIL –0.5 - 0.8 V
Parameter Symbol Min Max Unit
Input voltage (Input or DQ pin) VIN –2.0 +7.0 V
Input voltage (A9 pin, OE, RESET)V
IN –2.0 +13.0 V
Power supply voltage VCC -0.5 +5.5 V
Operating temperature TOPR –55 +125 °C
Storage temperature (plastic) TSTG –65 +125 °C
Short circuit output current IOUT -200mA
Symbol Parameter Test setup Typ Max Unit
CIN Input capacitance VIN = 0 6 7.5 pF
COUT Output capacitance VOUT = 0 8.5 12 pF
CIN2 Control pin capacitance VIN = 0 8 10 pF
Symbol Parameter Test setup Typ Max Unit
CIN Input capacitance VIN = 0 6 7.5 pF
COUT Output capacitance VOUT = 0 8.5 12 pF
CIN2 Control pin capacitance VIN = 0 8 10 pF
Parameter Temp.(°C) Min Unit
Minimum pattern data retention time 150° 10 years
125° 20 years
AS29F400
18
®
Preliminary information
Package dimensions
e
f
g
1
2
3
4
5
6
7
8
9
10
11
12
13
14
48
47
46
45
44
43
42
41
40
39
38
37
36
35
15
16
34
33
17
18
19
20
21
22
32
31
30
29
28
27
23
24
26
25
b
a
c
d
i
h
j
5678910111213141516171819202122 234 1
403938373635343332313029282726252423 434241 44
p
no
q
m
r
s t
u
w
48-pin TSOP
44-pin SO
0–5°
0–8°
48-pin TSOP
min (mm) max (mm)
a–1.20
b–0.25
c0.50.7
d0.10.21
e 18.30 18.50
f 19.80 20.20
g 11.90 12.10
h0.951.05
i0.050.15
j–0.50
44-pin SO
min (mm) max (mm)
m 28.00 28.40
n0.350.50
o0.100.35
p2.172.45
q–2.80
r1.27
s 13.10 13.50
t 15.70 16.30
u0.061.00
w0.100.21
AS29F400
19
®
Preliminary information
AS29F400 ordering codes
AS29F400 part numbering system
Package \ Access Time 55ns (commercial only) 70 ns (commercial/industrial) 90 ns (commercial/industrial) 120 ns (commercial/industrial) 150 ns (commercial/industrial)
TSOP, 12×20 mm,
48-pin
AS29F400B-55TC AS29F400B-70TC
AS29F400B-70TI
AS29F400B-90TC
AS29F400B-90TI
AS29F400B-120TC
AS29F400B-120TI
AS29F400B-150TC
AS29F400B-150TI
AS29F400T-55TC AS29F400T-70TC
AS29F400T-70TI
AS29F400T-90TC
AS29F400T-90TI
AS29F400T-120TC
AS29F400T-120TI
AS29F400T-150TC
AS29F400T-150TI
SO, 600 mil wide,
44-pin
AS29F400B-55SC AS29F400B-70SC
AS29F400B-70SI
AS29F400B-90SC
AS29F400B-90SI
AS29F400B-120SC
AS29F400B-120SI
AS29F400B-150SC
AS29F400B-150SI
AS29F400T-55SC AS29F400T-70SC
AS29F400T-70SI
AS29F400T-90SC
AS29F400T-90SI
AS29F400T-120SC
AS29F400T-120SI
AS29F400T-150SC
AS29F400T-150SI
AS29F 400 X –XXX X X
Flash EEPROM prefix Device number B (bottom) or
T (top) boot block Address access time Package: S= SO
T= TSOP
Temperature range:
C = Commercial: 0°C to 70°C
I = Industrial: -40°C to 85°C
AS29F400
DOMESTIC REPS
ALABAMA
Concord Component Reps
190 Lime Quarry, Suite #102
Madison, AL 35758
(205) 772-8883
ARKANSAS
Southern States Marketing
1702 N. Collins Blvd., Suite
#250
Richardson, TX 75080
(214) 238-7500
CALIFORNIA
North:
Brooks Technical Group
883 N. Shoreline Blvd.
Mountain View, CA 94043
(415) 960-3880
South:
Action Technical Sales
2137 Newcastle Avenue
Cardiff, CA 92007-1824
(619) 634-1488
Competitive Technology
16253 Laguna Canyon Road
Suite #160
Irvine, CA 92718.
(714) 450-0170
COLORADO
Technology Sales
1720 South Bellaire Street
Suite #910
Denver, CO 80222
(303) 692-8835
CONNECTICUT
Kitchen & Kutchin Associates
154 State St.
North Haven, CT 06473
(203) 239-0212
DELAWARE
Electro Tech
621 E. Germantown Pike,
Suite #202
Norristown, PA 19401-2454
(610) 272-2125
FLORIDA
Micro-Electronic Components
Corp.
400 Fairway Drive, Suite #107
Deerfield Beach, FL 33441
(954) 426-8944
Micro-Electronic Components
Corp.
822 Riverbend Blvd.
Longwood, FL 32779
(407) 682-9602
Micro-Electronic Components
Corp.
10637 Harborside Drive, North
Largo, FL 34643
(813) 393-5011
GEORGIA
Concord Component Reps
6825 Jimmy Carter Blvd. 1303
Norcross, GA 30071
(770) 416-9597
HAWAII
Brooks Technical Group
883 N. Shoreline Blvd.
Mountain View, CA 94043
(415) 960-3880
IDAHO
ES/Chase
6655 SW Hampton, Suite #120
Tigard, OR 97223
(503) 684-8500
ILLINOIS
El-Mech
3511 N. Cicero Avenue
Chicago, IL 60641
(312) 794-9100
CenTech
3751 Pennridge Dr., Suite #107
Bridgeton, MO 63044
(314) 291-4230
INDIANA
CC Electro Sales
1843 N. Meridian Street
Indianapolis, IN 46202-1411
(317) 921-5000
KANSAS
CenTech
10312 East 63rd Terrace
Raytown, MO 64133
(816) 358-8100
KENTUCKY
CC Electro Sales
1843 N. Meridian Street
Indianapolis, IN 46202-1411
(317) 921-5000
LOUISIANA
Southern States Marketing
13831 NW Freeway, Suite #151
Houston, TX 77040
(713) 895-8533
Southern States Marketing
1702 N. Collins Blvd., Suite
#250
Richardson, TX 75080
(214) 238-7500
MAINE
Kitchen & Kutchin Associates
87 Cambridge Street
Burlington, MA 01803
(617) 229-2660
MARYLAND
Chesapeake Technology
3905 National Drive, Suite #425
Burtonsville, MD 20866
(301) 236-0530
MASSACHUSETTS
Kitchen & Kutchin Associates
87 Cambridge Street
Burlington, MA 01803
(617) 229-2660
MICHIGAN
Enco Group
799 Industrial Court
Bloomfield Hills, MI 48302
(810) 338-8600
MINNESOTA
D.A. Case Associates
4620 W. 77th Street Suite #250
Minneapolis, MN 55435
(612) 831-6777
MISSOURI
CenTech
3751 Pennridge Dr., Suite #107
Bridgeton, MO 63044
(314) 291-4230
CenTech
10312 East 63rd Terrace
Raytown, MO 64133
(816) 358-8100
MISSISSIPPI
Concord Component Reps
190 Lime Quarry, Suite #102
Madison, AL 35758
(205) 772-8883
MONTANA
ES/Chase
6655 SW Hampton, Suite #120
Tigard, OR 97223
(503) 684-8500
NEBRASKA
CenTech
10312 East 63rd Terrace
Raytown, MO 64133
(816) 358-8100
NEVADA
Brooks Technical Group
883 N. Shoreline Blvd.
Mountain View, CA 94043
(415) 960-3880
NEW HAMPSHIRE
Kitchen & Kutchin Associates
87 Cambridge Street
Burlington, MA 01803
(617) 229-2660
NEW JERSEY
ERA Associates
354 Veterans Memorial Hwy
Commack, NY 11725
(800) 645-5500
Electro Tech
621 E. Germantown Pike
Suite #202
Norristown, PA 19401-2454
(610) 272-2125
NEW YORK
ERA Associates
354 Veterans Memorial Hwy
Commack, NY 11725
(516) 543-0510
Tri-Tech Electronics
1043 Front Street
Binghamton, NY 13905
(607) 722-3580
Tri-Tech Electronics
349 W. Commercial Street
Suite #2585
East Rochester, NY 14445
(716) 385-6500
NORTH CAROLINA
Concord Component Reps
10608 Dunhill Terrace
Raleigh, NC 27615
(919) 846-3441
NORTH DAKOTA
D.A. Case Associates
4620 W. 77th Street Suite #250
Minneapolis, MN 55435
(612) 831-6777
OHIO
Midwest Marketing Associates
5001 Mayfield Road Suite #319
Lyndhurst, OH 44124
(216) 381-8575
Midwest Marketing Associates
30 Marco Lane
Dayton, OH 45458
(513) 433-2511
OKLAHOMA
Southern States Marketing
1702 N. Collins Blvd., Suite
#250
Richardson, TX 75080
(214) 238-7500
OREGON
ES/Chase
6655 SW Hampton, Suite #120
Tigard, OR 97223
(503) 684-8500
PENNSYLVANIA
Electro Tech
621 E. Germantown Pike
Suite #202
Norristown, PA 19401-2454
(610) 272-2125
Midwest Marketing Associates
5001 Mayfield Road Suite #319
Lyndhurst, OH 44124
(216) 381-8575
RHODE ISLAND
Kitchen & Kutchin Associates
87 Cambridge Street
Burlington, MA 01803
(617) 229-2660
SOUTH CAROLINA
Concord Component Reps
10608 Dunhill Terrace
Raleigh, NC 27615
(919) 846-3441
SOUTH DAKOTA
D.A. Case Associates
4620 W. 77th Street
Suite #250
Minneapolis, MN 55435
(612) 831-6777
TENNESSEE
Concord Component Reps
190 Lime Quarry, Suite #102
Madison, AL 35758
(205) 772-8883
TEXAS
Southern States Marketing
400 Anderson Lane
Suite #118
Austin, TX 78752
(512) 835-5822
Southern States Marketing
13831 NW Freeway
Suite #151
Houston, TX 77040
(713) 895-8533
Southern States Marketing
1702 N. Collins Blvd.
Suite #250
Richardson, TX 75080
(214) 238-7500
UTAH
Charles Fields & Associates
103 East 650 North
Bountiful, UT 84010
(801) 299-8228
VERMONT
Kitchen & Kutchin Associates
87 Cambridge Street
Burlington, MA 01803
(617) 229-2660
VIRGINIA
Chesapeake Technology
3905 National Drive
Suite #425
Burtonsville, MD 20866
(301) 236-0530
WASHINGTON
ES/Chase
12025 115th Avenue NE
Suite #200
Kirkland, WA 98034
(206) 823-9535
WEST VIRGINIA
Chesapeake Technology
3905 National Drive
Suite #425
Burtonsville, MD 20866
(301) 236-0530
WISCONSIN
D.A. Case Associates
4620 W. 77th Street
Suite #250
Minneapolis, MN 55435
(612) 831-6777
WYOMING
Technology Sales
1720 South Bellaire Street
Suite #910
Denver, CO 80222
(303) 692-8835
INTERNATIONAL
REPS
AUSTRALIA
ACD
14 Melrich Road, Unit 1
Bayswater, Victoria 3153
+61-3-9762-7644
R&D Electronics
4 Plane Tree Avenue
Dingley, Victoria 3172
+61-3-9558-0444
CANADA
J-Squared Technologies
4170 Still Creek Dr. Suite #200
Burnaby, British Columbia
V5C 6C6
(604) 473-4666
J-Squared Technologies
2723 37th Avenue NE
Suite #206
Calgary, Alberta T1Y 5R8
(403) 291-6755
J-Squared Technologies
300 March Road, Wuite 501
Kanata, Ontario K2K 2E2
(613) 592-9540
J-Squared Technologies
3395 American Dr.
Bldg. 306 Unit 2
Mississauga, Ontario L4V 1T4
(905) 672-2030
J-Squared Technologies
100 Alexis Nihon, Suite #960
St. Laurent, Quebec H4M 4P5
(514) 747-1211
EUROPE
Brit Comp Sales Ltd.
1 Brooklands Road
Weybridge, Surrey
KIT13 0SD England
+44-1932 347077
+44-1932 346256
Munich, Germany
+49-894488496
Athismons, France
+33-1-69387678
interACTIVE
Epos House
263 Heage Road
Ripley, Derbyshire
DE5 3GH England
+44-1773-740263
Ramtec Int’l B.V.
Holland, Spain, Italy
Belgium, Hungary, Russia
+31-2526-21222
HONG KONG
Eastele Technology, Ltd.
A16, 6/F.,
Proficient Ind Centre
6 Wang Kwun Road
Kowloon Bay
+852-2798-8860
INDIA
Priya Electronics
San Jose, CA USA
(408) 954-1866
Satcom Sales and Services
201/2, 2nd Floor,
Azam Complex
Shivam Road, Baghamberpet
Hyderabad 500 013
+91-40-761-4675
ISRAEL
Eldis Technologies
36 Kehilat St.
Herzlia 46382 Israel
+972-9-562-666
JAPAN
Bussan Micro Electronics Corp.
Sowa Gotanda Bldg.
7-18, Higashi Gotanda
2-Chome
Shinagawa-ku, Tokyo 141
+81-3-5421-1730
Rohm Corporation
R&D Division/
Advanced Tech 21-
Saiin Mizosaki-cho Ukyo-ku
Kyoto 615
+81-75-311-2121
KOREA
FM Korea
6th Fl. Bando Bldg.
48-1, Banpo-dong, Seocho-ku
Seoul 137 140 Korea
+822-596-3880
fm@ktnet.co.kr
Woo Young Tech Co., Ltd.
5th Floor Koami Bldg., 13-31
Yoido-dong, Youngdeungpo-ku
Seoul, Korea
+822-369-7099
MALAYSIA
Exertec Pte Ltd.
Blk 1A/14/07 Sunnyville
No. 1 Jalan Batu Uban
Gelugor, Penang 11700 Malaysia
+60-4-657-9592
PUERTO RICO
MEC/Caribe
P.O. Box 5038
Caguas, PR 00726
(787) 746-9897
SINGAPORE
Exertec Pte Ltd.
5 Kallang Sector #04-01
349279 Singapore
+65-749-1349
TAIWAN
ASTL
Room A3, 10th Fl.
No. 58 Sec. 1
Ming-Sheng Road
Taipei, Taiwan R.O.C.
+886-2-521-2363
Golden Way
7F-3, 75, Hsin Tai Wu Road
Sec. 1, His-Chih
Taipei-Hsien Taiwan R.O.C.
+886-2-698-1868 x505
Puteam International
9F-5, 391 Sec. 4 Hsin-Yi Road
Taipei, Taiwan R.O.C.
+886-2-729-0373
SALES OFFICES
HEADQUARTERS
Alliance Semiconductor
San Jose, CA
Tel: (408) 383-4900
Fax: (408) 383-4999
BBS: (408) 383-4994
NORTHEAST AREA
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Boston, MA
(617) 239-8127
TECHNICAL CENTER
TAIWAN
Alliance Semiconductor
11F, NO.66, Sec. 2
Jang Kuao N. Road
Taipei, Taiwan R.O.C.
Tel:+886-2-516-7995
Fax:+886-2-517-4928
alliance@netra.wow.net.tw
Alliance Semiconductor reserves the right to make changes in this data sheet at any time to improve design and supply the best product possible. Publication of advance information does not constitute a
committment to produce or supply the product described. The company cannot assume responsibility for circuits shown or represent that they are free from patent infringement. Alliance products are not
authorized for use as critical components in life support devices or systems without the express written approval of the president of Alliance. ProMotion® and the Alliance logo are registered trademarks
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ALLIANCE SEMICONDUCTOR
3099 North First Street San Jose, CA 95134 Tel (408) 383-4900 Fax (408) 383-4999 BBS: (408) 383-4994 www.alsc.com
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