LT3905
1
3905fa
For more information www.linear.com/LT3905
Typical applicaTion
FeaTures DescripTion
Boost DC/DC Converter
with APD Current Monitor
The LT
®
3905 is a fixed frequency current-mode step-up
converter designed to bias avalanche photodiodes (APD)
in optical receivers. The LT3905 features high side APD
current monitoring over four decades of dynamic range
with better than 2% relative accuracy over the 3µA to
3mA range.
The maximum APD current is programmed with a single
resistor, and a fast current limiter with indicator protects
the APD during overload conditions. Adjustable output
voltage provides dynamic bias control, and an adjustable
loss-of-signal indicator flags low APD current.
Coupled with the integrated DMOS power switch and
Schottky rectifier, the LT3905 provides a compact total
solution with few external components and low solution
cost. Constant switching frequency results in predictable
output noise that is easy to filter.
The LT3905 is available in the tiny footprint (3mm × 3mm)
16-Lead QFN Package.
Adjustable APD Bias Supply
Input Current vs APD Current
applicaTions
n 65V, 350mA Internal DMOS Switch
n Integrated Schottky Diode
n 2% Accurate APD Current Monitoring Over the 3µA
to 3mA Range
n Single Resistor Programs Maximum APD Current
n Fast APD Current Limiter with Indicator
n Programmable Loss-of-Signal Indicator
n CTRL Pin Adjusts Output Voltage
n Programmable VIN Undervoltage Lockout
n High Efficiency Step-Up Converter
n Selectable 1MHz/2MHz Switching Frequency
n Internally Compensated
n Internal Soft-Start
n 2.7V to 12V VIN Range
n Low Shutdown Current: <1µA
n APD Bias
n PIN Diode Bias
n Optical Receivers and Modules
n Fiber Optic Network Equipment
L, LT , LT C , LT M , Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
LT3905
RX POWER
3905 TA01a
1:5
MON
VIN SW
fSEL
EN/UVLO
CTRL
V
OUT ADJUST
10µH
1µF
LOS_ADJ
LOS
ILIM
100k100k
VIN
2.7V to 12V
VIN
4.99k
1mV/µA
1:20
ILIM_MON
9.09k
2.75mA
LIMIT
1:10
LOS_MON
1M
12.5µA LOS
VOUT
FB
MONIN
APD
APD
GND
220nF
634k
UP TO 54V
15k
IAPD (mA)
0
INPUT CURRENT (mA)
75
100
125
2.5
3905 TA01b
50
25
00.625 1.25 1.875
VIN = 3.3V
VAPD = 45V
VIN = 5V
LT3905
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3905fa
For more information www.linear.com/LT3905
pin conFiguraTionabsoluTe MaxiMuM raTings
VIN, FB, EN/UVLO, CTRL, fSEL,
LOS_ADJ, LOS, ILIM .................................................12V
VOUT, SW, MONIN, APD ............................................65V
MON, LOS_MON, ILIM_MON ..................................2.5V
Operating Ambient Temperature Range
(Note 2) ...................................................... –40 to 125°C
Operating Junction Temperature Range
(Note 2) ...................................................... –40 to 125°C
Storage Temperature Range ...................... –65 to 125°C
(Note 1)
16 15 14 13
5678
TOP VIEW
17
GND
UD PACKAGE
16-LEAD (3mm
×
3mm) PLASTIC QFN
9
10
11
12
4
3
2
1ILIM
LOS_MON
ILIM_MON
MON
CTRL
EN/UVLO
VIN
GND
fSEL
FB
LOS_ADJ
LOS
APD
MONIN
SW
VOUT
θJA = 68°C/W, θJC = 7.5°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3905EUD#PBF LT3905EUD#TRPBF LGGP 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3905IUD#PBF LT3905IUD#TRPBF LGGP 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LT C Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT3905
3
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For more information www.linear.com/LT3905
elecTrical characTerisTics
PARAMETER CONDITIONS MIN TYP MAX UNITS
Operating Voltage Range 2.7 12 V
Supply Current VENUVLO = 0V, Device in Shutdown
VENUVLO = 1.1V, Before Trip Point
VENUVLO = 1.3V, VFB = 2V, Switcher Standby
VENUVLO = 1.3V, VFB = 1.5V, Not Switching
0.1
6
250
650
1
10
350
750
µA
µA
µA
µA
Feedback Voltage (VFB) VCTRL = 1.5V
l
1.238
1.223
1.248 1.258
1.273
V
V
Feedback Line Regulation 2.7V ≤ VIN ≤ 12V 0.005 0.025 %/V
FB Pin Bias Current l15 75 nA
FB Standby Threshold VFB Rising 1.65 1.80 1.95 V
FB Standby Threshold Hysteresis 50 mV
CTRL to FB Offset VCTRL = 0.5V l–13 0 13 mV
CTRL Input Bias Current Current Out of Pin, VCTRL = 0.5V l15 75 nA
MON Pin Voltage Clamp IAPD = 300µA, RMON = Open l2.35 2.5 V
LOS_MON Pin Voltage Clamp IAPD = 300µA, RLOS_MON = Open l2.35 2.5 V
MON Pin Bias Current Current Out of Pin, IAPD = 0A, VMON = 1V 0 nA
LOS_MON Pin Bias Current Current Out of Pin, IAPD = 0A, VLOS_MON = 1V 10 50 nA
ILIM_MON Pin Bias Current Current Out of Pin, IAPD = 0A, VILIM_MON = 1V 35 175 nA
APD Monitor (MON) Current Gain 300nA ≤ IAPD ≤ 3µA, 12V ≤ MONIN ≤ 65V
3µA ≤ IAPD ≤ 3mA, 12V ≤ MONIN ≤ 65V
l
l
0.185
0.196
0.20
0.20
0.215
0.204
APD Loss of Signal Monitor (LOS_MON)
Current Gain
3µA ≤ IAPD ≤ 30µA, 12V ≤ MONIN ≤ 65V
30µA ≤ IAPD ≤ 3mA, 12V ≤ MONIN ≤ 65V
l
l
0.092
0.096
0.10
0.10
0.108
0.104
APD Current Limit Monitor (ILIM_MON) Current
Gain
30µA ≤ IAPD ≤ 300µA, 12V ≤ MONIN ≤ 65V
300µA ≤ IAPD ≤ 3mA, 12V ≤ MONIN ≤ 65V
l
l
0.045
0.048
0.05
0.05
0.055
0.052
APD Monitor Voltage Drop MONIN – APD at IAPD = 3mA, MONIN = 65V 3.7 3.95 4.2 V
Boost Converter
Switching Frequency fSEL = 0V
fSEL = 2V
l
l
0.9
1.8
1
2
1.1
2.2
MHz
MHz
Maximum Duty Cycle fSEL = 0V
fSEL = 2V
90
80
95
90
%
%
Switch Current Limit 350 400 450 mA
Switch On-Resistance ISW = 150mA 0.75 Ω
Switch Leakage Current SW = 65V 0.1 3 µA
Schottky Forward Voltage ISCHOTTKY = 150mA 780 mV
Schottky Reverse Leakage VOUT – SW = 65V 3 µA
Loss Of Signal Comparator
Loss of Signal Comparator Internal Threshold LOS_ADJ = 1.5V, LOS_MON Falling 1.185 1.248 1.310 V
Loss of Signal Comparator External Threshold LOS_ADJ = 1.0V, LOS_MON Falling l0.950 1.050 V
Loss of Signal Comparator Hysteresis LOS_MON Rising 20 mV
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VENUVLO = VCTRL = 3.3V unless otherwise noted.
LT3905
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For more information www.linear.com/LT3905
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3905E is guaranteed to meet specified performance
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3905I is guaranteed to meet performance specifications over the –40°C
to 125°C operating junction temperature range.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Current Regulation Buffer Amplifier
ILIM_MON Voltage Regulation Threshold (VIFB) VFB = 0.5V
l
1.223
1.211
1.248 1.273
1.285
V
V
ILIM_MON APD Current Limit Threshold (VILIM)
l
1.323
1.311
1.348 1.373
1.385
V
V
ILIM_MON APD Current Limit Line Regulation VAPD = 0V, ∆IAPD/∆VMONIN, 5V < VMONIN < 65V 10 μA/V
ILIM_MON Indicator Threshold VILIM_MON Rising lVILIM – 30 VILIM – 10 VILIM – 2 mV
ILIM_MON Indicator Hysteresis 30 mV
Inputs/Outputs
EN/UVLO Threshold VENUVLO Falling
l
1.128
1.104
1.200
1.200
1.272
1.296
V
V
EN/UVLO Internal Hysteresis VENUVLO Rising 25 mV
EN/UVLO Hysteresis Current VENUVLO = 1.1V, Device in Shutdown
VENUVLO = 1.3V, Device in Operation
3
0
µA
µA
fSEL Voltage Threshold fSEL Rising 0.700 0.900 1.100 V
fSEL Threshold Hysteresis 50 mV
fSEL Input Bias Current 0 µA
LOS Open Drain ON Resistance ILOS = 1mA 100 Ω
LOS Output Low Voltage ILOS = 2mA 0.3 V
LOS Off-State Leakage VIN = VLOS = 12V 1 µA
ILIM Open Drain ON Resistance IILIM = 1mA 100 Ω
ILIM Output Low Voltage IILIM = 2mA 0.3 V
ILIM Off-State Leakage VILIM = 12V 1 µA
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VENUVLO = VCTRL = 3.3V unless otherwise noted.
LT3905
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For more information www.linear.com/LT3905
Typical perForMance characTerisTics
Switch Resistive Drop
vs Switch Current
Diode Forward Drop
vs Diode Current
Switch Current Limit
vs Duty Cycle
FB Voltage vs Temperature
APD Current Regulation
vs Temperature
Oscillator Frequency
vs Temperature
FB vs CTRL
LT3905 Current Regulation
vs RILIM_MON
Current Monitor Outputs
vs APD Current
TEMPERATURE (°C)
–50
V
FB
(V)
1.2550
1.2525
1.2500
1.2450
1.2475
1.2425
1.2375
1.2400
1.2350 0 50 100
3905 G01
150
ISW (mA)
V
SW
(mV)
350
300
200
250
150
50
100
0
3905 G04
50 100 200150 300
400
250 350
CTRL (V)
0
FB (V)
2.00
1.50
1.75
1.00
1.25
0.75
0.25
0.50
01.0
3905 G07
2.0
0.5 1.5
CTRL
FB
ID (mA)
50
V
F
(mV)
1000
950
850
900
800
700
750
650 100 200150 300
3905 G05
400
250 350
RILIM_MON (Ω)
I
APD
3905 G08
10mA
1mA
100µA
10µA
1µA1k 10k 10M
100M
1M100k
LT3905
IDEAL
DUTY CYCLE (%)
0
SWITCH CURRENT LIMIT (mA)
500
50
450
350
250
150
400
300
200
100
0
3905 G06
100
40 8020 60
APD CURRENT
MONITOR OUTPUT
3905 G09
1mA
100µA
10µA
10nA
100nA
1µA
300nA 300µA
3mA
30µA3µA
MON
LOS_MON
ILIM_MON
TEMPERATURE (°C)
–50
I
APD
(mA)
1.020
1.010
1.015
1.000
1.005
0.995
0.985
0.990
0.980 0 50–25 25 100
3905 G02
150
75 125
RILIM_MON = 24.9k
TEMPERATURE (°C)
–50
2.0
1.6
1.8
1.4
1.0
1.2
0.8 0 50 100
fSEL = 2V
fSEL = 0V
LT3905
6
3905fa
For more information www.linear.com/LT3905
Typical perForMance characTerisTics
Current Monitor Voltage Drop
vs APD Current
Current Monitor Transient
Response (Rising Edge)
Current Monitor Transient
Response (Falling Edge)
MON Clamp Voltage
vs TemperatureSW Current Limit vs Temperature
MON Accuracy vs Temperature
LOS_MON Accuracy
vs Temperature
ILIM_MON Accuracy
vs Temperature
TEMPERATURE (°C)
–50
ERROR (%)
1
–1
0
–3
–2
–4
–5 0 50–25 25 100
3905 G10
150
75 125
IAPD = 300nA
IAPD = 3µA
IAPD = 30µA
IAPD = 300µA
IAPD = 3mA
TEMPERATURE (°C)
–50
ERROR (%)
4
3
2
1
–1
0
–3
–2
–4 0 50–25 25 100
3905 G11
150
75 125
IAPD = 3µA
IAPD = 30µA
IAPD = 300µA
IAPD = 3mA
TEMPERATURE (°C)
–50
ERROR (%)
8
4
6
0
2
–2
–4 0 50–25 25 100
3905 G12
150
75 125
IAPD = 30µA
IAPD = 300µA
IAPD = 3mA
IAPD
MONIN – APD (V)
3905 G13
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
100nA 1µA 1mA
10mA
100µA10µA
TA = –40°C
TA = 25°C
TA = 125°C
APD CURRENT (mA)
0
2.00
MON PIN VOLTAGE (V)
2.25
2.50
2.75
3.00
0.5 1 1.5 2
3905 G16
2.5 3
RMON = OPEN
–40°C
40°C
125°C
IAPD = 10µA
tHL ~ 120ns
IAPD = 1mA
100ns/DIV 3905 G14
RESPONSE
IAPD = 10µA
tLH ~ 120ns
IAPD = 1mA
100ns/DIV 3905 G15
TEMPERATURE (°C)
–50
350
SW CURRENT LIMIT (mA)
375
400
425
450
–25 0 25 50
3905 G17
75 100 125 150
LT3905
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For more information www.linear.com/LT3905
pin FuncTions
ILIM (Pin 1): Open Drain Overload Indicator. ILIM pulls
low when the voltage on ILIM_MON reaches the 1.348V
threshold, and releases when ILIM_MON drops by 50mV.
Tie this pin to desired logic high voltage with an external
pull-up resistor. The maximum recommended sink current
is 2mA to prevent excess power dissipation. Leave this
pin open if unused.
LOS_MON (Pin 2): Loss of Signal Monitor. This pin sources
a current proportional to 10% of the APD current, and acts
as the positive input for the Loss of Signal comparator.
It is clamped to 2.25V through an internal diode. Tie a
resistor from LOS_MON to GND to set the Loss of Signal
gain. Tie this pin to GND if unused.
ILIM_MON (Pin 3): APD Overload Monitor. This pin sources
a current proportional to 5% of the APD current, and acts
as the negative input for the current regulation loop and
the APD current limiter. It is clamped to 2.25V through an
internal diode. Tie a resistor from ILIM_MON to GND to
set the gain. If ILIM_MON exceeds the 1.248V setpoint,
the current regulation loop will first throttle back the boost
converter output voltage. If ILIM_MON reaches the 1.348V
threshold, the ILIM indicator is pulled low and the APD
current is actively limited. This pin cannot be allowed to
float, tie this pin to GND if unused.
MON (Pin 4): Current Monitor Output Pin. This pin sources
a current proportional to 20% of the APD current for ex-
ternal current monitoring. It is clamped to 2.25V through
an internal diode. Tie a resistor from MON to GND to set
the current monitor gain.
APD (Pin 5): Connect APD cathode to this pin. The maxi-
mum current of this pin is 7mA (typ).
MONIN (Pin 6): Power Supply for the APD and All Current
Monitors. Connect to VOUT through an external lowpass
filter for lowest noise operation.
SW (Pin 7): Switch Pin. Drain of internal power FET and
anode of internal power Schottky. Connect to switching
side of inductor. Minimize the trace length on this pin to
reduce EMI.
VOUT (Pin 8): Boost Converter Output Pin. Cathode of inter-
nal power Schottky. Connect an output voltage smoothing
capacitor from VOUT to GND.
GND (Pin 9, Exposed Pad Pin 17): Ground. Tie to the
exposed pad. The exposed pad must be soldered to a large
PCB copper area for proper functionality and heat sinking.
VIN (Pin 10): Input Supply Pin. Bypass this pin with a
capacitor to GND as close to the IC as possible.
EN/UVLO (Pin 11): Master Enable and VIN Undervoltage
Lockout. When low, the IC is put into shutdown mode and
quiescent current is reduced to <1µA. This pin contains
a 1.2V comparator with 25mV internal hysteresis and a
3µA hysteresis current source for programmable external
hysteresis. Connect to a resistor divider between VIN and
GND to program the enable/disable thresholds, or drive
with a digital signal greater than 1.5V for simple ON/OFF
control.
CTRL (Pin 12): External Reference Input. When CTRL is
lower than 1.248V, it acts as an external reference to the
FB error amp. If unused, tie CTRL to VIN.
LOS (Pin 13): Open Drain Loss of Signal Indicator. LOS
goes high when the voltage on LOS_MON is below the
voltage on LOS_ADJ. Tie this pin to desired logic high
voltage with an external pull-up resistor. The maximum
recommended sink current is 2mA to prevent excess power
dissipation. Leave this pin open if unused.
LOS_ADJ (Pin 14): External Reference Input for the Loss
of Signal Indicator. This pin feeds the negative input of
the loss of signal comparator, and provides 20mV internal
hysteresis. For additional external hysteresis, use a resistor
network between LOS and LOS_ADJ. Tie this pin to VIN
for a fixed 1.248V threshold, or if unused.
FB (Pin 15): Feedback Pin. Connect to a resistor divider
between VOUT and GND to limit the output voltage. The
internal reference for this pin is 1.248V. Pull this pin above
1.8V to disable the step-up converter and operate the Loss
of Signal monitor standalone.
fSEL (Pin 16): Frequency Selector. Tie to VIN for 2MHz
operation, or tie to GND for 1MHz operation.
LT3905
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For more information www.linear.com/LT3905
VOUT
FB
PWM
COMPARATOR
ILIM = 400mA
STBY
CTRL
MONIN
3905 F01
GND
1.348V
1.8V
EN/UVLO
SHDN
fSEL VIN SW
LOS_ADJ
LOS
ILIM
APD
ILIM_MON LOS_MON MON
+
–
–
+
–
+
1.248V
1.2V
3µA
–
+
1.248V
RC
VC
10µA
CC
–
+
+
–
+
–
+
S
OSC
CURRENT MIRROR
2.25V
UPPER
CLAMPS
1:101:20 11:5
1k
ILIM
R Q
CSA
CV EAMP
1.248V
+
–
–
1k
1k
CC EAMP
block DiagraM
Figure 1. Block Diagram
LT3905
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operaTion
applicaTions inForMaTion
Overview
The LT3905 combines a 65V current mode step-up DC/DC
converter with a combination APD current monitor and
regulator to provide accurate monitoring and efficient
supply while offering additional flexibility and protection.
The step-up converter utilizes a 65V, 0.75Ω DMOS power
switch and integrated Schottky diode to convert a low input
voltage to a higher voltage appropriate for powering the
APD. The operation of the step-up converter is a fixed fre-
quency, current mode topology with internal compensation
and accurate current limit. Operation is best understood
by referring to the Block Diagram in Figure 1.
At the start of each oscillator cycle, the SR latch is set,
which turns on the internal DMOS power switch. Current
begins to rise in the inductor and power switch, and this
switch current is sensed and added to a stabilizing ramp.
The resulting sum is fed to the positive terminal of the
PWM comparator. The level at the negative terminal of
the PWM comparator is set by the integrated error sig-
nal, VC. When the current sense signal exceeds the VC
threshold or the fixed 400mA current limit, the SR latch
is reset and the power switch turns off for the remainder
of the cycle. The stored energy in the inductor transfers
through the Schottky diode to the output capacitor, rais-
ing the output voltage.
This output voltage is externally filtered and returned to
the current monitor through the MONIN pin. The avalanche
photodiode is then biased from the APD pin, which allows
the monitor to both sense the APD current as well as to
limit it in an overload condition.
The monitor provides three currents proportional to
APD current on the MON (1:5), LOS_MON (1:10), and
ILIM_MON (1:20) pins. Resistors at these pins convert
the output currents to voltages suitable for monitoring and
regulating the APD current. In addition, the LOS_MON and
ILIM_MON have special functions used for loss-of-signal
and overload cases. These functions are described in detail
in the sections regarding these pins.
The step-up converter output is controlled through either
the FB or ILIM_MON voltages. A fixed or maximum output
voltage is programmed using the FB pin, and an adaptive
output voltage for fixed APD current is programmed using
the ILIM_MON pin.
The reference voltage for the FB pin can also be supplied
externally through the CTRL pin, for external adjustment
of output voltage.
Switching Frequency
The LT3905 allows selection between 1MHz and 2MHz
switching frequency. Tie the fSEL pin to a voltage greater
than 0.9V to select 2MHz mode, or tie to GND to select
1MHz mode.
Inrush Current
Due to the Schottky diode in the boost converter, a DC
path exists from VIN to VOUT through the power inductor.
When supply voltage is applied to the VIN pin, an inrush
current will flow through the inductor to charge the output
capacitor.
The selection of inductor and capacitor should be chosen
to keep the peak inrush current below 1A. The peak in-rush
current is estimated as follows:
Ip=VIN – 0.9
sqrt L
C–1
•e–pi
2•sqrt L
C–1
Where L is the power inductor value, and C is the output
capacitor value.
Table 1 gives inrush peak currents for some typical com-
ponent values.
LT3905
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Table 1. Inrush Peak Current
VIN (V) L (μH) C (μF) Ip (A)
3.3 10 1 0.47
3.3 22 1 0.37
5 10 1 0.81
5 22 1 0.63
Voltage Feedback
The LT3905 error amplifier is equipped with both a fixed
internal reference of 1.248V and an adjustable external
reference input (CTRL). This feature allows users to select
between using the built-in reference and an external refer-
ence voltage when programming the output voltage. It is
possible to adjust the voltage at the CTRL pin while the
device is operating, in order to alter the output voltage of
LT3905 and therefore the bias voltage of the APD.
To choose the fixed internal reference, tie the CTRL pin
to a voltage higher than 1.5V, such as the input voltage.
The FB pin is regulated to 1.248V. When the CTRL pin is
below 1.248V, the FB pin is regulated to the voltage at
the CTRL pin.
To set the output voltage, tie FB to a resistor divider between
MONIN and GND. The R2 value can be selected to provide
a minimum load to the device, to maintain a constant
switching frequency when the APD current is very low.
Preventing entry into pulse-skipping mode is an important
consideration for post-filtering the regulator output.
The value of R1 is determined using the desired output
voltage and the reference voltage, VREF. Where VREF is
either the internal or external reference voltage as defined
by the state of the CTRL pin, and R2 is the resistor value
previously selected for minimum load.
R1=R2 VMONIN
VREF
–1
applicaTions inForMaTion
Converter Standby
It is also possible to put the switching converter in standby
mode by driving FB to a voltage higher than 1.8V. In this
mode, only the internal reference and the LOS_MON cir-
cuitry remain active,
and quiescent current drops to 250μA.
Inductor Selection
The inductor used with LT3905 should have a saturation
rating of 400mA or greater. If the device is used in an
application where the input supply is hot-plugged, the
saturation current should exceed the peak inrush current.
For best loop stability, the inductance value selected should
provide a ripple current of 20% of current limit, or 80mA.
For a given VIN and VOUT, the inductor value to use in
continuous conduction mode is calculated by:
L=D•
V
IN
f•80mA
where:
D=
V
OUT
+1– V
IN
VOUT +1
and f is the switching frequency in Hz.
To force the LT3905 to operate in discontinuous conduc-
tion mode (DCM), select a smaller value inductor. The
following inequality is true when the LT3905 is operating
in discontinuous conduction mode.
L<
D•V
IN
f•400mA
Operating in DCM reduces the maximum output current
and the conversion efficiency.
Capacitor Selection
Use low ESR capacitors at the output to minimize output
voltage ripple. Use only X5R and X7R types, which retain
their capacitance over wider voltage and temperature
ranges than other types. High output voltages typically
require less capacitance for loop stability. Typically use a
1µF capacitor for output voltage less than 25V and 0.22µF
Figure 2. Output Voltage Feedback
LT3905
FB
MONIN
3905 F02
CTRL
R1
R2
LT3905
11
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For more information www.linear.com/LT3905
capacitor for output voltage beyond 25V. Place the output
capacitor as close as possible to the VOUT lead and to the
GND of the IC.
Either ceramic or solid tantalum capacitors may be used
for the input decoupling capacitor, which should be placed
as close as possible to the LT3905. A 1µF capacitor is
sufficient for most applications.
Phase Lead Capacitor
A small value capacitor (i.e., 10pF to 22pF) can be added
in parallel with the R1 resistor between the output and
the FB pin to reduce output perturbation due to a load
step and to improve transient response. This phase lead
capacitor introduces a pole-zero pair to the feedback that
boosts phase margin near the crossover frequency. The
APD is very sensitive to a noisy bias supply. To lowpass
filter noise from the internal reference and error ampli-
fier, a 0.1µF phase lead capacitor can be used. The corner
frequency of the noise filter is R1 • CPL.
Loss of Signal Monitor
The second largest output current is the LOS_MON
output, at 10% of the APD current. This is typically used
for detecting a loss of signal condition by sensing a
drop in the APD current. The LOS_MON pin is an input
to the comparator that drives the open-drain LOS pin.
This comparator uses either a fixed internal threshold of
1.248V, activated by pulling the LOS_ADJ pin to VIN, or
an adjustable external threshold, activated by driving the
LOS_ADJ pin with a voltage lower than 1.248V. In either
case, the open-drain LOS pin goes high when the voltage
on LOS_MON falls below the threshold.
To program the loss of signal monitor, set a resistor
from LOS_MON to ground such that the LOS_MON volt-
age reaches the loss of signal threshold at the point the
APD current has dropped to the desired loss of signal
threshold, IAPDLOS.
For the case of internal threshold:
RLOS _MON =
10 •1.248V
IAPDLOS
For the case of external threshold, simply replace 1.248V
in the above equation with the external threshold applied
to the LOS_ADJ pin:
RLOS _MON =
10 •V
LOS _ ADJ
IAPD
LOS
Loss of Signal Hysteresis
The LOS_MON comparator contains internal hysteresis
of typically 20mV on the rising edge of the LOS_MON
voltage. When using an external threshold, additional
external hysteresis can be generated with the addition of
the resistors R7 and R8 shown in Figure 4, where R10 is
the standard pull-up resistor for the LOS signal.
Figure 3. Phase Lead Capacitor
Figure 4. Additional LOS Hysteresis
LT3905
FB
MONIN
3905 F03
CTRL
R1 C
PL
R2
APD Current Monitor
The APD current Monitor is supplied from the MONIN
pin. It provides a current-limited power supply for the
avalanche photodiode on the APD pin, and outputs three
monitor currents proportional to the APD current on the
MON, LOS_MON, and ILIM_MON pins. Each of the moni-
tor outputs is diode-clamped to a 2.25V internal voltage.
The largest output current is the MON output, at 20% of
the APD current. This output is typically used for precise
system monitoring of the APD bias point, and is tied either
to a resistor to GND or to the input of a transimpedance
amplifier. In either case, it is important to keep the MON
voltage lower than 2.1V, as forward-biasing the internal
diode will clamp the MON voltage and compromise
accuracy.
V
IN
3905 F04
R10
LOS
LOS_ADJ
LOS ADJUST
LOS
R8
R7
LT3905
applicaTions inForMaTion
LT3905
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For this strategy, the ILIM_MON resistor is selected so
the ILIM_MON pin reaches 1.248V at the desired APD
regulation current, IAPDREG.
RILIM _ MON =
20 •1.248V
IAPD
REG
Although this loop will effectively limit the output voltage to
that which is needed to regulate the APD current, the fast
overload case must be considered as well. The regulation
of the boost converter output is comparatively slow
with respect to an APD overload condition. Additionally,
substantial energy is stored in the charged output capacitor
that should be prevented from flowing into the APD during
a condition of optical flooding. To protect against this type
of overload, the ILIM_MON pin has a fast current regula-
tor which limits the output current of the APD pin itself.
This current limiting loop has a threshold 100mV above
the 1.248V boost regulation threshold, and two actions
are taken if this threshold is reached.
First, the output current of the APD pin is limited to the
value corresponding to 1.348V on ILIM_MON. For a
shorted or optically flooded APD, the voltage at the APD
pin will drop to any level necessary to limit the current
to the programmed value. Even for the case of the APD
pin shorted to GND, the current will remain limited to the
programmed value and ILIM_MON will continue to indicate
an accurate measurement of APD current.
The second action that is taken in response to an overload
condition is assertion of the open-drain ILIM flag to indicate
the overload condition to the user. It is asserted once
the ILIM_MON voltage exceeds 1.348V and enters active
limiting, and will remain asserted until the ILIM_MON
voltage has dropped by 50mV, indicating that the device
is no longer in active limiting.
The response of the APD current limiter is shown in
Figure5. When the overload is applied, the APD voltage
drops abruptly while the output voltage decays slowly
due to the regulated current load. As the output voltage
reaches the new operating point, the ILIM indicator is
released and the boost converter begins regulating to
1.248V on ILIM_MON.
To compute the values of R7 and R8, start by setting R8
at least 10 times the value of the pull-up resistor R10.
This will prevent undue loading of the LOS signal itself.
Next, compute the total hysteresis using the voltage divider
generated by R7/R8:
VH=VIN
R7
R7+R8 +20mV
This hysteresis is composed of two parts, the hysteresis
when LOS_MON is rising (leaving loss of signal) and that
when LOS_MON is falling (entering loss of signal).
Use the formulas below with the value of external threshold
applied to LOS ADJUST to calculate the new rising and
falling thresholds of LOS_MON when using external
hysteresis. Adjust the LOS_MON resistor if necessary to
achieve a desired threshold with respect to APD current.
VLOS _ MON(FALL) =VLOS _ ADJUST
R8
R7+R8
VLOS _ MON(RISE) =VLOS _ ADJUST +20mV +
R7 •VIN – VLOS _ ADJUST
R7+R8
Current Limit Monitor
The smallest output current is the ILIM_MON output, at
5% of the APD current. This output is used for regulating
the boost converter to provide a fixed APD current, as well
as detecting and limiting of overload conditions.
When the voltage at ILIM_MON reaches the first threshold
of 1.248V, an auxiliary error amplifier limits the boost
converter output voltage. In this manner, the LT3905 can
regulate a fixed APD current with a single resistor at the
ILIM_MON pin. In this mode, use the FB function to set
a maximum output voltage limit. The FB resistor divider
should be set for an output voltage higher than the expected
output voltage required for the APD and monitor drop. The
ILIM_MON error amplifier is the dominant regulation path,
and the FB error amplifier will only take over to limit the
output voltage in the case of a disconnected APD.
applicaTions inForMaTion
LT3905
13
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For more information www.linear.com/LT3905
Figure 5. APD Current Limiter Response
applicaTions inForMaTion
Although this greatly reduces the energy dissipated in the
APD during overload, care must be taken that any bypass
capacitors directly on the APD do not cause the overload
surge to exceed recommended values.
In the case of a hard short on the APD pin, the APD pin
current is regulated and the boost converter will not switch,
but for high input voltages, the DC path from the input
through the inductor and Schottky rectifier will continue
to supply current to the shorted load. If this current is
larger than the programmed current limit, the device will
continue to regulate the output current of the APD pin,
and to assert the ILIM flag until the short on the APD pin
is removed.
APD Current Monitor Transient Response
The transient response of the APD current monitor is a
key performance characteristic. It is essentially a func-
tion of the signal levels, since the small signal bandwidth
increases with the input signal.
At greater than 10µA, the LT3905 APD current mirror
typically has several hundred nanosecond response time.
To measure such fast transient response, a wideband tran-
simpedance amplifier is implemented using the LT6210 as
shown in Figure 6. Operating in a shunt configuration, the
amplifier buffers the MON output and dramatically reduces
the effective output impedance. Note that there is an inver-
sion and DC reference offset in the final measurement.
Layout Hints
The high speed operation of the LT3905 demands care-
ful attention to board layout. You will not get advertised
performance with careless layout. To prevent radiation
Figure 8. High Frequency Path
Figure 7. Typical 10μA to 1mA Step Transient Response
and high frequency resonance problems, proper layout
of the high frequency switching path is essential. Keep
the output capacitor as close to the Schottky diode (VOUT
pin) as possible. Minimize the length and area of all traces
connected to the switch pin, and always use a ground
plane under the switching regulator to minimize interplane
coupling. The high speed switching current path is shown
in Figure8. The signal path including the switch, output
diode and output capacitor contains nanosecond rise and
fall times and should be kept as short as possible.
3905 F08
V
OUT
L1
HIGH
FREQUENCY
CIRCULATING
PATH
SW
VIN LOAD
Figure 6. Transient Response Measurement Setup
3905 F06
LT3905
APDMON
1k
4.99k
0.1µF
2V
V
H
VL
4.99k
+
–
LT6210
OUT
0.5pF
VAPD
VOUT
ILIM
ILIM_MON
1ms/DIV 3905 F05
IAPD = 10µA
tHL ~ 120ns
IAPD = 1mA
100ns/DIV 3905 G14
RESPONSE
LT3905
14
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For more information www.linear.com/LT3905
Typical applicaTions
Low Noise APD Bias with External LOS Threshold
APD Bias Ripple
LT3905
RX POWER 3905 TA03a
1:5
MON
VIN SW
CTRL
EN/UVLO
LOS_ADJ
VOUT ADJUST
LOS ADJUST
L1
10µH
1µF
fSEL
LOS
ILIM
R6
100k
R7
100k
R8 24.9k
R9
1M
VIN
2.7V TO 12V
VIN
R5
4.99k
1mV/µA
1:20
ILIM_MON
R4
12.4k
2mA LIMIT
1:10
LOS_MON
R3
1M
12.5µA LOS
OPTIONAL FOR EXTERNAL
LOS HYSTERESIS
VOUT
FB
MONIN
APD
APD
GND C2
220nF
C3
0.1µF
R1
634k
UP TO 54VOUT
R2
15k
R10
49.9Ω
C1: AVX X7R 0805YC105KAT2A
C2: AVX X7R 12061C224KAT2A
C3: AVX X7R 08051C104K4T2A
L1: COOPER SD3110-100-R
1mV/DIV
1µs/DIVVIN = 3.3V
VAPD = 40V
IAPD = 1mA
3905 TA03b
LT3905
15
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For more information www.linear.com/LT3905
Typical applicaTions
Adjustable APD Bias Supply
Output Voltage Adjustment Using CTRL
LT3905
RX POWER
3905 TA02a
1:5
MON
VIN SW
fSEL
EN/UVLO
CTRLVOUT ADJUST
L1
10µH
C1
1µF
LOS_ADJ
LOS
ILIM
R6
100k
R7
100k
VIN
2.7V TO 12V
VIN
R5
4.99k
1mV/µA
1:20
ILIM_MON
R4
9.09k
2.75mA
LIMIT
1:10
LOS_MON
R3
1M
12.5µA LOS
C1: AVX X7R 0805YC105KAT2A
C2: AVX X7R 12061C224KAT2A
L1: COOPER SD3110-100-R
VOUT
FB
MONIN
APD
APD
GND C2
220nF
R1
634k
UP TO 54V
R2
15k
CTRL (V)
0
0
VOLTAGE (V)
10
20
30
40
50
60
0.5 1 1.5 2
3905 TA02b
VIN = 3.3V
IAPD = 1mA
APD
MONIN
LT3905
16
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For more information www.linear.com/LT3905
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.45 ±0.05
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.45 ± 0.10
(4-SIDES)
0.75 ±0.05 R = 0.115
TYP
0.25 ±0.05
1
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
15 16
2
0.50 BSC
0.200 REF
2.10 ±0.05
3.50
±0.05
0.70 ±0.05
0.00 – 0.05
(UD16) QFN 0904
0.25 ±0.05
0.50 BSC
PACKAGE OUTLINE
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)
LT3905
17
3905fa
For more information www.linear.com/LT3905
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 08/14 Clarified Description
Clarified Block Diagram
Clarified Applications Information
Clarified APD Voltage Adjustment graph
1
8
12
15
LT3905
18
3905fa
For more information www.linear.com/LT3905
LINEAR TECHNOLOGY CORPORATION 2013
LT 0814 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3905
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT3482 0.3A (ISW), 650kHz/1.1MHz Step-Up DC/DC Converter
with APD Current Monitor
VIN: 2.5V to 16V, VOUT1(MAX) = 48V, VOUT2(MAX) = 90V, IQ = 3.3mA, ISD < 1µA,
3mm × 3mm QFN Package
LT3571 0.37A (ISW), 75V DC/DC Converter for APD Bias VIN: 2.7V to 20V, VOUT(MAX) = 75V, IQ = 1.7mA, ISD < 1µA, 3mm × 3mm QFN
Package
Wide Output Range Constant Current APD Driver
L1
10µH
C1
1µF
R7
100k
R6
100k
VIN
3.3V
VIN LT3905
3905 TA04a
1:5
MON
1:20
ILIM_MON
R4
4.99k
1mA OUT
1:10
LOS_MON
R3
49.9k
250µA
LOS
R5
3.1k
R8
49.9Ω
VOUT
FB
MONIN
APD
1mA APD
GND C2
220nF
C4
3.3nF
C3
0.1µF
R1
732k
UP TO 62V
R2
15k
VIN SW
CTRL
EN/UVLO
LOS_ADJ
fSEL
LOS
ILIM
C1: AVX X7R 0805YC105KAT2A
C2: AVX X7R 12061C224KAT2A
C3: AVX X7R 08051C104K4T2A
C4: AVX X7R 0603YC332KAT2A
L1: COOPER SD3110-100-R
VAPD (V)
10
APD CURRENT (mA)
1.000
1.025
50
3905 TA04b
0.975
0.950 20 30 40 60
1.050
APD Current Regulation vs VAPD