SY100EP15VK4CTR - Micrel Semiconductor, Inc.

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

The SY100EP15V is a high-speed, low-skew, PECL/ECL

1:4 precision fanout buffer with a 2:1 mux front end in a

small 16-pin TSSOP package. The 2:1 mux input accepts a

single-ended PECL/ECL source (CLK1) and a differential

PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP

PECL/ECL logic compatible.

AC performance is guaranteed over the industrial –40°C

to +85°C temperature range and 3.3V to 5V supply voltage.

This device will operate in PECL/LVPECL or ECL/LVECL

mode. For clock applications, the high-speed design

combined with an extremely fast rise/fall time of less than

225ps produces a toggle frequency as high as 2.5GHz

(~400mVPP swing).

A VBB output reference pin is available for AC–coupled

and single-ended input applications. In addition, a

synchronous output enable function is provided.

The SY100EP15V is part of Micrel’s high-speed, precision

edge timing and distribution family. For applications that

require a different I/O combination, consult Micrel's website

at www.micrel.com, and choose from a comprehensive

product line of high-speed, low-skew fanout buffers,

translators, and clock dividers.

All support documentation can be found on Micrel’s web

site at: www.micrel.com.

FEATURES

DESCRIPTION

Rev.: E Amendment: /0

Issue Date: December 2005

ECL Pro™

SY100EP15V

■High-speed 1:4 PECL/ECL fanout buffer

■2:1 multiplexer input

■Guaranteed AC parameters over temp/voltage:

• > 2.5GHz fMAX (toggle)

• < 225ps rise/fall times

• < 25ps within device skew

• < 425ps propagation delay (CLK-to-Q)

■Low jitter design:

• < 1psRMS cycle-to-cycle jitter

• < 20psPP total jitter

■Flexible power supply: 3.3V/5V

■Wide operating temperature range: –40°C to +85°C

■VBB reference for AC-coupled or single-ended

applications

■Output enable/disable function

■100K PECL/ECL compatible logic

■Input accepts PECL/LVPECL/ECL/HSTL logic levels

■Available in a 16-pin TSSOP package

3.3V/5V 2.5GHz PECL/ECL

1:4 FANOUT BUFFER

WITH 2:1 INPUT MUX

ECL Pro™

ECL Pro is a trademark of Micrel, Inc.

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

PACKAGE/ORDERING INFORMATION

Ordering Information(1)

Package Operating Package Lead

Part Number Type Range Marking Finish

SY100EP15VK4C K4-16-1 Commercial XEP15V Sn-Pb

SY100EP15VK4CTR(2) K4-16-1 Commercial XEP15V Sn-Pb

SY100EP15VK4I K4-16-1 Industrial XEP15V Sn-Pb

SY100EP15VK4ITR(2) K4-16-1 Industrial XEP15V Sn-Pb

SY100EP15VK4G(3) K4-16-1 Industrial XEP15V with NiPdAu

Pb-Free bar-line Indicator Pb-Free

SY100EP15VK4GTR(2, 3) K4-16-1 Industrial XEP15V with NiPdAu

Pb-Free bar-line Indicator Pb-Free

Notes:

1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.

2. Tape and Reel.

3. Pb-Free package is recommended for new designs.

Available in 16-Pin TSSOP

(K4-16-1)

/Q0

/Q1

/Q2

/Q3

16 VCC

/EN

CLK1

VBB

/CLK0

CLK0

SEL

VEE

215

314

413

512

611

710

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

TRUTH TABLE(1)

CLK0 CLK1 SEL /EN Q

LX LLL

HX L LH

XL HLL

XH HLH

XLHL

XHHL

PIN DESCRIPTION

Pin Pin Number Function

1, 2, 3, 4 Q0 – Q3 Outputs 0 through 3: 100KEP (LV)PECL/(LV)ECL compatible differential outputs. Terminate

5, 6, 7, 8 /Q0 – /Q3 with 50Ω to VCC–2V. Unused output pairs may be left floating, or pulled-down with a 2kΩ

resistor to the most negative supply. Unused single-ended outputs must have a balanced load.

For AC-coupled applications, the output stage emitter follower must have a DC current path to

ground. See “Termination” section.

9 VEE Negative Power Supply: For PECL/LVPECL applications, connect to GND.

10 SEL 100KEP (LV)PECL/(LV)ECL Compatible 2:1 Mux Input Select Control. See “Truth Table.” The

select (SEL) pin includes an internal 75kΩ pull-down resistor. Default condition when left floating

is LOW, and CLK0 input is selected.

11, 12 CLK0, /CLK0 Differential (LV)PECL/(LV)ECL/HSTL Compatible Input: The inputs include an internal 75kΩ

pull-down resistor on CLK0 and internal 75kΩ pull-up and pull-down on /CLK0. Default condition

for CLK0 is LOW when left floating and VCC/2 for /CLK0 when left floating.

13 VBB Reference Output Voltage: This reference is typically used to bias the unused inverting input for

single-ended input applications, or as the termination point for AC-coupled differential input

applications. VBB reference value is approximately VCC–1.3V, and tracks Vcc 1:1. Maximum

sink/source capability for VBB is 0.50mA. For single ended inputs, connect to the unused input

through a 50Ω resistor. Decouple the VBB pin with a 0.01µF capacitor to VCC.

14 CLK1 Single-Ended (LV)PECL/(LV)ECL Compatible Input: This pin includes an internal 75kΩ

pull-down resistor. Default condition is LOW when left floating.

15 /EN 100KEP (LV)PECL/(LV)ECL Compatible Input: This synchronous pin controls the output state.

See “Truth Table.” To ensure proper synchronous operation, adhere to the Set-up and Hold

times, as described in the AC electrical table. When /EN pin goes HIGH, Q outputs go LOW, and

/Q outputs go HIGH on the next falling clock transition. This synchronous operation avoids any

chance of generating a runt pulse.

16 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors.

Note:

1. = Negative edge.

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

Symbol Rating Value Unit

VCC –V

EE Power Supply Voltage 6.0 V

VIN Input Voltage (VCC = 0V, VIN not more negative than VEE) –6.0 to 0 V

Input Voltage (VEE = 0V, VIN not more positive than VCC) +6.0 to 0

IOUT Output Current –Continuous 50 mA

–Surge 100

IBB VBB Sink/Source Current(2) ±0.5 mA

TLEAD Lead Temperature (soldering, 20sec.) +260 °C

TAOperating Temperature Range –40 to +85 °C

TSTORE Storage Temperature Range –65 to +150 °C

θJA Package Thermal Resistance –Still-Air (single-layer PCB) 115

(Junction-to-Ambient) –Still-Air (multi-layer PCB) 75 °C/W

–500lfpm (multi-layer PCB) 65

θJC Package Thermal Resistance 21 °C/W

(Junction-to-Case)

Notes:

1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied

at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended

periods may affect device reliability.

2. Due to the limited drive capability, use for inputs of same package only.

ABSOLUTE MAXIMUM RATINGS(1)

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

VCC Power Supply Voltage V

(PECL) 4.5 5.0 5.5 4.5 5.0 5.5 4.5 5.0 5.5

(LVPECL) 2.97 3.3 3.63 2.97 3.3 3.63 2.97 3.3 3.63

(ECL) –5.5 –5.0 –4.5 –5.5 –5.0 –4.5 –5.5 –5.0 –4.5

(LVECL) –3.63 –3.3 –2.97 –3.63 –3.3 –2.97 –3.63 –3.3 –2.97

ICC Power Supply Current — — 70 — 52 72 — — 75 mA

IIH Input HIGH Current — — 150 — — 150 — — 150 µAV

IN = VIH

IIL Input LOW Current

CLK0, CLK1 0.5 — — 0.5 — — 0.5 — — µAV

IN = VIL

/CLK0 –150 — — –150 — — –150 — — µAV

IN = VIL

CIN Input Capacitance (TSSOP) ————1.0————pF

Note:

1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.

DC ELECTRICAL CHARACTERISTICS(1)

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

VIL Input LOW Voltage 1355 — 1675 1355 — 1675 1355 — 1675 mV VCC = 3.3V

(Single-Ended)

VIH Input HIGH Voltage 2075 — 2420 2075 — 2420 2075 — 2420 mV VCC = 3.3V

(Single-Ended)

VOL Output LOW Voltage 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV VCC = 3.3V

VOH Output HIGH Voltage 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VCC = 3.3V

VBB Reference Voltage(2) 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV VCC = 3.3V

VIHCMR Input HIGH Voltage 1.2 — VCC 1.2 — VCC 1.2 — VCC V

Common Mode Range(3)

Notes:

1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters varies 1:1

with VCC. Output load is 50Ω to VCC–2V.

2. VBB varies 1:1 with VCC.

3. The VIHCMR range is referenced to the most positive side of the differential input signal.

(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)

VCC = 3.0V ±10%, VEE = 0V

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

VIL Input LOW Voltage 3055 — 3375 3055 — 3375 3055 — 3375 mV VCC = 5V

(Single-Ended)

VIH Input HIGH Voltage 3775 — 4120 3775 — 4120 3775 — 4120 mV VCC = 5V

(Single-Ended)

VOL Output LOW Voltage 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV VCC = 5V

VOH Output HIGH Voltage 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV VCC = 5V

VBB Output Voltage Reference(2) 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV VCC = 5V

VIHCMR Input HIGH Voltage(3) 1.2 — VCC 1.2 — VCC 1.2 — VCC V

Common Mode Range

Notes:

1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters varies 1:1

with VCC. Output load is 50Ω to VCC–2V.

2. VBB varies 1:1 with VCC.

3. The VIHCMR range is referenced to the most positive side of the differential input signal.

(100KEP) PECL DC ELECTRICAL CHARACTERISTICS(1)

VCC = 5.0V ±10%, VEE = 0V

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

VIL Input LOW Voltage –1945 — –1625 –1945 — –1625 –1945 — –1625 mV

(Single-ended)

VIH Input HIGH Voltage –1165 — –880 –1165 — –880 –1165 — –880 mV

(Single-ended)

VOL Output LOW Voltage –1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695 mV

50Ω to V

–2V

VOH Output HIGH Voltage –1145 –1020 –895 –1145 –1020 –895 –1145 –1020 –895 mV

50Ω to V

–2V

VBB Output Reference Voltage –1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325 mV

VIHCMR Input HIGH Voltage

+1.2

— 0.0

+1.2

— 0.0

+1.2

— 0.0 V

Common Mode Range(2)

Notes:

1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.

2. The VIHCMR range is referenced to the most positive side of the differential input signal.

(100KEP) LVECL DC ELECTRICAL CHARACTERISTICS(1)

VCC = 0V, VEE = –2.97V to –3.63V

(100K) ECL DC ELECTRICAL CHARACTERISTICS(1)

VCC = 0V, VEE = –4.5V to –5.5V

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

VIL Input LOW Voltage –1945 — –1625 –1945 — –1625 –1945 — –1625 mV

VIH Input HIGH Voltage –1225 — –880 –1225 — –880 –1225 — –880 mV

VOL Output LOW Voltage –1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695 mV

50Ω to V

–2V

VOH Output HIGH Voltage –1145 –1020 –895 –1145 –1020 –895 –1145 –1020 –895 mV

50Ω to V

–2V

VBB Output Reference Voltage –1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325 mV

VIHCMR Input HIGH Voltage

+1.2

— 0.0

+1.2

— 0.0

+1.2

— 0.0 V

Common Mode Range(2)

Notes:

1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.

2. The VIHCMR range is referenced to the most positive side of the differential input signal.

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit

VIH Input HIGH Voltage 1200 — — 1200 — — 1200 — — mV

VIL Input LOW Voltage — — 400 — — 400 — — 400 mV

HSTL INPUT DC ELECTRICAL CHARACTERISTICS

VCC = 2.97V to 3.63V, VEE = 0V

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

TA = –40°CT

A = +25°CT

A = +85°C

Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit

fMAX(1) Maximum Frequency 2.5 — — 2.5 — — 2.5 — — GHz

tPD PropagationDelay to Output

PECL/ECL

Diff. IN-to-Q 275 — 425 275 375 425 275 — 425 ps

IN (Single-Ended)-to-Q 250 — 450 250 400 450 250 — 450 ps

SEL-to-Q 250 — 450 250 400 450 250 — 450 ps

LVPECL/LVECL

Diff. IN-to-Q 275 — 425 275 375 425 275 — 425 ps

IN (Single-Ended)-to-Q 250 — 450 250 400 450 250 — 450 ps

SEL-to-Q 250 — 450 250 400 450 250 — 450 ps

tSKEW(2) Within-Device Skew (Diff.) — — 25 — 15 25 — — 25 ps

Part-to-Part Skew (Diff.) — — 150 — 100 150 — — 150 ps

tS(3) Set-Up Time /EN to CLK 100 0 — 100 0 — 100 0 — ps

tH(3) Hold Time /EN to CLK 200 50 — 200 50 — 200 50 — ps

tJITTER Cycle-to-Cycle Jitter(4) — 0.2 1 — 0.2 1 — 0.2 1 psRMS

Total Jitter (622MHz clock)(5) — <20 — — <20 — — <20 — psPP

VID Input Voltage Range 150 800 1200 150 800 1200 150 800 1200 mV

tr, tfOutput Rise/Fall Times 75 — 225 75 130 225 85 — 225 ps

(20% to 80%)

Notes:

1. fMAX is defined as the maximum toggle frequency. Measured with 750mV input signal, 50% duty cycle, output swing ≥ 400mV(diff), all loading with

50Ω to VCC–2V.

2. Skew is measured between outputs under identical transitions.

3. Set-up and hold times apply to synchronous applications that intend to enable/disable before then ext clock cycle. For asynchronous applications,

set-up and hold time does not apply.

4. Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC =T

n–Tn+1

where T is the time between rising edges of the output signal.

5. Total jitter definition: with an ideal clock input applied to one channel of the MUX, no more than one output edge in 1012 output edges will deviate by

more than the specified peak-to-peak jitter value.

AC ELECTRICAL CHARACTERISTICS

LVPECL: VCC = 2.97V to 3.63V, VEE = 0V; PECL: VCC = 4.5V to 5.5V, VEE = 0V

ECL: VCC = 0V, VEE = –4.5V to –5.5V; LVECL: VCC = 0V, VEE = –2.97V to –3.63V

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

TERMINATION RECOMMENDATIONS

82Ω

= 50Ω

+3.3V +3.3V

= V

–2V

130Ω

+3.3V

Figure 1. Parallel Termination–Thevenin Equivalent

Notes:

1. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω.

2. For +5.0V systems: R1 = 82Ω, R2 = 130Ω.

= 50Ω

50Ω50Ω

50Ω

+3.3V +3.3V

“source” “destination”

(Optional)

0.01µF

Figure 2. Three-Resistor “Y–Termination”

Notes:

1. Power-saving alternative to Thevenin termination.

2. Place termination resistors as close to destination inputs as possible.

3. Rb resistor sets the DC bias voltage, equal to VT. For +3.3V systems Rb = 46Ω to 50Ω. For +5V systems, Rb = 110Ω.

4. C1 is an optional bypass capacitor intended to compensate for any tr/tf mismatches.

+3.3V +3.3V

50Ω

= 50Ω

0.01µF

82Ω

+3.3V +3.3V

130Ω

82Ω

= V

–2V

+3.3V

Figure 3. Terminating Unused I/O

Notes

1. Unused output (/Q) must be terminated to balance the output.

2. Micrel’s differential I/O logic devices include a VBB reference pin .

3. Connect unused input through 50Ω to VBB. Bypass with a 0.01µF capacitor to VCC, not GND.

4. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω.

ECL Pro™

SY100EP15V

Micrel, Inc.

M9999-120505

hbwhelp@micrel.com or (408) 955-1690

16-PIN TSSOP (K4-16-1)

Rev. 01

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com

The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.

Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into

the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s

use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify

Micrel for any damages resulting from such use or sale.