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March 2016
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
www.fairchildsemi.com
1
FDB0300N1007L N-Channel PowerTrench® MOSFET
D(Pin4, tab)
G
S(Pin2,3,5,6,7)
(Pin1)
123
4
567
1. Gate
2. Source/Kelvin Sense
3. Source/Kelvin Sense
4. Drain
5. Source
6. Source
7. Source
D2-PAK
(TO263)
FDB0300N1007L
N-Channel PowerTrench® MOSFET
100 V, 200 A, 3 mΩ
Features
Max rDS(on) = 3 mΩ at VGS = 10 V, ID = 26 A
Max rDS(on) = 4.5 mΩ at VGS = 6 V, ID = 20 A
Fast Switching Speed
Low Gate Charge
High Performance Trench Technology for Extremely Low
RDS(on)
High Power and Current Handling Capability
RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advance PowerTrench® process that has
been especially tailored to minimize the on-state resistance
while maintaining superior ruggedness and switching
performance for industrial applications.
Applications
Industrial Motor Drive
Industrial Power Supply
Industrial Automation
Battery Operated tools
Battery Protection
Solar Inverters
UPS and Energy Inverters
Energy Storage
Load Switch
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted.
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 100 V
VGS Gate to Source Voltage ±20 V
ID
Drain Current -Continuous TC = 25°C (Note 5) 200
A -Continuous TC = 100°C (Note 5) 140
-Pulsed (Note 4) 1090
EAS Single Pulse Avalanche Energy (Note 3) 843 mJ
PD
Power Dissipation TC = 25°C 250 W
Power Dissipation TA = 25°C (Note 1a) 3.8
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +175 °C
RθJC Thermal Resistance, Junction to Case (Note 1) 0.6 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 40
Device Marking Device Package Reel Size Tape Width Quantity
FDB0300N1007L FDB0300N1007L D2-PAK-7L 330 mm 24 mm 800 units
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2
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
FDB0300N1007L N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Off Characteristics
On Characteristics (Note 2)
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 57 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA22.74V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA, referenced to 25 °C -12 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 26 A 2.4 3
mΩVGS = 6 V, ID = 20 A 3.4 4.5
VGS = 10 V, ID = 26 A, TJ = 150°C 4.9 11
gFS Forward Transconductance VDS = 10 V, ID = 26 A 85 S
Ciss Input Capacitance VDS = 50 V, VGS = 0 V,
f = 1 MHz
5925 8295 pF
Coss Output Capacitance 1220 1710 pF
Crss Reverse Transfer Capacitance 42 60 pF
RgGate Resistance 2.7 Ω
td(on) Turn-On Delay Time
VDD = 50 V, ID = 26 A,
VGS = 10 V, RGEN = 6 Ω
28 45 ns
trRise Time 29 46 ns
td(off) Turn-Off Delay Time 52 83 ns
tfFall Time 18 32 ns
QgTotal Gate Charge VGS = 0 V to 10 V
VDD = 50 V,
ID = 26 A
81 113 nC
QgTotal Gate Charge VGS = 0 V to 5 V 44 62
Qgs Gate to Source Gate Charge 24 nC
Qgd Gate to Drain “Miller” Charge 16 nC
ISMaximum Continuous Drain to Source Diode Forward Current 200 A
ISM Maximum Pulsed Drain to Source Diode Forward Current 1090 A
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 26 A (Note 2) 0.8 1.2 V
trr Reverse Recovery Time IF = 26 A, di/dt = 100 A/μs 84 134 ns
Qrr Reverse Recovery Charge 128 205 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 40 °C/W when mounted on a 1 in2 pad of 2 oz copper.
b) 62.5 °C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. EAS of 843 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 75 A, VDD = 90 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 108 A.
4. Pulsed Id please refer to Figure “Forward Bias Safe Operating Area” for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
www.fairchildsemi.com
3
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
FDB0300N1007L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
Figure 1.
0123
0
100
200
300
VGS = 6 V
VGS = 7 V
VGS = 8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 6.5 V
VGS = 10 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 100 200 300
0
1
2
3
VGS = 6.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 8 V
VGS = 6 V
VGS = 7 V
N o r m a l i z e d O n - R e s i s t a n c e
vs. Drain Current and Gate Voltage
F i g u r e 3 . N o r m a l i z e d O n R e s i s t a n c e
-75 -50 -25 0 25 50 75 100 125 150 175
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
ID = 26 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs. Junction Temperature
Figure 4.
45678910
0
5
10
15
20
TJ = 150 oC
ID = 26 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
O n- Re si st an ce vs . Ga t e to
Source Voltage
Figure 5. Transfer Characteristics
234567
0
100
200
300
TJ = 175 oC
VDS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.00.20.40.60.81.01.2
0.001
0.01
0.1
1
10
100
300
TJ = -55 oC
TJ = 25 oC
TJ = 175 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
S ou rc e t o D ra in D i o de
Forward Voltage vs. Source Current
www.fairchildsemi.com
4
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
FDB0300N1007L N-Channel PowerTrench® MOSFET
Figure 7.
0 20406080100
0
2
4
6
8
10
ID = 26 A
VDD = 75 V
VDD = 25 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 50 V
Gate Charge Characteristics Figure 8.
0.1 1 10 100
10
100
1000
10000
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
C a p a c i t a n c e v s . D r a i n
to Source Voltage
F i g u r e 9 . U n c l a m p e d I n d u c t i v e
Switching Capability
0.001 0.01 0.1 1 10 100 1000
1
10
100
1000
TJ = 25 oC
TJ = 150 oC
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
Figure 10.
0.1 1 10 100 1000
0.1
1
10
100
1000
2000
10 μs
CURVE BENT TO
MEASURED DATA
100 μs
10 ms
100 ms/DC
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJC = 0.6 oC/W
TC = 25 oC
Forward B i a s Safe
Operating Area
Figure 11.
10-5 10-4 10-3 10-2 10-1 1
102
103
104
105
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJC = 0.6 oC/W
TC = 25 oC
t, PULSE WIDTH (sec)
Single Pulse Maximum Power Dissipation
Typical Characteristics TJ = 25 °C unless otherwise noted.
www.fairchildsemi.com
5
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
FDB0300N1007L N-Channel PowerTrench® MOSFET
Figure 12.
10-5 10-4 10-3 10-2 10-1 1
0.001
0.01
0.1
1
2
SINGLE PULSE
DUTY CYCLE-DESCENDING ORDER
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 0.6 oC/W
Duty Cycle, D = t1 / t2
Peak TJ = PDM x ZθJC(t) + TC
PDM
t1
t2
Junction-to-Case Transient Thermal Response Curve
Typical Characteristics TJ = 25 °C unless otherwise noted.
0.95
3.45
10.50
8.40
(
1.27
) 6X
10.20
7.62
1.40
1.20
4.70
4.30
C
15.70
15.10
0.60
0.40
A
B
7.70
MIN
8.78
8.38
10.20
9.70
9.40
9.00
1.40
1.00
1.40
MAX
C
0.90
0.70
0.70
0.50
C
1.27
6X
7.62
0.73
0.25
A
M
A
5.20
4.80
0.254
C
2.84
2.44
0.20
MAX
0
-
8°
GAGE PLANE
SEATING PLANE
R0.50
0.20
B
NOTES:
A. PACKAGE CONFORMS TO JEDEC TO-263
VARIATION CB EXCEPT WHERE NOTED.
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C
OUT OF JEDEC STANDARD VALUE.
D. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
E. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
F. LAND PATTERN RECOMMENDATION PER IPC.
TO127P1524X465-8N.
G. DRAWING FILE NAME: TO263A07REV5.
LAND PATTERN RECOMMENDATION
17
1
7
8
DETAIL A
SCALE 2:1
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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