MMSD301T1-D - ON Semiconductor

SOD-123 Schottky

Barrier Diodes

The MMSD301T1, and MMSD701T1 devices are spin–offs of our

popular MMBD301LT1, and MMBD701LT1 SOT–23 devices. They

are designed for high–efficiency UHF and VHF detector applications.

Readily available to many other fast switching RF and digital

applications.

•Extremely Low Minority Carrier Lifetime

•Very Low Capacitance

•Low Reverse Leakage

MAXIMUM RATINGS

Rating Symbol Value Unit

Reverse Voltage MMSD301T1

MMSD701T1 VR30

70 Vdc

Forward Power Dissipation

TA = 25°CPF225 mW

Junction Temperature TJ–55 to +125 °C

Storage Temperature Range Tstg –55 to +150 °C

DEVICE MARKING

MMSD301T1 = XT, MMSD701T1 = XH

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

Reverse Breakdown Voltage

(IR = 10 µA) MMSD301T1

MMSD701T1

V(BR)R 30

70 —

——

—

Volts

Diode Capacitance

(VR = 0, f = 1.0 MHz, Note 1) MMSD301T1

MMSD701T1

CT—

—0.9

0.5 1.5

1.0

Total Capacitance

(VR = 15 Volts, f = 1.0 MHz) MMSD301T1

(VR = 20 Volts, f = 1.0 MHz) MMSD701T1

CT—

—0.9

0.5 1.5

1.0

Reverse Leakage

(VR = 25 V) MMSD301T1

(VR = 35 V) MMSD701T1

IR—

—13

9.0 200

200 nAdc

nAdc

Forward Voltage

(IF = 1.0 mAdc) MMSD301T1

(IF = 10 mA)

(IF = 1.0 mAdc) MMSD701T1

(IF = 10 mA)

VF—

—

0.38

0.52

0.42

0.7

0.45

0.6

0.5

1.0

Vdc

Preferred devices are ON Semiconductor recommended choices for future use and best overall value.

ON Semiconductor

 Semiconductor Components Industries, LLC, 2001

September, 2001 – Rev. 2 1Publication Order Number:

MMSD301T1/D

MMSD301T1

MMSD701T1

CASE 425–04, STYLE 1

SOD–123

ON Semiconductor Preferred Devices

Cathode

Anode

MMSD301T1 MMSD701T1

http://onsemi.com

TYPICAL CHARACTERISTICS

MMSD301T1

VR, REVERSE VOLTAGE (VOLTS)

Figure 1. Total Capacitance

IF, FORWARD CURRENT (mA)

Figure 2. Minority Carrier Lifetime

VR, REVERSE VOLTAGE (VOLTS)

Figure 3. Reverse Leakage

VF, FORWARD VOLTAGE (VOLTS)

Figure 4. Forward Voltage

KRAKAUER METHOD

f = 1.0 MHz

, FORWARD CURRENT (mA)IF

, REVERSE LEAKAGE ( A)IR

0.2 0.4 0.6 0.8 1.0 1.20 6.0 12 18 24

1.0

0.1

0.01

0.001

0204060

500

80 1000 3.0 6.0 9.0 12 15 21

2.8

3024 2718

2.4

2.0

1.6

1.2

0.8

100

1.0

0.1

10 30 50 70 90

400

300

200

100

0.4

, MINORITY CARRIER LIFETIME (ps)

, TOTAL CAPACITANCE (pF)CT

TA = -40°C

TA = 85°C

TA = 25°C

TA = 100°C

TA = 75°C

TA = 25°C

MMSD301T1

MMSD301T1 MMSD701T1

http://onsemi.com

TYPICAL CHARACTERISTICS

MMSD701T1

Figure 5. Total Capacitance Figure 6. Minority Carrier Lifetime

Figure 7. Reverse Leakage Figure 8. Forward Voltage

VR, REVERSE VOLTAGE (VOLTS) IF, FORWARD CURRENT (mA)

VR, REVERSE VOLTAGE (VOLTS) VF, FORWARD VOLTAGE (VOLTS)

KRAKAUER METHOD

f = 1.0 MHz

, FORWARD CURRENT (mA)IF

, REVERSE LEAKAGE ( A)IR

0.2 0.4 0.8 1.2 1.6 2.0

0 10203040

1.0

0.1

0.01

0.001

0204060

500

80 1000 5.0 10 15 20 25 35 5040 4530

2.0

1.6

1.2

0.8

100

1.0

0.1

10 30 50 70 90

400

300

200

100

0.4

, MINORITY CARRIER LIFETIME (ps)

, TOTAL CAPACITANCE (pF)CT

TA = -40°C

TA = 85°C

TA = 25°C

TA = 100°C

TA = 75°C

TA = 25°C

MMSD701T1

MMSD301T1 MMSD701T1

http://onsemi.com

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values

into the equation for an ambient temperature TA of 25°C,

one can calculate the power dissipation of the device which

in this case is 225 milliwatts.

INFORMATION FOR USING THE SOD–123 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the

total design. The footprint for the semiconductor packages

must be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SOD–123 POWER DISSIPATION

PD = TJ(max) – TA

RθJA

PD = 150°C – 25°C

556°C/W = 225 milliwatts

The power dissipation of the SOD–123 is a function of

the pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power dissipa-

tion. Power dissipation for a surface mount device is deter-

mined b y T J(max), the maximum rated junction temperature

of the die, RθJA, the thermal resistance from the device

junction to ambient, and the operating temperature, TA.

Using the values provided on the data sheet for the

SOD–123 package, PD can be calculated as follows:

The 556°C/W for the SOD–123 package assumes the use

of the recommended footprint on a glass epoxy printed

circuit board to achieve a power dissipation of 225 milli-

watts. There are other alternatives to achieving higher

power dissipation from the SOD–123 package. Another

alternative would be to use a ceramic substrate or an

aluminum core board such as Thermal Clad. Using a

board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the

rated temperature of the device. When the entire device is

heated to a high temperature, failure to complete soldering

within a short time could result in device failure. There-

fore, the following items should always be observed in

order to minimize the thermal stress to which the devices

are subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference shall be a maximum of 10°C.

•The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied

during cooling.

* Soldering a device without preheating can cause exces-

sive thermal shock and stress which can result in damage

to the device.

SOD–123

ÉÉÉ

inches

0.91

0.036

1.22

0.048

2.36

0.093

4.19

0.165

MMSD301T1 MMSD701T1

http://onsemi.com

PACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

STYLE 1:

PIN 1. CATHODE

2. ANODE

ÂÂÂ

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.055 0.071 1.40 1.80

B0.100 0.112 2.55 2.85

C0.037 0.053 0.95 1.35

D0.020 0.028 0.50 0.70

E0.01 --- 0.25 ---

H0.000 0.004 0.00 0.10

J--- 0.006 --- 0.15

K0.140 0.152 3.55 3.85

CASE 425–04

ISSUE C

SOD–123

MMSD301T1 MMSD701T1

http://onsemi.com

Notes

MMSD301T1 MMSD701T1

http://onsemi.com

Notes

MMSD301T1 MMSD701T1

http://onsemi.com

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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

MMSD301T1/D

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