AN-763
APPLICATION NOTE
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Dual Universal Precision Op Amp Evaluation Board
Rev. C | Page 1 of 8
INTRODUCTION
The EVAL-PRAOPAMP-2RZ, EVAL-PRAOPAMP-2RMZ, and
EVAL-PRAOPAMP-2CPZ are universal precision evaluation
boards that accommodate dual op amps in 8-pin SOIC,
MSOP, and LFCSP packages, respectively. For the exposed pad
connection for the LFCSP package, see the appropriate product
data sheet.
These PRAOPAMP evaluation boards provide multiple choices
and extensive flexibility for different application circuits and
configurations.
These boards are not intended to be used with high frequency
components or high speed amplifiers. However, they provide
the user with many combinations for various circuit types,
including active filters, instrumentation amplifiers, composite
amplifiers, and external frequency compensation circuits.
Several examples of application circuits are provided in this
application note.
TWO STAGE BAND-PASS FILTER
4
V–
V1 R1
20kΩ
+
–V+
8
7
1/2 ADA4077- 2
6
5
C2
10nF C1
10nF
R2
10kΩ
4
V–
C4
330pF V+
8
1
1/2 ADA4077- 2
2
3
C3
680pF
R3
33kΩR4
33kΩVOUT
05284-001
Figure 1. KRC Filter
The low offset voltage and high CMRR makes the ADA4077-2
a great choice for precision filters, such as the KRC filter shown
in Figure 1.
This particular filter implementation offers the flexibility to
tune the gain and the cut-off frequency independently.
Since the common-mode voltage into the amplifier varies
with the input signal in the KRC filter circuit, a high CMRR
amplifier, such as the ADA4077-2, is required to minimize
distortion. Furthermore, the low offset voltage of the ADA4077-2
allows a wider dynamic range when the circuit gain is chosen to
be high.
The circuit shown in Figure 1 consists of two stages. The first
stage is a simple high-pass filter with a corner frequency, fC, of
C1C2R1R2
π
2
1
(1)
and
R2
R1
K
Q=
(2)
where K is the dc gain.
Choosing equal capacitor values minimizes the sensitivity and
simplifies the expression for fC to
R1R2C
π
2
1
(3)
The value of Q determines the peaking of the gain vs. frequency
(generally ringing in the time domain). Commonly chosen
values for Q are near unity.
Setting Q = 1/√2 yields minimum gain peaking and minimum
ringing. Use Equation 3 to determine the values for R1 and R2.
For example, set Q = 1/√2 and R1/R2 = 2 in the circuit example,
and pick R1 = 5 kΩ and R2 = 10 kΩ for simplicity. The second
stage is a low-pass filter whose corner frequency can be deter-
mined in a similar fashion.
R3 = R4 = R
C3C4R
fC×
=
π
2
1
and
C4
C3
Q2/1
=
AN-763 Application Note
Rev. C | Page 2 of 8
TABLE OF CONTENTS
Introduction ...................................................................................... 1
Two Stage Band-Pass Filter ............................................................. 1
Revision History ............................................................................... 2
Half Wave, Full Wave Rectifier ....................................................... 3
High Gain Composite Amplifier .....................................................3
External Compensation Techniques ...............................................4
Snubber Network ...............................................................................5
REVISION HISTORY
10/13—Rev. B to Rev. C
Updated Format .................................................................. Universal
Replaced All Figures ......................................................................... 1
Changed EVAL-PRAOPAMP-2R/2RU/2RM to EVA L-
PRAOPAMP-2RZ, EVAL-PRAOPAMP-2RMZ, and EVAL-
PRAOPAMP-2CPZ Throughout .................................................... 1
Deleted Authors Names and added Introduction Section
Heading .............................................................................................. 1
Changes to Two Stage Band-Pass Filter Section ........................... 1
Changes to Half Wave, Full Wave Rectifier Section ..................... 3
Changes to High Gain Composite Amplifier Sections ................ 3
Application Note AN-763
Rev. C | Page 3 of 8
HALF WAVE, FULL WAVE RECTIFIER
Rectifying circuits are used in a multitude of applications. One
of the most popular uses is in the design of regulated power
supplies where a rectifier circuit is used to convert an input
sinusoid to a unipolar output voltage. There are some potential
problems for amplifiers used in this manner.
When the input voltage VIN is negative, the output is zero.
When the magnitude of VIN is doubled at the input of the op
amp, this voltage could exceed the power supply voltage which
would damage the amplifiers permanently. The op amp must
come out of saturation when VIN is negative. This delays the
output signal because the amplifier needs time to enter its
linear region.
The ADA4610-2 has a very fast overdrive recovery time, which
makes it a great choice for rectification of transient signals. The
symmetry of the positive and negative recovery time is also very
important in keeping the output signal undistorted.
Figure 2. Half Wave and Full Wave Rectifier
VOLTAGE (1V/DIV)
TIME (1mS/DIV)
05284-003
Figure 3. Half Wave Rectifier Signal (Output A)
VOLTAGE (1V/DIV)
TIME (1mS/DIV)
05284-004
Figure 4. Full Wave Rectifier Signal (Output B)
Figure 2 is a typical representation of a rectifier circuit. The first
stage of the circuit is a half wave rectifier. When the sine wave
applied at the input is positive, the output follows the input
response. During the negative cycle of the input, the output tries
to swing negative to follow the input, but the power supplies
restrains it to zero. Similarly, the second stage is a follower
during the positive cycle of the sine wave and an inverter during
the negative cycle. Figure 3 and Figure 4 represents the signal
response of the circuit at Output A and Output B, respectively.
HIGH GAIN COMPOSITE AMPLIFIER
V
EE
V
CC
R1
1kΩ
V
CC
V
EE
V
IN
99kΩ
R2
V+
V– V+
V–
R3 R4
99kΩ1kΩ
U5 1/2
ADA4661-2
1/2
ADA4661-2
05284-005
Figure 5. High Gain Composite Amplifier
A composite amplifier can provide a very high gain in appli-
cations where high closed-loop dc gain is needed. The high gain
achieved by the composite amplifier comes at the expense of a
loss in phase margin.
Placing a small capacitor, CF, in the feedback loop and in
parallel with R2 improves the phase margin. For the circuit
of Figure 5, picking a CF = 50 pF yields a phase margin of
about 45°.
AN-763 Application Note
Rev. C | Page 4 of 8
R1
1kΩ
V–
V+ V–
V+
V
IN
100kΩ
R2
100Ω
C3
1kΩ
R4
R3
C2
V
CC
V
EE
V
CC
V
EE
1/2
AD8657
1/2
AD8657
05284-006
Figure 6. Low Power Composite Amplifier
A composite amplifier can be used to optimize the dc and ac
characteristics. Figure 6 shows an example using the AD8657,
which offers many circuit advantages. The bandwidth is
increased substantially and the input offset voltage and noise
of the AD8657 becomes insignificant because they are divided
by the high gain of the amplifier. The circuit offers a high
bandwidth, a high output current, and a very low power
consumption of less than 100 μA.
EXTERNAL COMPENSATION TECHNIQUES
Series Resistor Compensation
The use of external compensation networks may be required
to optimize certain applications. Figure 7 shows a typical
representation of a series resistor compensation to stabilize an
op amp driving capacitive loads. The stabilizing effect of the
series resistor can be thought of as a means to isolate the op
amp output and the feedback network from the capacitive load.
The required amount of series resistance depends on the part
used, but values of 5 Ω to 50 Ω are usually sufficient to prevent
local resonance. The disadvantage of this technique is a
reduction in gain accuracy and extra distortion when driving
nonlinear loads.
V
IN
V
OUT
R2
C
L
R
L
05284-007
Figure 7. Series Resistor Compensation
VO LTAGE ( 200mV /DI V )
TIME (10µs/DIV)
GND
05284-008
R
L
= 10kΩ
C
L
= 2nF
Figure 8. Capacitor Load Drive Without Resistor
VO LTAGE ( 200mV /DI V )
TIME (10µs/DIV)
GND
RL = 10kΩ
RS = 200Ω
CL = 2nF
CS = 0.47 µF
05284-009
Figure 9. Capacitor Load Drive with Resistor
Application Note AN-763
Rev. C | Page 5 of 8
SNUBBER NETWORK
Another way to stabilize an op amp driving a capacitive load
is through the use of a snubber as shown in Figure 10.
This method has the significant advantage of not reducing the
output swing because there is no isolation resistor in the signal
path. Also, the use of the snubber does not degrade the gain
accuracy or cause extra distortion when driving a nonlinear
load. The exact RS and CS combination can be determined
experimentally.
V
IN
V
OUT
C
L
C
S
R
S
R
L
05284-010
Figure 10. Snubber Network
VO LTAGE ( 200mV /DI V )
TIME (1µs/DIV)
R
L
= 10kΩ
C
L
= 500pF
05284-011
Figure 11. Capacitor Load Drive Without Snubber
VO LTAGE ( 200mV /DI V )
TIME (1µs/DIV)
R
L
= 10kΩ
C
L
= 500pF
R
S
= 100Ω
C
S
= 1nF
05284-012
Figure 12. Capacitor Load Drive with Snubber
AN-763 Application Note
Rev. C | Page 6 of 8
1
1
1
V
EE
V
CC
R6
R4
2
3
4
8DUT
C2
DUTA
C1 R
S
1
C
S
1
R
L
1C
L
1
C3
R2
R1
1VO1
V
OUT
A
1G5
G3
R8
C4
C5
R3
R5
R7
–V1 1
–INA
G1 1
G1
+V1 1
+INA
G2 1
G2
Rt1
Rt2
AMPLI FIER A
05284-013
Figure 13. Dual Universal Precision Op Amp Evaluation Board Electrical Schematic
7
R12
R10
6
5
DUTB
DUT R
S
2
C
S
2
R
L
2C
L
2
C6
1VO2
V
OUT
B
1G6
G6
R14
C7
C8
R9
R11R13
–V2 1
–INB
G3 1
G3
+V2 1
+INB
G4 1
G4
Rt3
Rt4
AMPLI FIER B
05284-014
Figure 14. Dual Universal Precision Op Amp Evaluation Board
05284-015
Figure 15. Dual SOIC Layout Patterns
Application Note AN-763
Rev. C | Page 7 of 8
NOTES
AN-763 Application Note
Rev. C | Page 8 of 8
NOTES
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