0.5 Ω, CMOS, 1.65 V to 3.6 V,
Dual SPDT/2:1 Mux
Data Sheet
ADG836L
Rev. B Document Feedback
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FEATURES
0.5 Ω typical on resistance
0.8 Ω maximum on resistance at 125°C
1.65 V to 3.6 V operation
Operating temperature range: −40°C to +125°C
Guaranteed leakage specifications up to 125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast switching times: <20 ns
Typical power consumption: <0.1 µW
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
FUNCTIONAL BLOCK DIAGRAM
04753-0-001
S1A
S1B
S2A
S2B
IN2
ADG836L
D1
D2
SWITCHES SHOWN FOR A LOGIC 1 INPUT
IN1
Figure 1.
GENERAL DESCRIPTION
The ADG836L is a low voltage CMOS device containing two
independently selectable single-pole, double-throw (SPDT)
switches. This device offers ultralow on resistance of less than
0.8 Ω over the full temperature range. The ADG836L is fully
specified for 3.3 V, 2.5 V, and 1.8 V supply operation.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG836L exhibits break-before-make switching action.
The ADG836L is available in a 10-lead package.
PRODUCT HIGHLIGHTS
1. Less than 0.8 Ω over full temperature range of
−40°C to +125°C.
2. Single 1.65 V to 3.6 V operation.
3. Compatible with 1.8 V CMOS logic.
4. High current handling capability (300 mA continuous
current at 3.3 V).
5. Low THD + N (0.02% typical).
6. Small 10-lead MSOP package.
ADG836L Data Sheet
Rev. B | Page 2 of 14
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
Truth Table .....................................................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Test Circuits ..................................................................................... 11
Terminology .................................................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
6/2016—Rev. A to Rev. B
Updated Format .................................................................. Universal
Change to On Resistance Match Between Channels (ΔRON)
Parameter, Table 1 ............................................................................. 3
Changes to Table 6 ............................................................................ 7
Added Terminology Section ......................................................... 13
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
5/2004—Rev. 0 to Rev. A
Updated Ordering Guide ............................................................... 14
4/2004—Revision 0: Initial Version
Data Sheet ADG836L
Rev. B | Page 3 of 14
SPECIFICATIONS
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Temperature range for Y version is −40°C to +125°C.
Table 1.
Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V V
DD
= 2.7 V
On Resistance (R
ON
) 0.5 Ω typ V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
S
= 10 mA
0.65 0.75 0.8 Ω max See Figure 18
On Resistance Match Between
Channels (∆R
ON
)
0.04 0.075 0.08 Ω typ VDD = 2.7 V, VS = 0.65 V, IS = 10 mA
On Resistance Flatness (RFLAT (ON) )
Ω typ
VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA
0.15 0.16 Ω max
LEAKAGE CURRENTS V
DD
= 3.6 V
Source Off Leakage IS (Off)
nA typ
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V
±1 ±10 ±100 nA max See Figure 19
Channel On Leakage I
D
, I
S
(On) ±0.2 nA typ V
S
= V
D
= 0.6 V or 3.3 V (see Figure 20)
±1 ±15 ±120 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2 V min
Input Low Voltage, V
INL
0.8 V max
Input Current, I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
C
IN
, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS1
tON
ns typ
RL = 50 Ω, CL = 35 pF
26 28 29 ns max V
S
= 1.5 V/0 V (see Figure 21)
t
OFF
4 ns typ R
L
= 50 Ω, C
L
= 35 pF
7 8 9 ns max V
S
= 1.5 V (see Figure 21)
Break-Before-Make Time Delay (t
BBM
) 17 ns typ R
L
= 50 Ω, C
L
= 35 pF
5 ns min V
S1
= V
S2
= 1.5 V (see Figure 22)
Charge Injection 40 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF
(see Figure 23)
Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz
(see Figure 24)
Channel-to-Channel Crosstalk −90 dB typ S1A to S2A/S1B to S2B (see Figure 27),
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz
−67 dB typ S1A to S1B/S2A to S2B (see Figure 26),
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz
Total Harmonic Distortion (THD + N) 0.02 % RL = 32 Ω, f = 20 Hz to 20 kHz,
V
S
= 2 V p-p
Insertion Loss −0.05 dB typ R
L
= 50 Ω, C
L
= 5 pF (see Figure 25)
−3 dB Bandwidth
MHz typ
RL = 50 Ω, CL = 5 pF (see Figure 25)
C
S
(Off) 25 pF typ
C
D
, C
S
(On) 75 pF typ
POWER REQUIREMENTS V
DD
= 3.6 V
I
DD
0.003 µA typ Digital inputs = 0 V or 3.6 V
1 4 µA max
1 Guaranteed by design, not subject to production test.
ADG836L Data Sheet
Rev. B | Page 4 of 14
VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted. Temperature range for Y version is −40°C to +125°C.
Table 2.
Parameter +25°C
−40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
) 0.65 Ω typ V
DD
= 2.3 V, V
S
= 0 V to V
DD
, I
S
= 10 mA
0.72 0.8 0.88 Ω max See Figure 18
On Resistance Match Between
Channels (∆R
ON
)
0.04 Ω typ VDD = 2.3 V, VS = 0.7 V, IS = 10 mA
0.08 0.085 Ω max
On Resistance Flatness (R
FL AT (O N)
) 0.16 Ω typ V
DD
= 2.3 V, V
S
= 0 V to V
DD
, I
S
= 10 mA
0.23 0.24 Ω max
LEAKAGE CURRENTS V
DD
= 2.7 V
Source Off Leakage I
S
(Off ) ±0.2 nA typ V
S
= 0.6 V/2.4 V, V
D
= 2.4 V/0.6 V
±0.4
±4
±45
nA max
See Figure 19
Channel On Leakage I
D
, I
S
(On) ±0.2 nA typ V
S
= V
D
= 0.6 V or 2.4 V (see Figure 20)
±0.6 ±12 ±90 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
1.7 V min
Input Low Voltage, V
INL
0.7 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
C
IN
, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS1
tON
23
ns typ
RL = 50 Ω, CL = 35 pF
29 30 31 ns max V
S
= 1.5 V/0 V (see Figure 21)
t
OFF
5 ns typ R
L
= 50 Ω, C
L
= 35 pF
7 8 9 ns max V
S
= 1.5 V (see Figure 21)
Break-Before-Make Time
Delay (t
BBM
)
17 ns typ RL = 50 Ω, CL = 35 pF
5
ns min
VS1 = VS2 = 1.5 V (see Figure 22)
Charge Injection 30 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF
(see Figure 23)
Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz
(see Figure 24)
Channel-to-Channel Crosstalk −90 dB typ S1A to S2A/S1B to S2B; RL = 50 V, CL = 5 pF,
f = 100 kHz (see Figure 27)
−67 dB typ S1A to S1B/S2A to S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz (see Figure 26)
Total Harmonic Distortion (THD + N) 0.022 % RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 1.5 V p-p
Insertion Loss −0.06 dB typ R
L
= 50 Ω, C
L
= 5 pF (see Figure 25)
–3 dB Bandwidth 57 MHz typ
R
L
= 50 Ω, C
L
= 5 pF (see Figure 25)
C
S
(Off ) 25 pF typ
C
D
, C
S
(On) 75 pF typ
POWER REQUIREMENTS V
DD
= 2.7 V
I
DD
0.003 µA typ Digital inputs = 0 V or 2.7 V
1 4 µA max
1 Guaranteed by design, not subject to production test.
Data Sheet ADG836L
Rev. B | Page 5 of 14
VDD = 1.65 V ± 1.95 V, GND = 0 V, unless otherwise noted. Temperature range for Y version is −40°C to +125°C.
Table 3.
Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
) 1 Ω typ V
DD
= 1.8 V, V
S
= 0 V to V
DD
, I
S
= 10 mA
1.4
2.2
2.2
Ω max
See Figure 18
2 4 4 Ω typ V
DD
= 1.65 V, V
S
= 0 V to V
DD
, I
S
= 10 mA
On Resistance Match Between
Channels (∆R
ON
)
0.1 Ω typ VDD = 1.65 V, VS = 0.7 V, IS = 10 mA
LEAKAGE CURRENTS V
DD
= 1.95 V
Source Off Leakage I
S
(Off ) ±0.2 nA typ V
S
= 0.6 V/1.65 V, V
D
= 1.65 V/0.6 V
±0.4 ±4 ±25 nA max See Figure 19
Channel On Leakage I
D
, I
S
(On) ±0.2 nA typ V
S
= V
D
= 0.6 V or 1.65 V (see Figure 20)
±0.6
±10
±75
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
0.65 V
DD
V min
Input Low Voltage, VINL
0.35 VDD
V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
C
IN
, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
28 ns typ R
L
= 50 Ω, C
L
= 35 pF
37 38 39 ns max V
S
= 1.5 Ω/0 V (see Figure 21)
t
OFF
7 ns typ R
L
= 50 Ω, C
L
= 35 pF
9 10 11 ns max V
S
= 1.5 V (see Figure 21)
Break-before-Make Time Delay (t
BBM
) 21 ns typ R
L
= 50 Ω, C
L
= 35 pF
5 ns min V
S1
= V
S2
= 1 V (see Figure 22)
Charge Injection 20 pC typ V
S
= 1 V, R
S
= 0 V, C
L
= 1 nF (see Figure 23)
Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz,
(see Figure 24)
Channel-to-Channel Crosstalk −90 dB typ S1A to S2A/S1B to S2B; RL = 50 Ω,
C
L
= 5 pF, f = 100 kHz (see Figure 27)
−67 dB typ S1A to S1B/S2A to S2B; RL = 50 Ω,
C
L
= 5 pF, f = 100 kHz (see Figure 26)
Total Harmonic Distortion (THD + N) 0.14 % RL = 32 Ω, f = 20 Hz to 20 kHz,
V
S
= 1.2 V p-p
Insertion Loss −0.08 dB typ R
L
= 50 Ω, C
L
= 5 pF (see Figure 25)
−3 dB Bandwidth 57 MHz typ R
L
= 50 Ω, C
L
= 5 pF (see Figure 25)
C
S
(OFF) 25 pF typ
C
D
, C
S
(On) 75 pF typ
POWER REQUIREMENTS V
DD
= 1.95 V
I
DD
0.003 µA typ Digital inputs = 0 V or 1.95 V
1.0 4 µA max
1 Guaranteed by design, not subject to production test.
ADG836L Data Sheet
Rev. B | Page 6 of 14
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Rating
VDD to GND −0.3 V to +4.6 V
Analog Inputs1 −0.3 V to VDD + 0.3 V
Digital Inputs1 −0.3 V to 4.6 V or 10 mA,
whichever occurs first
Peak Current, S or D
3.3 V Operation 500 mA
2.5 V Operation 460 mA
1.8 V Operation 420 mA (pulsed at 1 ms,
10% duty cycle maximum)
Continuous Current, Sxx or Dx
3.3 V Operation 300 mA
2.5 V Operation 275 mA
1.8 V Operation 250 mA
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
MSOP Package
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
IR Reflow, Peak Temperature <20 sec 235°C
1 Overvoltages at INx, Sxx, or Dx are clamped by internal diodes. Current must
be limited to the maximum ratings given.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
TRUTH TABLE
Table 5.
Logic Switch A Switch B
0 Off On
1 On Off
ESD CAUTION
Data Sheet ADG836L
Rev. B | Page 7 of 14
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADG836L
TOP VIEW
(Not to Scale)
IN1 1
S1A 2
GND 3
S2A 4
IN2 5
D1
S1B
V
DD
S2B
D2
10
9
8
7
6
04753-0-002
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1, 5 IN1, IN2 Logic Control Inputs.
2, 4, 7, 9 S1A, S2A, S2B, S1B Source Terminals. These pins may be an input or output.
3 GND Ground (0 V) Reference.
6, 10 D2, D1 Drain Terminals. These pins may be an input or output.
8 V
DD
Most Positive Power Supply Potential.
ADG836L Data Sheet
Rev. B | Page 8 of 14
TYPICAL PERFORMANCE CHARACTERISTICS
0.60
0.55
0.50
0.45
ON RE SIS TANCE ()
0.40
0.35
0.30
0.25
0.20 0 0.51.01.52.02.53.03.5
VD, VS (V)
VDD = 2.7V
VDD = 3V
TA = 25°C
VDD = 3.6V VDD = 3.3V
04449-0-004
Figure 3. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V
0.8
ON RE SIS TANCE ()
0.3
0.4
0.5
0.6
0.7
0.200.5 2.5
04449-0-005
2.01.51.0
VD, VS (V)
TA = 25° C
VDD = 2.5V
VDD = 2.3V
VDD = 2.7V
Figure 4. On Resistance vs. VD (VS), VDD = 2.5 V ± 0.2 V
1.8
ON RESISTANCE ()
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.20 0.20.40.60.81.01.21.41.61.82.0
V
D
, V
S
(V)
T
A
= 25°C
V
DD
= 1.65V
V
DD
= 1.8V
V
DD
= 1.95V
04449-0-006
Figure 5. On Resistance vs. VD (VS), VDD = 1.8 V ± to 0.15 V
1.2
ON RESISTANCE ()
0.2
0.4
0.6
0.8
1.0
00 3.02.52.01.51.00.5 V
D
, V
S
(V)
+125°C
+85°C
+25°C
–40°C
V
DD
= 3.3V
04449-0-007
Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V
1.2
ON RESISTANCE ()
0.2
0.4
0.6
0.8
1.0
00 2.52.01.51.00.5 V
D
, V
S
(V)
+125°C
+25°C
V
DD
= 2.5V
+85°C
–40°C
04449-0-008
Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V
1.4
ON RESISTANCE ()
0.2
0.5
0.7
0.8
1.0
1.2
001.80.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
V
D
, V
S
(V)
+25°C
–40°C
+85°C
+125°C
V
DD
= 1.8V
04449-0-009
Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V
Data Sheet ADG836L
Rev. B | Page 9 of 14
0
–20
–80
–60
20
40
60
80
CURRENT (nA)
–40
0 20 60
40 80 100 120
TEMPERATURE (°C)
ID, IS (ON)
IS (OFF)
VDD = 3.3V
04449-0-010
Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V
60
CURRENT (nA)
–30
–20
–10
0
10
20
30
40
50
–400120100
80
60
4020 TEMPERATURE (°C)
V
DD
= 2.5V
I
D
, I
S
(ON)
I
S
(OFF)
04449-0-011
Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V
50
CURRENT (nA)
–20
–10
10
0
20
30
40
0 120
10080604020 TEMPERATURE (°C)
V
DD
= 1.8V
I
S
, I
D
(ON)
I
S
(OFF)
04449-0-012
Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V
0
10
20
30
40
50
60
70
80
90
QINJ (pC)
04449-0-013
00.5 1.0 1.5 2.0 2.5 3.0 3.5
VS (V)
TA = 25°C
VCC = 3.3V VCC = 2.5V
VCC = 1.8V
Figure 12. Charge Injection (QINJ) vs. Source Voltage (VS)
0
5
10
15
20
25
30
35
TIME (ns)
6040020–40 Ð20 80 100 120
TEMPERATURE (°C)
tON
tOFF
VDD = 3V
VDD = 3V
VDD = 2.5V
VDD = 2.5V
VDD = 1.8V
VDD = 1.8V
04449-0-014
Figure 13. tON/tOFF Time vs. Temperature
–10
–11
–12
–13
–8
–4
–2
0
1
–6
–9
–5
–3
–1
–7
ATTENUATION (dB)
0.01 0.1 1 10 100 1000
FREQUENCY (MHz)
TA = 25°C
VCC = 3.3V/2.5V/1.8V
04449-0-015
Figure 14. Bandwidth
ADG836L Data Sheet
Rev. B | Page 10 of 14
–80
–70
–60
–50
–40
–30
–20
–10
0
ATTENUATION (dB)
04449-0-016
0.01 0.1 1 10 100 1000
FREQUENCY (MHz)
TA = 25°C
VCC = 3.3V/2.5V/1.8V
Figure 15. Off Isolation vs. Frequency
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
ATTENUATION (dB)
S1A–S1B
S1A–S2A
0.01 0.1 1 10 100 1000
FREQUENCY (MHz)
V
CC
= 3.3V/2.5V/1.8V
T
A
= 25°C
04449-0-017
Figure 16. Crosstalk vs. Frequency
0.10
THD + N (%)
0
0.02
0.04
0.06
0.08
20 20k100
50 200 1k
500 2k 10k5k
FREQUENCY (Hz)
V
DD
= 2.5V
T
A
= 25°C
S1A–D1
32V LOAD
1.5V p-p
04449-0-018
Figure 17. Total Harmonic Distortion + Noise (THD + N) vs. Frequency
Data Sheet ADG836L
Rev. B | Page 11 of 14
TEST CIRCUITS
SD
V
S
R
ON
= V1/I
DS
I
DS
V1
04449-0-019
Figure 18. On Resistance
SD
VSVD
IS (OFF) ID (OFF)
AA
04449-0-020
Figure 19. Off Leakage
SD
VD
ID (ON)
NC A
04449-0-021
Figure 20. On Leakage
04449-0-022
D
IN
GND
RL
50Ω
CL
35pF
VDD
VIN
VOUT
VS
VDD
VOUT
tON tOFF
50% 50%
90% 90%
0.1µF
S1B
S1A
Figure 21. Switching Times, tON, tOFF
VOUT
VIN
tBBM tBBM
50% 50%
80%
0V
D
IN
GND
RL
50Ω
CL
35pF
VDD
VOUT
VS
VDD
0.1µF
S1B
S1A 80%
04449-0-023
Figure 22. Break-Before-Make Time Delay, tBBM
04449-0-024
IN
GND
V
DD
V
S
V
IN
V
OUT
1nF
V
OUT
NC
SW ON
Q
INJ
= CL × ∆V
OUT
SW OFF
∆V
OUT
S1B
S1A
D
Figure 23. Charge Injection
ADG836L Data Sheet
Rev. B | Page 12 of 14
04449-0-025
V
DD
V
S
V
DD
NC
NETWORK
ANALYZER
S1B S1A
GND
OFF ISOLATION = 20 LOG
D
50Ω50Ω
V
OUT
R
L
50Ω
0.1µF
V
OUT
VS
Figure 24. Off Isolation
NETWORK
ANALYZER
R
L
GND
V
DD
V
DD
V
OUT
V
S
S1A
S1B
0.1µF
D
50Ω
50Ω
INSERTION LOSS = 20 LOG V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
04449-0-026
Figure 25. Bandwidth
04449-0-027
VOUT
VDD
VDD
GND
VS
RL
50ΩRL
50Ω
0.1µF
50Ω
S1A
D
S1B
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT
VS
Figure 26. Channel-to-Channel Crosstalk (S1A to S1B)
04449-0-028
V
OUT
50Ω
50Ω
50Ω
V
S
NETWORK
ANALYZER
S2A
S2B
D1
D2 NC
NC
S1A
S1B
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG V
OUT
VS
Figure 27. Channel-to-Channel Crosstalk (S1A to S2A)
Data Sheet ADG836L
Rev. B | Page 13 of 14
TERMINOLOGY
IDD
Positive supply current.
VD (VS)
Analog voltage on terminals, D and S.
RON
Ohmic resistance between terminals, D and S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured
ΔRON
On resistance match between any two channels.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (Off)
Off switch source capacitance. Measured with reference to
ground.
CD (Off)
Off switch drain capacitance. Measured with reference to
ground.
CD, CS (On)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay time between the 50% and the 90% points of the digital
input and switch on condition.
tOFF
Delay time between the 50% and the 90% points of the digital
input and switch off condition.
tBBM
On or off time measured between the 80% points of both
switches when switching from one to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during on-off switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of the harmonic amplitudes plus noise of a signal, to
the fundamental.
ADG836L Data Sheet
Rev. B | Page 14 of 14
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
6°
0°
0.70
0.55
0.40
5
10
1
6
0.50 BSC
0.30
0.15
1.10 MAX
3.10
3.00
2.90
COPLANARITY
0.10
0.23
0.13
3.10
3.00
2.90
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
Figure 28. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADG836LYRM −40°C to +125°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SQA
ADG836LYRMZ −40°C to +125°C 10-Lead Mini Small Outline Package [MSOP] RM-10 S1D
ADG836LYRM-REEL7 −40°C to +125°C 10-Lead Mini Small Outline Package [MSOP] RM-10 SQA
1 Z = RoHS Compliant Part.
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registered trademarks are the property of their respective owners.
D04753-0-6/16(B)