    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DVery Low Power Consumption
DTypical Supply Current . . . 200 µA
(Per Amplifier)
DWide Common-Mode and Differential
Voltage Ranges
DLow Input Bias and Offset Currents
DCommon-Mode Input Voltage Range
Includes VCC+
DOutput Short-Circuit Protection
DHigh Input Impedance . . . JFET-Input Stage
DInternal Frequency Compensation
DLatch-Up-Free Operation
DHigh Slew Rate . . . 3.5 V/µs Typ
1
2
3
4
8
7
6
5
OFFSET N1
IN−
IN+
VCC−
NC
VCC+
OUT
OFFSET N2
TL061, TL061A . . . D, P, OR PS PACKAGE
TL061B ...P PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
VCC−
VCC+
2OUT
2IN−
2IN+
TL062 . . . D, JG, P, PS, OR PW PACKAGE
TL062A . . . D, P, OR PS PACKAGE
TL062B ...D OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN−
1IN+
VCC+
2IN+
2IN−
2OUT
4OUT
4IN−
4IN+
VCC−
3IN+
3IN−
3OUT
TL064 . . . D, J, N, NS, PW, OR W PACKAGE
TL064A, TL064B ...D OR N PACKAGE
(TOP VIEW)
NC − No internal connection
NC
2OUT
NC
2IN−
NC
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
1IN−
NC
1IN+
NC
TL062 . . . FK PACKAGE
(TOP VIEW)
NC
1OUT
NC
2IN+
NC NC
NC
NC
V
CC−
VCC+
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4IN+
NC
VCC−
NC
3IN+
1IN+
NC
VCC+
NC
2IN+
1IN−
1OUT
NC
3
OUT
3IN− 4OUT
4IN−
2IN−
2
OUT
NC
TL064 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The JFET-input operational amplifiers of the TL06_ series are designed as low-power versions of the
TL08_ series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input of fset
and input bias currents. The TL06_ series features the same terminal assignments as the TL07_ and
TL08_ series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET
and bipolar transistors in an integrated circuit.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C, and the M-suffix devices are characterized for operation over the full military
temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
  !" # $%&" !#  '%()$!" *!"&+
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    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION
TAVIOMAX
AT 25°CPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP (P)
Tube of 50
TL061CP TL061CP
PDIP (P) Tube of 50 TL062CP TL062CP
PDIP (N) Tube of 25 TL064CN TL064CN
Tube of 75 TL061CD
TL061C
Reel of 2500 TL061CDR TL061C
SOIC (D)
Tube of 75 TL062CD
TL062C
SOIC (D) Reel of 2500 TL062CDR TL062C
15 mV
Tube of 50 TL064CD
TL064C
15 mV
Reel of 2500 TL064CDR TL064C
SOP (PS)
Reel of 2000
TL061CPSR T061
SOP (PS) Reel of 2000 TL062CPSR T062
SOP (NS) Reel of 2000 TL064CNSR TL064
Tube of 150 TL062CPW
T062
TSSOP (PW)
Reel of 2000 TL062CPWR T062
TSSOP (PW)
Tube of 90 TL064CPW
T064
Reel of 2000 TL064CPWR
T064
0°C to 70°C
PDIP (P)
Tube of 50
TL061ACP TL061ACP
0
°
C to 70
°
C
PDIP (P) Tube of 50 TL062ACP TL062ACP
PDIP (N) Tube of 25 TL064ACN TL064ACN
Tube of 75 TL061ACD
061AC
Reel of 2500 TL061ACDR 061AC
6 mV
SOIC (D)
Tube of 75 TL062ACD
062AC
6 mV
SOIC (D) Reel of 2500 TL062ACDR 062AC
Tube of 50 TL064ACD
TL064AC
Reel of 2500 TL064ACDR TL064AC
SOP (PS)
Reel of 2000
TL061ACPSR T061A
SOP (PS) Reel of 2000 TL062ACPSR T062A
PDIP (P)
Tube of 50
TL061BCP TL061BCP
PDIP (P) Tube of 50 TL062BCP TL062BCP
PDIP (N) Tube of 25 TL064BCN TL064BCN
3 mV Tube of 75 TL062BCD
062BC
3 mV
SOIC (D)
Reel of 2500 TL062BCDR 062BC
SOIC (D)
Tube of 50 TL064BCD
TL064BC
Reel of 2500 TL064BCDR
TL064BC
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION (continued)
TAVIOMAX
AT 25°CPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP (P)
Tube of 50
TL061IP TL061IP
PDIP (P) Tube of 50 TL062IP TL062IP
PDIP (N) Tube of 25 TL064IN TL064IN
Tube of 75 TL061ID
TL061I
−40°C to 85°C
6 mV
Reel of 2000 TL061IDR TL061I
−40°C to 85°C6 mV
SOIC (D)
Tube of 75 TL062ID
TL062I
SOIC (D) Reel of 2000 TL062IDR TL062I
Tube of 50 TL064ID
TL064I
Reel of 2500 TL064IDR TL064I
TSSOP (PW) Reel of 2000 TL062IPWR TL062I
6 mV
CDIP (JG) Tube of 50 TL062MJG TL062MJG
6 mV LCCC (FK) Tube of 55 TL062MFK TL062MFK
−55°C to 125°CCDIP (J) Tube of 25 TL064MJ TL064MJ
−55 C to 125 C
9 mV CFP (W) Tube of 150 TL064MW TL064MW
9 mV
LCCC (FK) Tube of 55 TL064MFK TL064MFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
symbol (each amplifier)
+
IN+
IN− OUT
OFFSET N1
Offset Null/Compensation
TL061 Only
OFFSET N2
schematic (each amplifier)
IN+
50
100
C1
V
CC+
OUT VCC−
OFFSET N1
TL061 Only
OFFSET N2
IN−
C1 = 10 pF on TL061, TL062, and TL064
Component values shown are nominal.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
TL06_C
TL06_AC
TL06_BC TL06_I TL06_M UNIT
Supply voltage, VCC+ (see Note 1) 18 18 18 V
Supply voltage, VCC− (see Note 1) −18 −18 −18 V
Differential input voltage, VID (see Note 2) ±30 ±30 ±30 V
Input voltage, VI (see Notes 1 and 3) ±15 ±15 ±15 V
Duration of output short circuit (see Note 4) Unlimited Unlimited Unlimited
D (8-pin) package 97 97
D (14-pin) package 86 86
N package 80 80
NS package 76 76
Package thermal impedance, θJA (see Notes 5 and 6) P package 85 85 °C/W
Package thermal impedance, JA (see Notes 5 and 6)
PS package 95 95
C/W
PW (8-pin) package 149 149
PW (14-pin)
package 113 113
FK package 5.61
Package thermal impedance, θJC (see Notes 7 and 8)
J package 15.05
°C/W
Package thermal impedance, θJC (see Notes 7 and 8) JG package 14.5 °C/W
W package 14.65
Operating virtual junction temperature, TJ150 150 150 °C
Case temperature for 60 seconds FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60
300
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60
seconds
W package 300 °C
Lead temperature 1,6 mm (1/6 inch) from case for 10
260
260
°C
Lead temperature 1,6 mm (1/6 inch) from case for 10
seconds
or PW package
260
260
°
C
Storage temperature range, Tstg −65 to 150 −65 to 150 −65 to 150 °C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values except differential voltages are with respect to the midpoint between VCC+ and VCC−.
2. Differential voltages are at IN+ with respect to IN−.
3. The magnitude of the input voltage should never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
6. The package thermal impedance is calculated in accordance with JESD 51-7.
7. Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) − TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
8. The package thermal impedance is calculated in accordance with MIL-STD-883.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics, VCC±= ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
TL061C
TL062C
TL064C
TL061AC
TL062AC
TL064AC UNIT
MIN TYP MAX MIN TYP MAX
VIO
Input offset voltage
VO = 0,
TA = 25°C 3 15 3 6
mV
VIO Input offset voltage
VO = 0,
RS =50 TA = Full range 20 7.5 mV
αVIO Temperature coefficient
of input offset voltage VO = 0, RS =50 ,
TA = Full range 10 10 µV/°C
IIO
Input offset current
VO = 0
TA = 25°C 5 200 5 100 pA
IIO Input offset current VO = 0 TA = Full range 5 3 nA
IIB
Input bias current
VO = 0
TA = 25°C 30 400 30 200 pA
IIB Input bias current
VO = 0 TA = Full range 10 7 nA
VICR
Common-mode
TA = 25°C
±11
−1
2
to
±11
−1
2
to
V
VICR
Common-mode
input voltage range TA = 25°C±11
to
15 ±11
to
15 V
VOM
Maximum peak output
RL = 10 kΩ, TA = 25°C±10 ±13.5 ±10 ±13.5
V
VOM
Maximum peak output
voltage swing RL 10 kΩ, TA = Full range ±10 ±10 V
AVD
Large-signal differential
VO =
±
10 V,
TA = 25°C 3 6 4 6
V/mV
AVD
Large-signal differential
voltage amplification
VO = ±10 V,
RL 10 kTA = Full range 3 4 V/mV
B1Unity-gain bandwidth RL = 10 kΩ, TA = 25°C 1 1 MHz
riInput resistance TA = 25°C 1012 1012
CMRR Common-mode rejection
ratio VIC = VICRmin, VO = 0,
RS = 50 Ω, TA = 25°C70 86 80 86 dB
kSVR
Supply-voltage rejection
ratio
VCC = ±9 V to ±15 V,
VO = 0, RS = 50
70
95
80
95
dB
kSVR
ratio
(V
CC
±/V
IO
)
CC
V
O
= 0,
R
S
= 50
Ω,
T
A
= 25°C70 95 80 95 dB
PDTotal power dissipation
(each amplifier) VO = 0,
No load TA = 25°C, 6 7.5 6 7.5 mW
ICC Supply current
(each amplifier) VO = 0,
No load TA = 25°C, 200 250 200 250 µA
VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 120 dB
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for
TA is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and −40°C to 85°C for TL06_I.
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in
Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics, VCC±= ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
TL061BC
TL062BC
TL064BC
TL061I
TL062I
TL064I UNIT
MIN TYP MAX MIN TYP MAX
VIO
Input offset voltage
VO = 0,
TA = 25°C 2 3 3 6
mV
VIO Input offset voltage
VO = 0,
RS =50 TA = Full range 5 9 mV
αVIO Temperature coefficient of
input offset voltage VO = 0, RS =50 ,
TA = Full range 10 10 µV/°C
IIO
Input offset current
VO = 0
TA = 25°C 5 100 5 100 pA
IIO Input offset current VO = 0 TA = Full range 3 10 nA
IIB
Input bias current
VO = 0
TA = 25°C 30 200 30 200 pA
IIB Input bias current
VO = 0 TA = Full range 7 20 nA
VICR Common-mode
input voltage range TA = 25°C±11 −12
to
15 ±11 −12
to
15 V
VOM
Maximum peak output
RL = 10 kΩ, TA = 25°C±10 ±13.5 ±10 ±13.5
V
VOM
Maximum peak output
voltage swing RL 10 kΩ, TA = Full range ±10 ±10 V
AVD
Large-signal differential
VO =
±
10 V,
TA = 25°C 4 6 4 6
V/mV
AVD
Large-signal differential
voltage amplification
VO = ±10 V,
RL 10 kTA = Full range 4 4 V/mV
B1Unity-gain bandwidth RL = 10 kΩ, TA = 25°C 1 1 MHz
riInput resistance TA = 25°C 1012 1012
CMRR Common-mode
rejection ratio VIC = VICRmin, VO = 0,
RS = 50 Ω, TA = 25°C80 86 80 86 dB
kSVR
Supply-voltage rejection
ratio
VCC = ±9 V to ±15 V,
VO = 0, RS = 50
80
95
80
95
dB
kSVR
ratio
(V
CC
±/V
IO
)
CC
V
O
= 0,
R
S
= 50
Ω,
T
A
= 25°C80 95 80 95 dB
PDTotal power dissipation
(each amplifier) VO = 0,
No load TA = 25°C, 6 7.5 6 7.5 mW
ICC Supply current
(each amplifier) VO = 0,
No load TA = 25°C, 200 250 200 250 µA
VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 120 dB
All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise specified. Full range for
TA is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and −40°C to 85°C for TL06_I.
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in
Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics, VCC± = ±15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TL061M
TL062M TL064M
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
VIO
Input offset voltage
VO = 0,
TA = 25°C 3 6 3 9
mV
VIO Input offset voltage
VO = 0,
RS =50 TA = −55°C to 125°C 9 15 mV
αVIO Temperature coefficient
of input offset voltage VO = 0, RS =50 ,
TA = −55°C to 125°C10 10 µV/°C
TA = 25°C 5 100 5 100 pA
I
IO
Input offset current V
O
= 0 TA = −55°C 20* 20*
nA
IIO
Input offset current
VO = 0
TA = 125°C 20 20 nA
TA = 25°C 30 200 30 200 pA
I
IB
Input bias currentV
O
= 0 TA = −55°C 50* 50*
nA
IIB
Input bias current
VO = 0
TA = 125°C 50 50 nA
VICR Common-mode
input voltage range TA = 25°C±11.5 −12
to
15 ±11.5 −12
to
15 V
VOM
Maximum peak output
RL = 10 kΩ, TA = 25°C±10 ±13.5 ±10 ±13.5
V
VOM
Maximum peak output
voltage swing RL 10 kΩ, TA = −55°C to 125°C±10 ±10 V
AVD
Large-signal differentia
l
VO =
±
10 V,
TA = 25°C 4 6 4 6
V/mV
AVD voltage amplification
VO = ±10 V,
RL 10 kTA = −55°C to 125°C 4 4 V/mV
B1Unity-gain bandwidth RL = 10 kΩ, TA = 25°C MHz
riInput resistance TA = 25°C 1012 1012
CMRR Common-mode
rejection ratio VIC = VICRmin, VO = 0,
RS =50 Ω, TA = 25°C80 86 80 86 dB
kSVR Supply-voltage
rejection
ratio (VCC±/VIO)VCC = ±9 V to ±15 V, VO = 0,
RS =50 Ω, TA = 25°C80 95 80 95 dB
PDTotal power dissipation
(each amplifier) VO = 0,
No load TA = 25°C, 6 7.5 6 7.5 mW
ICC Supply current
(each amplifier) VO = 0,
No load TA = 25°C, 200 250 200 250 µA
VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 120 dB
* This parameter is not production tested.
All characteristics are measured under open-loop conditions, with zero common-mode voltage, unless otherwise specified.
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in
Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.
operating characteristics, VCC± = ±15 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Slew rate at unity gain (see Note 5) VI = 10 V,
RL = 10 kΩ, CL = 100 pF,
See Figure 1 1.5 3.5 V/µs
trRise time
VI = 20 mV,
RL = 10 k
Ω, 0.2
s
Overshoot factor
VI = 20 mV,
CL = 100 pF,
RL = 10 k
,
See Figure 1 10% µs
VnEquivalent input noise voltage RS = 20 ,f = 1 kHz 42 nV/Hz
NOTE 5: Slew rate at −55°C to 125°C is 0.7 V/µs min.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VI
RL = 2 k
+
CL = 100 pF
OUT
Figure 1. Unity-Gain Amplifier
VI
10 k
1 k
RLCL = 100 pF
+
OUT
Figure 2. Gain-of-10 Inverting Amplifier
N2
N1
100 k
1.5 k
VCC−
+
TL061
IN−
OUT
IN+
Figure 3. Input Offset-Voltage Null Circuit
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Maximum peak output voltage vs Supply voltage 4
Maximum peak output voltage vs Free-air temperature 5
Maximum peak output voltage vs Load resistance 6
Maximum peak output voltage vs Frequency 7
Differential voltage amplification vs Free-air temperature 8
Large-signal differential voltage amplification vs Frequency 9
Phase shift vs Frequency 9
Supply current vs Supply voltage 10
Supply current vs Free-air temperature 11
Total power dissipation vs Free-air temperature 12
Common-mode rejection ratio vs Free-air temperature 13
Normalized unity-gain bandwidth vs Free-air temperature 14
Normalized slew rate vs Free-air temperature 14
Normalized phase shift vs Free-air temperature 14
Input bias current vs Free-air temperature 15
Voltage-follower large-signal pulse response vs Time 16
Output voltage vs Elapsed time 17
Equivalent input noise voltage vs Frequency 18
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 4
0
0
− Maximum Peak Output Voltage − V
|VCC±| − Supply Voltage − V
±2.5
±5
±7.5
±10
±12.5
±15
246810121416
RL = 10 k
TA = 25°C
See Figure 2
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
ÁÁ
ÁÁ
VOM
Figure 5
−75
0
TA − Free-Air Temperature − °C
±2.5
±5
±7.5
±10
±12.5
±15
−50 −25 0 25 50 75 100 125
VCC± = ±15 V
RL = 10 k
See Figure 2
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
− Maximum Peak Output Voltage − V
ÁÁ
ÁÁ
VOM
Figure 6
See Figure 2
TA = 25°C
VCC± = ±15 V
0100 RL − Load Resistance −
1 k 10
k
±2.5
±5
±7.5
±10
±12.5
±15
200 400 700 2 k 4 k 7 k
MAXIMUM PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
− Maximum Peak Output Voltage − V
ÁÁ
ÁÁ
VOM
VCC± = ±12 V
VCC± = ±5 V
f − Frequency − Hz
1 k
010 k 100 k 1 M 10 M
±2.5
±5
±7.5
±10
±12.5
±15
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
RL = 10 k
TA = 25°C
See Figure 2
ÁÁÁÁÁ
ÁÁÁÁÁ
VCC± = ±15 V
Figure 7
− Maximum Peak Output Voltage − V
ÁÁ
ÁÁ
VOM
Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
− Differential Voltage Amplification − V/mV
AVD
RL = 10 k
VCC± = ±15 V
1−75 TA − Free-Air Temperature − °C
−50 −25 0 25 50 75 100 125
2
4
10
7
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
Figure 8
AVD
(left scale)
1
0.001
f − Frequency − Hz
10 100 1 k 10 k 100 k 1 M 10 M
0.01
0.1
1
10
100
Phase Shift
135°
90°
180°
45°
0°
VCC± = ±15 V
Rext = 0
RL = 10 k
TA = 25°C
Phase Shift
(right scale)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
− Large-Signal Differential
AVD
Voltage Amplification − V/mV
Figure 9
Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
TA = 25°C
No Signal
No Load
0
0
246810121416
50
100
150
200
250
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
|VCC±| − Supply Voltage − V
ICC − Supply Current − µA
ÁÁ
ÁÁ
ÁÁ
ICC±
ICC − Supply Current − µA
Figure 11
−75
0
TA − Free-Air Temperature − °C
50
100
150
200
250
−50 −25 0 25 50 75 100 125
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
ÁÁ
ÁÁ
ÁÁ
ICC±
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
VCC± = ±15 V
No Signal
No Load
Figure 12
−75
0
TA − Free-Air Temperature − °C
5
10
15
20
25
30
−50 −25 0 25 50 75 100 125
VCC± = ±15 V
No Signal
No Load
TL064
TL062
TL061
TOTAL POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
PD − Total Power Dissipation − mW
ÁÁ
ÁÁ
PD
Figure 13
81
CMRR − Common-Mode Rejection Ratio − dB
1251007550250−25−50
TA − Free-Air Temperature − °C
−75
82
83
84
85
86
87 VCC± = ±15 V
RL = 10 k
ALL EXCEPT TL06_C
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0.7
Normalized Unity-Gain Bandwidth and Slew Rate
125
1007550250−25−50 TA − Free-Air Temperature − °C
−75
0.8
0.9
1
1.1
1.2
1.3
1.02
1.01
1
0.99
0.98
0.97
Normalized Phase Shift
1.03
VCC± = ±15 V
RL = 10 k
f = B1 for Phase Shift
Unity-Gain Bandwidth
(left scale) Phase Shift
(right scale)
Slew Rate
(left scale)
NORMALIZED UNITY-GAIN BANDWIDTH,
SLEW RATE, AND PHASE SHIFT
vs
FREE-AIR TEMPERATURE
Figure 14
1251007550250−25
0.01
IIB − Input Bias Current − nA
−50 TA − Free-Air Temperature − °C
0.04
0.1
0.4
1
4
10
40
100
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
ÁÁÁÁÁ
VCC± = ±15 V
ÁÁ
ÁÁ
IIB
Figure 15 Figure 16
−6
Input and Output Voltages − V
t − Time − µs
Input
Output
VCC± = ±15 V
RL = 10 k
CL = 100 pF
TA = 25°C
0246810
−4
−2
0
2
4
6
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
vs
TIME
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
−4
− Output Voltage − mV
t − Elapsed Time − µs
0 0.2 0.4 0.6 0.8 1 1.2 1.4
0
4
8
12
16
20
24
28
VCC± = ±15 V
RL = 10 k
TA = 25°C
10%
tr
Overshoot
90%
OUTPUT VOLTAGE
vs
ELAPSED TIME
VO
ÁÁ
ÁÁ
Vn
0
− Equivalent Input Noise Voltage −
f − Frequency − Hz
10
20
30
40
50
60
70
80
90
100
10 40 100 400 1 k 4 k 10 k 40 k 100 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
VCC± = ±15 V
RS = 20
TA = 25°C
nV/ Hz
Figure 18
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
Table of Application Diagrams
APPLICATION DIAGRAM PART
NUMBER FIGURE
Instrumentation amplifier TL064 19
0.5-Hz square-wave oscillator TL061 20
High-Q notch filter TL061 21
Audio-distribution amplifier TL064 22
Low-level light detector preamplifier TL061 23
AC amplifier TL061 24
Microphone preamplifier with tone control TL061 25
Instrumentation amplifier TL062 26
IC preamplifier TL062 27
+
+
+
+
TL064
VCC+
VCC−
100 k
Input B
10 k
0.1% 0.1%
10 k
VCC−
VCC+
TL064
Input A
VCC+
TL064
VCC−
100 k
10 k
0.1% 10 k
0.1%
TL064
VCC−
VCC+
100 k
100 k
Output
1 M
Figure 19. Instrumentation Amplifier
TL061
+
−15 V
15 V Output
1 k
9.1 k
3.3 k
CF = 3.3 µF
RF = 100 k
3.3 k
f+1
2p RF CF
Figure 20. 0.5-Hz Square-Wave Oscillator
TL061
+
R2
R1
C1 C2
R3
C3 VCC−
VCC+
OutputInput
C1 +C2 +C3
2+110 pF
fo+1
2p R1 C1 +1kHz
R1 = R2 = 2 × R3 = 1.5 M
Figure 21. High-Q Notch Filter
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
+
+
TL064 Output C
VCC+
VCC+
Output B
TL064
+
VCC+
Output A
TL064
+
VCC+
TL064
VCC+
100 k
100 µF
Input
1 µF
1 M
100 k
100 k
Figure 22. Audio-Distribution Amplifier
+
TIL601
10 k
15 V
Output
−15 V
5 k
100 pF TL061
10 k
10 k
10 k
10 k
10 k
Figure 23. Low-Level Light Detector Preamplifier
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
18 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
TL061
N2
+
0.1 µF10 k
50
250 k
N1
Output
1 M
VCC+
10 k
10 k
0.1 µF
Figure 24. AC Amplifier
1.2 M100 k
20 µF
+
0.1 µF
47 kTL061
2.7 k
270 0.003 µF 0.001 µF
0.002 µF
1 µF
10 k
100 k
50 k
0.06 µF
50 k
10 k100 k1 k
0.06 µF
10 k
0.02 µF
100 k
+
Figure 25. Microphone Preamplifier With Tone Control
IN−
IN+
100 k
TL062
TL062
1 k
1 k
100 k
+
+Output
Figure 26. Instrumentation Amplifier
    
   
   
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
TL062
220 k
+
0.00375 µF
TL062
+
10 pF
68 k
0.003 µF
0.03 µF
0.03 µF
10 k3.3 k
0.003 µF
VCC−
VCC+
Output
Input
VCC−
VCC+
10 pF
MIN
MAX
100 k
Treble
MIN
MAX
100 k
Bass
10 k
10 k
+
0.01 µF27 k
100
Balance 100
50 pF
+
75 µF
47 µF
5 k
Gain
47 k
1 µF
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
TA = 25°C
VCC± = ±15 V
Max
Treble
Max Bass
200 10 k4 k2 k1 k40040 100
20
15
10
5
0
−5
−10
−15
−20
−25 20 k
25
f − Frequency − Hz
Voltage Amplification − dB
20
IC PREAMPLIFIER RESPONSE CHARACTERISTICS
ÁÁÁ
ÁÁÁ
Min
Treble
ÁÁÁ
ÁÁÁ
Min Bass
Figure 27. IC Preamplifier
PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
81023012A OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125
81023022A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023022A
TL062MFKB
8102302HA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 8102302HA
TL062M
8102302PA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 8102302PA
TL062M
81023032A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023032A
TL064MFKB
8102303CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102303CA
TL064MJB
8102303DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102303DA
TL064MWB
TL061ACD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 061AC
TL061ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061ACP
TL061ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061ACP
TL061BCD OBSOLETE SOIC D 8 TBD Call TI Call TI 0 to 70
TL061BCP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061BCP
TL061BCPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061BCP
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL061CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C
TL061CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061CP
TL061CPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL061CP
TL061CPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T061
TL061CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T061
TL061CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T061
TL061CPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI 0 to 70
TL061ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
TL061IDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
TL061IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
TL061IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
TL061IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
TL061IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL061IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL061IP
TL061IPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL061IP
TL061MJG OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125
TL061MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125
TL062ACD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062AC
TL062ACJG OBSOLETE CDIP JG 8 TBD Call TI Call TI 0 to 70
TL062ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062ACP
TL062ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062ACP
TL062ACPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062A
TL062ACPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062A
TL062ACPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062A
TL062BCD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
TL062BCDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
TL062BCDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 4
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL062BCDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
TL062BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
TL062BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 062BC
TL062BCP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062BCP
TL062BCPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062BCP
TL062CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C
TL062CJG OBSOLETE CDIP JG 8 TBD Call TI Call TI 0 to 70
TL062CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062CP
TL062CPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL062CP
TL062CPSLE OBSOLETE SO PS 8 TBD Call TI Call TI 0 to 70
TL062CPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPW ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 5
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL062CPWE4 ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI 0 to 70
TL062CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T062
TL062ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I
TL062IJG OBSOLETE CDIP JG 8 TBD Call TI Call TI -40 to 85
TL062IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL062IP
TL062IPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL062IP
TL062IPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z062
TL062IPWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z062
TL062IPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Z062
TL062MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023022A
TL062MFKB
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 6
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL062MJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 TL062MJG
TL062MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 8102302PA
TL062M
TL064ACD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACDE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACDRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC
TL064ACN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064ACN
TL064ACNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064ACN
TL064ACP NRND PDIP NFF 14 25 TBD Call TI Call TI 0 to 70 LF444ACN
TL064BCD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCDE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCDRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCDRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC
TL064BCN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064BCN
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 7
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL064BCNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064BCN
TL064BCP NRND PDIP NFF 14 25 TBD Call TI Call TI 0 to 70 LF444ACN
TL064CD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CDE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CDRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C
TL064CN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064CN
TL064CNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL064CN
TL064CNSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064
TL064CNSRE4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064
TL064CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL064
TL064CP NRND PDIP NFF 14 25 TBD Call TI Call TI 0 to 70 LF444CN
TL064CPW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
TL064CPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
TL064CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
TL064CPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI 0 to 70
TL064CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 8
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL064CPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
TL064CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T064
TL064ID ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064IDE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064IDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064IDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 TL064I
TL064IDRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064IN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL064IN
TL064INE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL064IN
TL064INS ACTIVE SO NS 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064INSG4 ACTIVE SO NS 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064INSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064INSRG4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I
TL064MFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 TL064MFK
TL064MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023032A
TL064MFKB
TL064MJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 TL064MJ
TL064MJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102303CA
TL064MJB
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 9
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TL064MWB ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102303DA
TL064MWB
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL062, TL062M, TL064, TL064M :
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 10
Catalog: TL062, TL064
Military: TL062M, TL064M
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL061ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL061CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL061CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL061CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL061IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL061IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062ACPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TL062BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL062IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL062IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL064ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL064BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL064CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL064IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL064IDRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL064INSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL061ACDR SOIC D 8 2500 340.5 338.1 20.6
TL061CDR SOIC D 8 2500 367.0 367.0 35.0
TL061CDR SOIC D 8 2500 340.5 338.1 20.6
TL061CPSR SO PS 8 2000 367.0 367.0 38.0
TL061IDR SOIC D 8 2500 367.0 367.0 35.0
TL061IDR SOIC D 8 2500 340.5 338.1 20.6
TL062ACDR SOIC D 8 2500 340.5 338.1 20.6
TL062ACPSR SO PS 8 2000 367.0 367.0 38.0
TL062BCDR SOIC D 8 2500 340.5 338.1 20.6
TL062CDR SOIC D 8 2500 367.0 367.0 35.0
TL062CDR SOIC D 8 2500 340.5 338.1 20.6
TL062CPWR TSSOP PW 8 2000 367.0 367.0 35.0
TL062IDR SOIC D 8 2500 367.0 367.0 35.0
TL062IDR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL062IPWR TSSOP PW 8 2000 367.0 367.0 35.0
TL064ACDR SOIC D 14 2500 367.0 367.0 38.0
TL064BCDR SOIC D 14 2500 367.0 367.0 38.0
TL064CPWR TSSOP PW 14 2000 367.0 367.0 35.0
TL064IDR SOIC D 14 2500 367.0 367.0 38.0
TL064IDRG4 SOIC D 14 2500 367.0 367.0 38.0
TL064INSR SO NS 14 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
MECHANICAL DATA
N0014A
www.ti.com
N14A (Rev G)
NFF0014A
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