ASIX ELECTRONICS CORPORATION Release Date: 08/18/2007
4F, No. 8, Hsin Ann Rd., HsinChu Science Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500 FAX: 886-3-579-9558 http://www.asix.com.tw
AX88196BLF
Low-pin-count Non-PCI 8/16-bit
10/100M Fast Ethernet Controller with MII Interface
Features Document No.: AX88196B_13/ 08/18/07
High-performance non-PCI local bus
Support 8/16-bit local CPU interfaces include
MCS-51 series, 80186 series CPU and ISA bus
SRAM-like host interface, easily interfaced to most
common embedded MCUs
Embed 8Kx16 bits SRAM for packet buffers
Support Slave-DMA to minimize CPU overhead
Support burst-mode read for highest performance
applications
Interrupt pin with programmable Hold-off timer
Single-chip Fast Ethernet controller
Compatible with IEEE802.3, 802.3u standards
Integrate Fast Ethernet MAC/PHY transceiver in
one chip
Support 10Mbps and 100Mbps data rate
Support full and half duplex operations
Support 10/100Mbps N-way Auto-negotiation
operation
Support twisted pair crossover detection and
auto-correction (HP Auto-MDIX)
Support IEEE 802.3x flow control for full-duplex
operation
Support back-pressure flow control for half-duplex
operation
Support VLAN match filter
Provide optional MII interface for external
100BASE-FX Ethernet PHY, HomePNA PHY or
HomePlug PHY
Support Wake-on-LAN function by following events
to reduce power
Detection of a change in the network link state
Receipt of a Magic Packet
Receipt of a MS wakeup frame
NE2000 register level compatible instruction
Detection performance can be enhanced with only a
minor host driver modification from original
NE2000 driver
Support EEPROM interface to store MAC address
(Optional)
Support up to 2 (out) /1 (in/out) General Purpose pins
Support LED pins for various network activity
indications
Integrate voltage regulator and 25MHz crystal
oscillator
0.18um CMOS process. 3.3V power supply with 5V
tolerant I/O pins
100-pin LQFP , RoHS package
Operate over 0 to +70 °C temperature range
US patent approved (NO 6799231)
Product description
The AX88196B is a non-PCI Ethernet controller with MII for the Embedded Ethernet applications. The AX88196B
supports 8/16-bit SRAM-like host interface, providing a glue-less connection to most common embedded MCUs. The
AX88196B integrates on-chip Fast Ethernet MAC and PHY, which is IEEE802.3 10Base-T and IEEE802.3u
100Base-TX compatible, and 8Kx16 bits embedded SRAM for packet buffering to accommodate high bandwidth
applications. The AX88196B has a wide array of features including support for Twisted Pair Crossover Detection and
Auto-Correction, Wake-on-LAN power management, and IEEE 802.3x and back-pressure flow control. The
programming of AX88196B is simple and compatible with NE2000, so the users don’t need any modification and can
easily port the software drivers to many embedded systems very quickly. Combining these features with ASIX’s free
TCP/IP software stack for 8-bit microcontrollers, AX88196B provides the best Ethernet solution for embedded
networking applications.
System Block Diagram
Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No
liability is assumed as a result of the use of this product. No rights under any patent accom pany the sale of the product.
AX88196B
with MII and
10/100 Mbps
PHY
8bit / 16bit
on-PCI bus
51 series
/
186 bus
series
/
ISA bus
General
processor
AX88196B
with MII and
10/100 Mbps
PHY
Interrupt
Address
CSn
RDn / WRn
Data Bus
MII MII