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DESD Protection for RS-232 I/O Pins
− ±15 kV − Human-Body Model
DMeets or Exceeds the Requirements of
TIA/EIA-232-F and ITU v.28 Standards
DOperates at 5-V VCC Supply
DOperates Up To 120 kbit/s
DExternal Capacitors ...4 × 0.1 µF
DLatch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DApplications
− Battery-Powered Systems, PDAs,
Notebooks, Laptops, Palmtop PCs, and
Hand-Held Equipment
description/ordering information
The MAX207 consists of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD
protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of
TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and
the serial-port connector . The charge pump and four small external capacitors allow operation from a single 5-V
supply. The devices operate at data signaling rates up to 120 kbit/s and a maximum of 30-V/µs driver output
slew rate.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SOIC (DW)
Tube of 25 MAX207CDW
MAX207C
0°C to 70°CSOIC (DW) Reel of 2000 MAX207CDWR MAX207C
0C to 70 C
SSOP (DB) Reel of 2000 MAX207CDBR MA207C
SOIC (DW)
Tube of 25 MAX207IDW
MAX207I
−40°C to 85°CSOIC (DW) Reel of 2000 MAX207IDWR MAX207I
−40 C to 85 C
SSOP (DB) Reel of 2000 MAX207IDBR MB207I
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DB OR DW PACKAGE
(TOP VIEW)
DOUT3
DOUT1
DOUT2
RIN1
ROUT1
DIN2
DIN1
GND
VCC
C1+
V+
C1−
DOUT4
RIN2
ROUT2
DIN5
DOUT5
DIN4
DIN3
ROUT3
RIN3
V−
C2−
C2+
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
!"#$ % &'!!($ #% )'*+&#$ ,#$(-
!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($%
%$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',(
$(%$2 #++ )#!#"($(!%-
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Function Tables
EACH DRIVER
INPUT
DIN OUTPUT
DOUT
L H
H L
H = high level, L = low
level
EACH RECEIVER
INPUT
RIN OUTPUT
ROUT
L H
H L
Open H
H = high level, L = low
level, Open = input
disconnected or
connected driver off
logic diagram (positive logic)
DIN1 DOUT1
RIN2ROUT2
DIN2 DOUT2
RIN3ROUT3
7
6
22
17
2
3
23
16
RIN1ROUT1 54
DIN3 DOUT3
DIN4 DOUT4
18
19
1
24
DIN5 DOUT5
21 20
RS-232
Outputs
TTL/CMOS
Inputs
RS-232
Inputs
TTL/CMOS
Outputs
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Positive charge pump voltage range, V+ (see Note 1) VCC − 0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative charge pump voltage range, V− (see Note 1) −14 V to 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Drivers −0.3 V to V+ + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receivers ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO: Drivers V− − 0.3 V to V+ + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receivers −0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short-circuit duration: DOUT Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): DB package 63°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 46°C/W. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4 and Figure 4)
MIN NOM MAX UNIT
Supply voltage 4.5 5 5.5 V
VIH Driver high-level input voltage DIN 2 V
VIL Driver low-level input voltage DIN 0.8 V
VI
Driver input voltage DIN 0 5.5
V
VIReceiver input voltage −30 30 V
TA
Operating free-air temperature
MAX207C 0 70
°C
T
A
Operating free-air temperature
MAX207I −40 85 °
C
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ±0.5 V.
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(see Note 4 and Figure 4)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ICC Supply current No load, VCC = 5 V, TA = 25°C11 20 mA
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ±0.5 V.
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DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VOH High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 9 V
VOL Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC −5 −9 V
IIH High-level input current VI = VCC 15 200 µA
IIL Low-level input current VI at 0 V −15 −200 µA
IOS‡Short-circuit output current VCC = 5.5 V, VO = 0 V ±10 ±60 mA
roOutput resistance VCC, V+, and V− = 0 V, VO = ±2 V 300 W
†All typical values are at VCC = 5 V, and TA = 25°C.
‡Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output
should be shorted at a time.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ±0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Maximum data rate CL = 50 to 1000 pF,
One DOUT switching, RL = 3 kΩ to 7 kΩ,
See Figure 1 120 kbit/s
tPLH (D) Propagation delay time,
low- to high-level output CL = 2500 pF,
all drivers loaded, RL = 3 kΩ,
See Figure 1 2µs
tPHL (D) Propagation delay time,
high- to low-level output CL = 2500 pF,
all drivers loaded, RL = 3 kΩ,
See Figure 1 2µs
tsk(p) Pulse skew§CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ,
See Figure 2 300 ns
SR(tr) Slew rate, transition region
(see Figure 1) CL = 50 pF to 1000 pF
VCC = 5 V RL = 3 kΩ to 7 kΩ,3 6 30 V/µs
†All typical values are at VCC = 5 V, and TA = 25°C.
§Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ±0.5 V.
ESD protection
PIN TEST CONDITIONS TYP UNIT
DOUT, RIN Human-Body Model ±15 kV
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RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VOH High-level output voltage IOH = −1 mA 3.5 VCC−0.4 V V
VOL Low-level output voltage IOL = 1.6 mA 0.4 V
VIT+ Positive-going input threshold voltage VCC = 5 V, TA = 25°C 1.7 2.4 V
VIT− Negative-going input threshold voltage VCC = 5 V, TA = 25°C 0.8 1.2 V
Vhys Input hysteresis (VIT+ − VIT−) 0.2 0.5 1 V
riInput resistance VI = ±3 V to ±25 V 3 5 7 kW
†All typical values are at VCC = 5 V, and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ±0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 3)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
tPLH Propagation delay time, low- to high-level output
CL= 150 pF
0.5 10 µs
tPHL Propagation delay time, high- to low-level output CL= 150 pF 0.5 10 µs
tsk(p) Pulse skew‡300 ns
†All typical values are at VCC = 5 V, and TA = 25°C.
‡Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF, at VCC = 5 V ±0.5 V.
PARAMETER MEASUREMENT INFORMATION
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
VOL
VOH
tPLH (D)
Generator
(see Note B) RL
RS-232
Output
tPHL (D)
CL
(see Note A)
SR(tr) +6V
tPHL (D) or tPLH (D)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤10 ns, tf ≤ 10 ns.
1.5 V 1.5 V
3 V
−3 V
3 V
−3 V
Figure 1. Driver Slew Rate
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PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
VOL
VOH
tPLH (D)
tPHL (D)
50% 50%
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
1.5 V 1.5 V
50 Ω
Generator
(see Note B) RL
RS-232
Output
CL
(see Note A)
Figure 2. Driver Pulse Skew
TEST CIRCUIT VOLTAGE WAVEFORMS
50 Ω
50%
50%
−3 V
3 V
1.5 V
1.5 V
Output
Input
VOL
VOH
tPHL (R)
Generator
(see Note B) tPLH (R)
Output
CL
(see Note A)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 3. Receiver Propagation Delay Times
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APPLICATION INFORMATION
DOUT3 1
+
−
400 kΩ
5 V
18 DIN3
400 kΩ
5 V
19
400 kΩ
5 V
21
DOUT5
20
5 kΩ
23
ROUT2
22
RIN2
24 DOUT4
5 kΩ
16
ROUT3
17
RIN3
15 +−
C4 =
0.1 µF
16 V
14
13
+
−C2 =
0.1 µF
16 V
C2−
C2+
DOUT1 2
400 kΩ
5 V
DIN1 7
400 kΩ
5 V
DIN2 6
DOUT2 3
RIN1 4
5 kΩ
ROUT1 5
C1 =
0.1 µF
6.3 V 12
11 V+
10
+
−
=
0.1 µF
6.3 V
9VCC
+
−
GND 8
DIN4
DIN5
C1+
C1−
V−
†C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal.
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be
connected as shown.
CBYPASS
= 0.1µF
C3†
Figure 4. Typical Operating Circuit and Capacitor Values
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8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
capacitor selection
The capacitor type used for C1−C4 is not critical for proper operation. The MAX207 requires 0.1-µF capacitors,
although capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF
capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does
not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2×)
nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures,
influences the amount of ripple on V+ and V−.
Use larger capacitors (up to 10 µF) to reduce the output impedance at V+ and V−.
Bypass VCC to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the
charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump
capacitors (C1−C4).
ESD protection
TI MAX207 devices have standard ESD protection structures incorporated on the pins to protect against
electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver
outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures
were designed to successfully protect these bus pins against ESD discharge of ±15-kV when powered down.
ESD test conditions
ESD testing is stringently performed by TI, based on various conditions and procedures. Please contact TI for
a reliability report that documents test setup, methodology, and results.
Human-Body Model
The Human-Body Model (HBM) of ESD testing is shown in Figure 5, while Figure 6 shows the current waveform
that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged
to the ESD voltage of concern, and subsequently discharged into the device under test (DUT) through a 1.5-kΩ
resistor.
−
+DUT
RD
1.5 kΩ
VHBM CS
100 pF
Figure 5. HBM ESD Test Circuit
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APPLICATION INFORMATION
100 150 20050
0
1.5
1.0
0.5
0.0
VHBM = 2 kV
DUT = 10-V, 1-Ω Zener Diode
Time − ns
IDUT− A
Figure 6. Typical HBM Current Waveform
Machine Model
The Machine Model (MM) ESD test applies to all pins using a 200-pF capacitor with no discharge resistance.
The purpose of the MM test is to simulate possible ESD conditions that can occur during the handling and
assembly processes of manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins.
However, after PC board assembly, the MM test no longer is as pertinent to the RS-232 pins.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
MAX207CDB ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDBE4 ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDBG4 ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDBR ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDBRE4 ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDBRG4 ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDW ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDWE4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDWG4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDWR ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207CDWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDB ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDBE4 ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDBG4 ACTIVE SSOP DB 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDBR ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDBRE4 ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDBRG4 ACTIVE SSOP DB 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDW ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDWE4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDWG4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDWR ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX207IDWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
PACKAGE OPTION ADDENDUM
www.ti.com 28-May-2007
Addendum-Page 1
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 28-May-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
MAX207CDBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1
MAX207CDWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1
MAX207IDBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1
MAX207IDWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
MAX207CDBR SSOP DB 24 2000 367.0 367.0 38.0
MAX207CDWR SOIC DW 24 2000 367.0 367.0 45.0
MAX207IDBR SSOP DB 24 2000 367.0 367.0 38.0
MAX207IDWR SOIC DW 24 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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